Lines Matching refs:CodeGenRegBank
39 void runEnums(raw_ostream &o, CodeGenTarget &Target, CodeGenRegBank &Bank);
42 void runMCDesc(raw_ostream &o, CodeGenTarget &Target, CodeGenRegBank &Bank);
46 CodeGenRegBank &Bank);
50 CodeGenRegBank &Bank);
61 void EmitRegUnitPressure(raw_ostream &OS, const CodeGenRegBank &RegBank,
63 void emitComposeSubRegIndices(raw_ostream &OS, CodeGenRegBank &RegBank,
65 void emitComposeSubRegIndexLaneMask(raw_ostream &OS, CodeGenRegBank &RegBank,
72 CodeGenTarget &Target, CodeGenRegBank &Bank) { in runEnums()
173 EmitRegUnitPressure(raw_ostream &OS, const CodeGenRegBank &RegBank, in EmitRegUnitPressure()
631 CodeGenRegBank &RegBank, in emitComposeSubRegIndices()
701 CodeGenRegBank &RegBank, in emitComposeSubRegIndexLaneMask()
784 CodeGenRegBank &RegBank) { in runMCDesc()
1060 CodeGenRegBank &RegBank) { in runTargetHeader()
1127 CodeGenRegBank &RegBank){ in runTargetDesc()
1491 CodeGenRegBank &RegBank = Target.getRegBank(); in run()