29 AMDGPUInstrInfo::AMDGPUInstrInfo(TargetMachine &tm)  in AMDGPUInstrInfo()  function in AMDGPUInstrInfo
32 const AMDGPURegisterInfo &AMDGPUInstrInfo::getRegisterInfo() const {  in getRegisterInfo()
36 bool AMDGPUInstrInfo::isCoalescableExtInstr(const MachineInstr &MI,  in isCoalescableExtInstr()
43 unsigned AMDGPUInstrInfo::isLoadFromStackSlot(const MachineInstr *MI,  in isLoadFromStackSlot()
49 unsigned AMDGPUInstrInfo::isLoadFromStackSlotPostFE(const MachineInstr *MI,  in isLoadFromStackSlotPostFE()
55 bool AMDGPUInstrInfo::hasLoadFromStackSlot(const MachineInstr *MI,  in hasLoadFromStackSlot()
61 unsigned AMDGPUInstrInfo::isStoreFromStackSlot(const MachineInstr *MI,  in isStoreFromStackSlot()
66 unsigned AMDGPUInstrInfo::isStoreFromStackSlotPostFE(const MachineInstr *MI,  in isStoreFromStackSlotPostFE()
71 bool AMDGPUInstrInfo::hasStoreFromStackSlot(const MachineInstr *MI,  in hasStoreFromStackSlot()
79 AMDGPUInstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,  in convertToThreeAddress()
85 bool AMDGPUInstrInfo::getNextBranchInstr(MachineBasicBlock::iterator &iter,  in getNextBranchInstr()
122 AMDGPUInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,  in storeRegToStackSlot()
132 AMDGPUInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,  in loadRegFromStackSlot()
141 AMDGPUInstrInfo::foldMemoryOperandImpl(MachineFunction &MF,  in foldMemoryOperandImpl()
149 AMDGPUInstrInfo::foldMemoryOperandImpl(MachineFunction &MF,  in foldMemoryOperandImpl()
157 AMDGPUInstrInfo::canFoldMemoryOperand(const MachineInstr *MI,  in canFoldMemoryOperand()
164 AMDGPUInstrInfo::unfoldMemoryOperand(MachineFunction &MF, MachineInstr *MI,  in unfoldMemoryOperand()
173 AMDGPUInstrInfo::unfoldMemoryOperand(SelectionDAG &DAG, SDNode *N,  in unfoldMemoryOperand()
180 AMDGPUInstrInfo::getOpcodeAfterMemoryUnfold(unsigned Opc,  in getOpcodeAfterMemoryUnfold()
187 bool AMDGPUInstrInfo::shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2,  in shouldScheduleLoadsNear()
199 AMDGPUInstrInfo::ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond)  in ReverseBranchCondition()
204 void AMDGPUInstrInfo::insertNoop(MachineBasicBlock &MBB,  in insertNoop()
209 bool AMDGPUInstrInfo::isPredicated(const MachineInstr *MI) const {  in isPredicated()
214 AMDGPUInstrInfo::SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,  in SubsumesPredicate()
221 bool AMDGPUInstrInfo::DefinesPredicate(MachineInstr *MI,  in DefinesPredicate()
227 bool AMDGPUInstrInfo::isPredicable(MachineInstr *MI) const {  in isPredicable()
233 AMDGPUInstrInfo::isSafeToMoveRegClassDefs(const TargetRegisterClass *RC) const {  in isSafeToMoveRegClassDefs()
238 void AMDGPUInstrInfo::convertToISA(MachineInstr & MI, MachineFunction &MF,  in convertToISA()