Lines Matching refs:Op

278     const SDValue Op,  in computeMaskedBitsForTargetNode()  argument
287 switch (Op.getOpcode()) { in computeMaskedBitsForTargetNode()
291 Op.getOperand(1), in computeMaskedBitsForTargetNode()
297 Op.getOperand(0), in computeMaskedBitsForTargetNode()
317 AMDGPUTargetLowering::LowerSDIV(SDValue Op, SelectionDAG &DAG) const in LowerSDIV() argument
319 EVT OVT = Op.getValueType(); in LowerSDIV()
322 DST = LowerSDIV64(Op, DAG); in LowerSDIV()
324 DST = LowerSDIV32(Op, DAG); in LowerSDIV()
327 DST = LowerSDIV24(Op, DAG); in LowerSDIV()
329 DST = SDValue(Op.getNode(), 0); in LowerSDIV()
335 AMDGPUTargetLowering::LowerSREM(SDValue Op, SelectionDAG &DAG) const in LowerSREM() argument
337 EVT OVT = Op.getValueType(); in LowerSREM()
340 DST = LowerSREM64(Op, DAG); in LowerSREM()
342 DST = LowerSREM32(Op, DAG); in LowerSREM()
344 DST = LowerSREM16(Op, DAG); in LowerSREM()
346 DST = LowerSREM8(Op, DAG); in LowerSREM()
348 DST = SDValue(Op.getNode(), 0); in LowerSREM()
354 AMDGPUTargetLowering::LowerBUILD_VECTOR( SDValue Op, SelectionDAG &DAG ) const in LowerBUILD_VECTOR() argument
356 EVT VT = Op.getValueType(); in LowerBUILD_VECTOR()
361 DebugLoc DL = Op.getDebugLoc(); in LowerBUILD_VECTOR()
364 VT, Op.getOperand(0)); in LowerBUILD_VECTOR()
367 for (unsigned x = 1, y = Op.getNumOperands(); x < y; ++x) { in LowerBUILD_VECTOR()
368 if (Op.getOperand(0) != Op.getOperand(x)) { in LowerBUILD_VECTOR()
377 switch(Op.getNumOperands()) { in LowerBUILD_VECTOR()
382 fourth = Op.getOperand(3); in LowerBUILD_VECTOR()
387 Op.getValueType(), in LowerBUILD_VECTOR()
393 third = Op.getOperand(2); in LowerBUILD_VECTOR()
398 Op.getValueType(), in LowerBUILD_VECTOR()
404 second = Op.getOperand(1); in LowerBUILD_VECTOR()
409 Op.getValueType(), in LowerBUILD_VECTOR()
420 AMDGPUTargetLowering::LowerSIGN_EXTEND_INREG(SDValue Op, SelectionDAG &DAG) const in LowerSIGN_EXTEND_INREG() argument
422 SDValue Data = Op.getOperand(0); in LowerSIGN_EXTEND_INREG()
423 VTSDNode *BaseType = cast<VTSDNode>(Op.getOperand(1)); in LowerSIGN_EXTEND_INREG()
424 DebugLoc DL = Op.getDebugLoc(); in LowerSIGN_EXTEND_INREG()
446 Data = DAG.getSExtOrTrunc(Data, DL, Op.getOperand(0).getValueType()); in LowerSIGN_EXTEND_INREG()
474 AMDGPUTargetLowering::LowerBRCOND(SDValue Op, SelectionDAG &DAG) const in LowerBRCOND() argument
476 SDValue Chain = Op.getOperand(0); in LowerBRCOND()
477 SDValue Cond = Op.getOperand(1); in LowerBRCOND()
478 SDValue Jump = Op.getOperand(2); in LowerBRCOND()
482 Op.getDebugLoc(), in LowerBRCOND()
483 Op.getValueType(), in LowerBRCOND()
489 AMDGPUTargetLowering::LowerSDIV24(SDValue Op, SelectionDAG &DAG) const in LowerSDIV24() argument
491 DebugLoc DL = Op.getDebugLoc(); in LowerSDIV24()
492 EVT OVT = Op.getValueType(); in LowerSDIV24()
493 SDValue LHS = Op.getOperand(0); in LowerSDIV24()
494 SDValue RHS = Op.getOperand(1); in LowerSDIV24()
570 AMDGPUTargetLowering::LowerSDIV32(SDValue Op, SelectionDAG &DAG) const in LowerSDIV32() argument
572 DebugLoc DL = Op.getDebugLoc(); in LowerSDIV32()
573 EVT OVT = Op.getValueType(); in LowerSDIV32()
574 SDValue LHS = Op.getOperand(0); in LowerSDIV32()
575 SDValue RHS = Op.getOperand(1); in LowerSDIV32()
637 AMDGPUTargetLowering::LowerSDIV64(SDValue Op, SelectionDAG &DAG) const in LowerSDIV64() argument
639 return SDValue(Op.getNode(), 0); in LowerSDIV64()
643 AMDGPUTargetLowering::LowerSREM8(SDValue Op, SelectionDAG &DAG) const in LowerSREM8() argument
645 DebugLoc DL = Op.getDebugLoc(); in LowerSREM8()
646 EVT OVT = Op.getValueType(); in LowerSREM8()
653 SDValue LHS = DAG.getSExtOrTrunc(Op.getOperand(0), DL, INTTY); in LowerSREM8()
654 SDValue RHS = DAG.getSExtOrTrunc(Op.getOperand(1), DL, INTTY); in LowerSREM8()
661 AMDGPUTargetLowering::LowerSREM16(SDValue Op, SelectionDAG &DAG) const in LowerSREM16() argument
663 DebugLoc DL = Op.getDebugLoc(); in LowerSREM16()
664 EVT OVT = Op.getValueType(); in LowerSREM16()
671 SDValue LHS = DAG.getSExtOrTrunc(Op.getOperand(0), DL, INTTY); in LowerSREM16()
672 SDValue RHS = DAG.getSExtOrTrunc(Op.getOperand(1), DL, INTTY); in LowerSREM16()
679 AMDGPUTargetLowering::LowerSREM32(SDValue Op, SelectionDAG &DAG) const in LowerSREM32() argument
681 DebugLoc DL = Op.getDebugLoc(); in LowerSREM32()
682 EVT OVT = Op.getValueType(); in LowerSREM32()
683 SDValue LHS = Op.getOperand(0); in LowerSREM32()
684 SDValue RHS = Op.getOperand(1); in LowerSREM32()
742 AMDGPUTargetLowering::LowerSREM64(SDValue Op, SelectionDAG &DAG) const in LowerSREM64() argument
744 return SDValue(Op.getNode(), 0); in LowerSREM64()