Lines Matching refs:INT_ALIGNED
711 #define INT_ALIGNED 0x10000 macro
722 (((inst) & ~(INT_ALIGNED | UPDATE_REQ)) | (((flags) & MEM_MASK) <= GPR_REG ? D(reg) : FD(reg)))
731 /* u w n i s */ ARCH_32_64(HI(36) /* stw */, HI(62) | INT_ALIGNED | 0x0 /* std */),
732 /* u w n i l */ ARCH_32_64(HI(32) /* lwz */, HI(58) | INT_ALIGNED | 0x0 /* ld */),
736 /* u w w i s */ ARCH_32_64(HI(37) /* stwu */, HI(62) | INT_ALIGNED | 0x1 /* stdu */),
737 /* u w w i l */ ARCH_32_64(HI(33) /* lwzu */, HI(58) | INT_ALIGNED | 0x1 /* ldu */),
781 /* s w n i s */ ARCH_32_64(HI(36) /* stw */, HI(62) | INT_ALIGNED | 0x0 /* std */),
782 /* s w n i l */ ARCH_32_64(HI(32) /* lwz */, HI(58) | INT_ALIGNED | 0x0 /* ld */),
786 /* s w w i s */ ARCH_32_64(HI(37) /* stwu */, HI(62) | INT_ALIGNED | 0x1 /* stdu */),
787 /* s w w i l */ ARCH_32_64(HI(33) /* lwzu */, HI(58) | INT_ALIGNED | 0x1 /* ldu */),
818 /* s i n i l */ ARCH_32_64(HI(32) /* lwz */, HI(58) | INT_ALIGNED | 0x2 /* lwa */),
823 /* s i w i l */ ARCH_32_64(HI(33) /* lwzu */, HI(58) | INT_ALIGNED | UPDATE_REQ | 0x2 /* lwa */),
859 SLJIT_ASSERT(!(inst & (INT_ALIGNED | UPDATE_REQ))); in getput_arg_fast()
871 …if (argw > SIMM_MAX || argw < SIMM_MIN || ((inst & INT_ALIGNED) && (argw & 0x3)) || (inst & UPDATE… in getput_arg_fast()
884 SLJIT_ASSERT(!(inst & (INT_ALIGNED | UPDATE_REQ))); in getput_arg_fast()
934 if ((inst & INT_ALIGNED) && (imm & 0x3)) { \
979 SLJIT_ASSERT(!(inst & (INT_ALIGNED | UPDATE_REQ))); in getput_arg()
991 && (!(inst & INT_ALIGNED) || !(argw & 0x3)) && !(inst & UPDATE_REQ)) { in getput_arg()
1000 SLJIT_ASSERT(high_short && !(inst & (INT_ALIGNED | UPDATE_REQ))); in getput_arg()
1060 SLJIT_ASSERT(!(inst & (INT_ALIGNED | UPDATE_REQ))); in getput_arg()
1076 SLJIT_ASSERT(!(inst & (INT_ALIGNED | UPDATE_REQ))); in getput_arg()
1105 SLJIT_ASSERT(!(inst & (INT_ALIGNED | UPDATE_REQ))); in getput_arg()