Lines Matching defs:rt
619 void MacroAssembler::Addu(Register rd, Register rs, const Operand& rt) { in Addu()
635 void MacroAssembler::Daddu(Register rd, Register rs, const Operand& rt) { in Daddu()
651 void MacroAssembler::Subu(Register rd, Register rs, const Operand& rt) { in Subu()
668 void MacroAssembler::Dsubu(Register rd, Register rs, const Operand& rt) { in Dsubu()
686 void MacroAssembler::Mul(Register rd, Register rs, const Operand& rt) { in Mul()
698 void MacroAssembler::Mulh(Register rd, Register rs, const Operand& rt) { in Mulh()
720 void MacroAssembler::Mulhu(Register rd, Register rs, const Operand& rt) { in Mulhu()
742 void MacroAssembler::Dmul(Register rd, Register rs, const Operand& rt) { in Dmul()
764 void MacroAssembler::Dmulh(Register rd, Register rs, const Operand& rt) { in Dmulh()
786 void MacroAssembler::Mult(Register rs, const Operand& rt) { in Mult()
798 void MacroAssembler::Dmult(Register rs, const Operand& rt) { in Dmult()
810 void MacroAssembler::Multu(Register rs, const Operand& rt) { in Multu()
822 void MacroAssembler::Dmultu(Register rs, const Operand& rt) { in Dmultu()
834 void MacroAssembler::Div(Register rs, const Operand& rt) { in Div()
846 void MacroAssembler::Div(Register res, Register rs, const Operand& rt) { in Div()
868 void MacroAssembler::Mod(Register rd, Register rs, const Operand& rt) { in Mod()
890 void MacroAssembler::Modu(Register rd, Register rs, const Operand& rt) { in Modu()
912 void MacroAssembler::Ddiv(Register rs, const Operand& rt) { in Ddiv()
924 void MacroAssembler::Ddiv(Register rd, Register rs, const Operand& rt) { in Ddiv()
949 void MacroAssembler::Divu(Register rs, const Operand& rt) { in Divu()
961 void MacroAssembler::Divu(Register res, Register rs, const Operand& rt) { in Divu()
983 void MacroAssembler::Ddivu(Register rs, const Operand& rt) { in Ddivu()
995 void MacroAssembler::Ddivu(Register res, Register rs, const Operand& rt) { in Ddivu()
1017 void MacroAssembler::Dmod(Register rd, Register rs, const Operand& rt) { in Dmod()
1042 void MacroAssembler::Dmodu(Register rd, Register rs, const Operand& rt) { in Dmodu()
1067 void MacroAssembler::And(Register rd, Register rs, const Operand& rt) { in And()
1083 void MacroAssembler::Or(Register rd, Register rs, const Operand& rt) { in Or()
1099 void MacroAssembler::Xor(Register rd, Register rs, const Operand& rt) { in Xor()
1115 void MacroAssembler::Nor(Register rd, Register rs, const Operand& rt) { in Nor()
1127 void MacroAssembler::Neg(Register rs, const Operand& rt) { in Neg()
1136 void MacroAssembler::Slt(Register rd, Register rs, const Operand& rt) { in Slt()
1152 void MacroAssembler::Sltu(Register rd, Register rs, const Operand& rt) { in Sltu()
1168 void MacroAssembler::Ror(Register rd, Register rs, const Operand& rt) { in Ror()
1177 void MacroAssembler::Dror(Register rd, Register rs, const Operand& rt) { in Dror()
1191 void MacroAssembler::Lsa(Register rd, Register rt, Register rs, uint8_t sa, in Lsa()
1204 void MacroAssembler::Dlsa(Register rd, Register rt, Register rs, uint8_t sa, in Dlsa()
1492 void MacroAssembler::Ext(Register rt, in Ext()
1502 void MacroAssembler::Dext(Register rt, Register rs, uint16_t pos, in Dext()
1510 void MacroAssembler::Dextm(Register rt, Register rs, uint16_t pos, in Dextm()
1518 void MacroAssembler::Dextu(Register rt, Register rs, uint16_t pos, in Dextu()
1526 void MacroAssembler::Dins(Register rt, Register rs, uint16_t pos, in Dins()
1535 void MacroAssembler::Ins(Register rt, in Ins()
2117 void MacroAssembler::Movz(Register rd, Register rs, Register rt) { in Movz()
2129 void MacroAssembler::Movn(Register rd, Register rs, Register rt) { in Movn()
2326 #define BRANCH_ARGS_CHECK(cond, rs, rt) DCHECK( \ argument
2338 const Operand& rt, BranchDelaySlot bdslot) { in Branch()
2363 const Operand& rt, in Branch()
2444 static inline bool IsZero(const Operand& rt) { in IsZero()
2463 Register MacroAssembler::GetRtAsRegisterHelper(const Operand& rt, in GetRtAsRegisterHelper()
2479 const Operand& rt) { in BranchShortHelperR6()
2759 Register rs, const Operand& rt, in BranchShortHelper()
2896 Register rs, const Operand& rt, in BranchShortCheck()
2921 const Operand& rt, BranchDelaySlot bdslot) { in BranchShort()
2927 const Operand& rt, BranchDelaySlot bdslot) { in BranchShort()
2938 const Operand& rt, BranchDelaySlot bdslot) { in BranchAndLink()
2963 const Operand& rt, in BranchAndLink()
3029 const Operand& rt) { in BranchAndLinkShortHelperR6()
3186 const Operand& rt, in BranchAndLinkShortHelper()
3278 const Operand& rt, in BranchAndLinkShortCheck()
3305 const Operand& rt, in Jump()
3325 const Operand& rt, in Jump()
3343 const Operand& rt, in Jump()
3354 const Operand& rt, in Jump()
3365 const Operand& rt, in CallSize()
3386 const Operand& rt, in Call()
3417 const Operand& rt, in CallSize()
3428 const Operand& rt, in Call()
3449 const Operand& rt, in CallSize()
3462 const Operand& rt, in Call()
3481 const Operand& rt, in Ret()
5283 Register rs, Operand rt) { in Assert()
5309 Register rs, Operand rt) { in Check()