Lines Matching refs:X00
228 #define X00 BITS2(0,0) macro
7538 case X00: in math_WIDEN_LO_OR_HI_LANES()
7571 case X00: amt = 8; break; in math_WIDEN_EVEN_OR_ODD_LANES()
8280 if (op2 == X00) { in dis_AdvSIMD_TBL_TBX()
8542 if ((size == X00 || size == X10) in dis_AdvSIMD_across_lanes()
9340 vassert(size >= X00 && size <= X10); in dis_AdvSIMD_scalar_shift_by_imm()
9505 if (size == X00 || size == X11) return False; in dis_AdvSIMD_scalar_three_different()
9722 if (size == X00 || size == X11) return False; in dis_AdvSIMD_scalar_three_same()
10267 case X00: in dis_AdvSIMD_scalar_x_indexed_element()
10310 case X00: in dis_AdvSIMD_scalar_x_indexed_element()
11032 if (size == X00 || size == X11) return False; in dis_AdvSIMD_three_different()
11062 if (size != X00) return False; in dis_AdvSIMD_three_different()
11522 if (size == X00 || size == X11) return False; in dis_AdvSIMD_three_same()
11869 if (bitU == 0 && size == X00 && opcode == BITS5(0,0,0,0,1)) { in dis_AdvSIMD_two_reg_misc()
11960 if (size == X00 && opcode == BITS5(0,0,1,0,1)) { in dis_AdvSIMD_two_reg_misc()
12207 UInt nLanes = size == X00 ? 4 : 2; in dis_AdvSIMD_two_reg_misc()
12208 IRType srcTy = size == X00 ? Ity_F32 : Ity_F64; in dis_AdvSIMD_two_reg_misc()
12209 IROp opCvt = size == X00 ? Iop_F32toF16 : Iop_F64toF32; in dis_AdvSIMD_two_reg_misc()
12257 UInt nLanes = size == X00 ? 4 : 2; in dis_AdvSIMD_two_reg_misc()
12258 IRType srcTy = size == X00 ? Ity_F16 : Ity_F32; in dis_AdvSIMD_two_reg_misc()
12259 IROp opCvt = size == X00 ? Iop_F16toF32 : Iop_F32toF64; in dis_AdvSIMD_two_reg_misc()
12590 case X00: in dis_AdvSIMD_vector_x_indexed_elem()
12649 case X00: in dis_AdvSIMD_vector_x_indexed_elem()
12700 case X00: in dis_AdvSIMD_vector_x_indexed_elem()
12745 case X00: in dis_AdvSIMD_vector_x_indexed_elem()
12827 if (ty <= X01 && op == X00 in dis_AdvSIMD_fp_compare()
13040 || (ty == X00 && (opcode == BITS6(0,0,0,1,1,1) in dis_AdvSIMD_fp_data_proc_1_source()
13211 IRType ity = ty == X00 ? Ity_F32 : Ity_F64; in dis_AdvSIMD_fp_data_proc_2_source()
13243 IRType ity = ty == X00 ? Ity_F32 : Ity_F64; in dis_AdvSIMD_fp_data_proc_2_source()
13458 if (ty <= X01 && rm == X00 in dis_AdvSIMD_fp_to_from_fixedp_conv()
13651 if (ty <= X01 && rm == X00 && (op == BITS3(0,1,0) || op == BITS3(0,1,1))) { in dis_AdvSIMD_fp_to_from_int_conv()