Lines Matching refs:laneNo
1411 static Int offsetQRegLane ( UInt qregNo, IRType laneTy, UInt laneNo ) in offsetQRegLane() argument
1429 UInt minOff = laneNo * laneSzB; in offsetQRegLane()
1536 static void putQRegLane ( UInt qregNo, UInt laneNo, IRExpr* e ) in putQRegLane() argument
1539 Int off = offsetQRegLane(qregNo, laneTy, laneNo); in putQRegLane()
1553 static IRExpr* getQRegLane ( UInt qregNo, UInt laneNo, IRType laneTy ) in getQRegLane() argument
1555 Int off = offsetQRegLane(qregNo, laneTy, laneNo); in getQRegLane()
7600 IRTemp math_DUP_VEC_ELEM ( IRExpr* src, UInt size, UInt laneNo ) in math_DUP_VEC_ELEM() argument
7608 UInt ix = laneNo << size; in math_DUP_VEC_ELEM()
7656 IRTemp handle_DUP_VEC_ELEM ( /*OUT*/UInt* laneNo, in handle_DUP_VEC_ELEM() argument
7660 *laneNo = 0; in handle_DUP_VEC_ELEM()
7665 *laneNo = (imm5 >> 1) & 15; in handle_DUP_VEC_ELEM()
7670 *laneNo = (imm5 >> 2) & 7; in handle_DUP_VEC_ELEM()
7675 *laneNo = (imm5 >> 3) & 3; in handle_DUP_VEC_ELEM()
7680 *laneNo = (imm5 >> 4) & 1; in handle_DUP_VEC_ELEM()
7689 return math_DUP_VEC_ELEM(srcV, *laneSzLg2, *laneNo); in handle_DUP_VEC_ELEM()
8593 UInt laneNo = 0; in dis_AdvSIMD_copy() local
8596 IRTemp res = handle_DUP_VEC_ELEM(&laneNo, &laneSzLg2, &laneCh, in dis_AdvSIMD_copy()
8605 nameQReg128(dd), arT, nameQReg128(nn), laneCh, laneNo); in dis_AdvSIMD_copy()
8671 UInt laneNo = 16; in dis_AdvSIMD_copy() local
8675 laneNo = (imm5 >> 1) & 15; in dis_AdvSIMD_copy()
8680 laneNo = (imm5 >> 2) & 7; in dis_AdvSIMD_copy()
8685 laneNo = (imm5 >> 3) & 3; in dis_AdvSIMD_copy()
8690 laneNo = (imm5 >> 4) & 1; in dis_AdvSIMD_copy()
8695 vassert(laneNo < 16); in dis_AdvSIMD_copy()
8696 putQRegLane(dd, laneNo, src); in dis_AdvSIMD_copy()
8698 nameQReg128(dd), ts, laneNo, nameIReg64orZR(nn)); in dis_AdvSIMD_copy()
8735 UInt laneNo = 16; /* invalid */ in dis_AdvSIMD_copy() local
8739 laneNo = (imm5 >> 1) & 15; in dis_AdvSIMD_copy()
8740 IRExpr* lane = getQRegLane(nn, laneNo, Ity_I8); in dis_AdvSIMD_copy()
8746 laneNo = (imm5 >> 1) & 15; in dis_AdvSIMD_copy()
8747 IRExpr* lane = getQRegLane(nn, laneNo, Ity_I8); in dis_AdvSIMD_copy()
8753 laneNo = (imm5 >> 2) & 7; in dis_AdvSIMD_copy()
8754 IRExpr* lane = getQRegLane(nn, laneNo, Ity_I16); in dis_AdvSIMD_copy()
8760 laneNo = (imm5 >> 2) & 7; in dis_AdvSIMD_copy()
8761 IRExpr* lane = getQRegLane(nn, laneNo, Ity_I16); in dis_AdvSIMD_copy()
8767 laneNo = (imm5 >> 3) & 3; in dis_AdvSIMD_copy()
8768 IRExpr* lane = getQRegLane(nn, laneNo, Ity_I32); in dis_AdvSIMD_copy()
8774 laneNo = (imm5 >> 3) & 3; in dis_AdvSIMD_copy()
8775 IRExpr* lane = getQRegLane(nn, laneNo, Ity_I32); in dis_AdvSIMD_copy()
8781 laneNo = (imm5 >> 4) & 1; in dis_AdvSIMD_copy()
8782 IRExpr* lane = getQRegLane(nn, laneNo, Ity_I64); in dis_AdvSIMD_copy()
8789 vassert(laneNo < 16); in dis_AdvSIMD_copy()
8793 nameQReg128(nn), arTs, laneNo); in dis_AdvSIMD_copy()
9031 UInt laneNo = 16; /* invalid */ in dis_AdvSIMD_scalar_copy() local
9034 laneNo = (imm5 >> 1) & 15; in dis_AdvSIMD_scalar_copy()
9036 assign(w0, unop(Iop_8Uto64, getQRegLane(nn, laneNo, laneTy))); in dis_AdvSIMD_scalar_copy()
9040 laneNo = (imm5 >> 2) & 7; in dis_AdvSIMD_scalar_copy()
9042 assign(w0, unop(Iop_16Uto64, getQRegLane(nn, laneNo, laneTy))); in dis_AdvSIMD_scalar_copy()
9046 laneNo = (imm5 >> 3) & 3; in dis_AdvSIMD_scalar_copy()
9048 assign(w0, unop(Iop_32Uto64, getQRegLane(nn, laneNo, laneTy))); in dis_AdvSIMD_scalar_copy()
9052 laneNo = (imm5 >> 4) & 1; in dis_AdvSIMD_scalar_copy()
9054 assign(w0, getQRegLane(nn, laneNo, laneTy)); in dis_AdvSIMD_scalar_copy()
9061 vassert(laneNo < 16); in dis_AdvSIMD_scalar_copy()
9064 nameQRegLO(dd, laneTy), nameQReg128(nn), arTs, laneNo); in dis_AdvSIMD_scalar_copy()