Lines Matching refs:VexGuestMIPS64State

176             ret = offsetof(VexGuestMIPS64State, guest_r0); break;  in integerGuestRegOffset()
178 ret = offsetof(VexGuestMIPS64State, guest_r1); break; in integerGuestRegOffset()
180 ret = offsetof(VexGuestMIPS64State, guest_r2); break; in integerGuestRegOffset()
182 ret = offsetof(VexGuestMIPS64State, guest_r3); break; in integerGuestRegOffset()
184 ret = offsetof(VexGuestMIPS64State, guest_r4); break; in integerGuestRegOffset()
186 ret = offsetof(VexGuestMIPS64State, guest_r5); break; in integerGuestRegOffset()
188 ret = offsetof(VexGuestMIPS64State, guest_r6); break; in integerGuestRegOffset()
190 ret = offsetof(VexGuestMIPS64State, guest_r7); break; in integerGuestRegOffset()
192 ret = offsetof(VexGuestMIPS64State, guest_r8); break; in integerGuestRegOffset()
194 ret = offsetof(VexGuestMIPS64State, guest_r9); break; in integerGuestRegOffset()
196 ret = offsetof(VexGuestMIPS64State, guest_r10); break; in integerGuestRegOffset()
198 ret = offsetof(VexGuestMIPS64State, guest_r11); break; in integerGuestRegOffset()
200 ret = offsetof(VexGuestMIPS64State, guest_r12); break; in integerGuestRegOffset()
202 ret = offsetof(VexGuestMIPS64State, guest_r13); break; in integerGuestRegOffset()
204 ret = offsetof(VexGuestMIPS64State, guest_r14); break; in integerGuestRegOffset()
206 ret = offsetof(VexGuestMIPS64State, guest_r15); break; in integerGuestRegOffset()
208 ret = offsetof(VexGuestMIPS64State, guest_r16); break; in integerGuestRegOffset()
210 ret = offsetof(VexGuestMIPS64State, guest_r17); break; in integerGuestRegOffset()
212 ret = offsetof(VexGuestMIPS64State, guest_r18); break; in integerGuestRegOffset()
214 ret = offsetof(VexGuestMIPS64State, guest_r19); break; in integerGuestRegOffset()
216 ret = offsetof(VexGuestMIPS64State, guest_r20); break; in integerGuestRegOffset()
218 ret = offsetof(VexGuestMIPS64State, guest_r21); break; in integerGuestRegOffset()
220 ret = offsetof(VexGuestMIPS64State, guest_r22); break; in integerGuestRegOffset()
222 ret = offsetof(VexGuestMIPS64State, guest_r23); break; in integerGuestRegOffset()
224 ret = offsetof(VexGuestMIPS64State, guest_r24); break; in integerGuestRegOffset()
226 ret = offsetof(VexGuestMIPS64State, guest_r25); break; in integerGuestRegOffset()
228 ret = offsetof(VexGuestMIPS64State, guest_r26); break; in integerGuestRegOffset()
230 ret = offsetof(VexGuestMIPS64State, guest_r27); break; in integerGuestRegOffset()
232 ret = offsetof(VexGuestMIPS64State, guest_r28); break; in integerGuestRegOffset()
234 ret = offsetof(VexGuestMIPS64State, guest_r29); break; in integerGuestRegOffset()
236 ret = offsetof(VexGuestMIPS64State, guest_r30); break; in integerGuestRegOffset()
238 ret = offsetof(VexGuestMIPS64State, guest_r31); break; in integerGuestRegOffset()
249 #define OFFB_PC offsetof(VexGuestMIPS64State, guest_PC)
331 ret = offsetof(VexGuestMIPS64State, guest_f0); break; in floatGuestRegOffset()
333 ret = offsetof(VexGuestMIPS64State, guest_f1); break; in floatGuestRegOffset()
335 ret = offsetof(VexGuestMIPS64State, guest_f2); break; in floatGuestRegOffset()
337 ret = offsetof(VexGuestMIPS64State, guest_f3); break; in floatGuestRegOffset()
339 ret = offsetof(VexGuestMIPS64State, guest_f4); break; in floatGuestRegOffset()
341 ret = offsetof(VexGuestMIPS64State, guest_f5); break; in floatGuestRegOffset()
343 ret = offsetof(VexGuestMIPS64State, guest_f6); break; in floatGuestRegOffset()
345 ret = offsetof(VexGuestMIPS64State, guest_f7); break; in floatGuestRegOffset()
347 ret = offsetof(VexGuestMIPS64State, guest_f8); break; in floatGuestRegOffset()
349 ret = offsetof(VexGuestMIPS64State, guest_f9); break; in floatGuestRegOffset()
351 ret = offsetof(VexGuestMIPS64State, guest_f10); break; in floatGuestRegOffset()
353 ret = offsetof(VexGuestMIPS64State, guest_f11); break; in floatGuestRegOffset()
355 ret = offsetof(VexGuestMIPS64State, guest_f12); break; in floatGuestRegOffset()
357 ret = offsetof(VexGuestMIPS64State, guest_f13); break; in floatGuestRegOffset()
359 ret = offsetof(VexGuestMIPS64State, guest_f14); break; in floatGuestRegOffset()
361 ret = offsetof(VexGuestMIPS64State, guest_f15); break; in floatGuestRegOffset()
363 ret = offsetof(VexGuestMIPS64State, guest_f16); break; in floatGuestRegOffset()
365 ret = offsetof(VexGuestMIPS64State, guest_f17); break; in floatGuestRegOffset()
367 ret = offsetof(VexGuestMIPS64State, guest_f18); break; in floatGuestRegOffset()
369 ret = offsetof(VexGuestMIPS64State, guest_f19); break; in floatGuestRegOffset()
371 ret = offsetof(VexGuestMIPS64State, guest_f20); break; in floatGuestRegOffset()
373 ret = offsetof(VexGuestMIPS64State, guest_f21); break; in floatGuestRegOffset()
375 ret = offsetof(VexGuestMIPS64State, guest_f22); break; in floatGuestRegOffset()
377 ret = offsetof(VexGuestMIPS64State, guest_f23); break; in floatGuestRegOffset()
379 ret = offsetof(VexGuestMIPS64State, guest_f24); break; in floatGuestRegOffset()
381 ret = offsetof(VexGuestMIPS64State, guest_f25); break; in floatGuestRegOffset()
383 ret = offsetof(VexGuestMIPS64State, guest_f26); break; in floatGuestRegOffset()
385 ret = offsetof(VexGuestMIPS64State, guest_f27); break; in floatGuestRegOffset()
387 ret = offsetof(VexGuestMIPS64State, guest_f28); break; in floatGuestRegOffset()
389 ret = offsetof(VexGuestMIPS64State, guest_f29); break; in floatGuestRegOffset()
391 ret = offsetof(VexGuestMIPS64State, guest_f30); break; in floatGuestRegOffset()
393 ret = offsetof(VexGuestMIPS64State, guest_f31); break; in floatGuestRegOffset()
1069 return IRExpr_Get(offsetof(VexGuestMIPS64State, guest_HI), Ity_I64); in getHI()
1077 return IRExpr_Get(offsetof(VexGuestMIPS64State, guest_LO), Ity_I64); in getLO()
1085 return IRExpr_Get(offsetof(VexGuestMIPS64State, guest_FCSR), Ity_I32); in getFCSR()
1107 stmt(IRStmt_Put(offsetof(VexGuestMIPS64State, guest_FCSR), e)); in putFCSR()
1150 d->fxState[0].offset = offsetof(VexGuestMIPS64State, guest_FCSR); in calculateFCSR()
1173 d->fxState[0].offset = offsetof(VexGuestMIPS64State, guest_FCSR); in calculateFCSR()
1202 return IRExpr_Get(offsetof(VexGuestMIPS64State, guest_ULR), Ity_I64); in getULR()
1225 stmt(IRStmt_Put(offsetof(VexGuestMIPS64State, guest_LO), e)); in putLO()
1243 stmt(IRStmt_Put(offsetof(VexGuestMIPS64State, guest_HI), e)); in putHI()
1501 assign(rm_MIPS, binop(Iop_And32, IRExpr_Get(offsetof(VexGuestMIPS64State, in get_IR_roundingmode()
12124 putIReg(11, IRExpr_Get(offsetof(VexGuestMIPS64State, in disInstr_MIPS_WRK()
12150 stmt(IRStmt_Put(offsetof(VexGuestMIPS64State, guest_CMSTART), in disInstr_MIPS_WRK()
12152 stmt(IRStmt_Put(offsetof(VexGuestMIPS64State, guest_CMLEN), in disInstr_MIPS_WRK()
17188 stmt(IRStmt_Put(offsetof(VexGuestMIPS64State, guest_PC), in disInstr_MIPS_WRK()