Lines Matching refs:mode64
73 static Bool mode64 = False; variable
103 if (!mode64) in integerGuestRegOffset()
258 if (!mode64) in floatGuestRegOffset()
405 vassert(!mode64); in accumulatorGuestRegOffset()
464 t1 = newTemp(mode64 ? Ity_I64 : Ity_I32); \
465 if(!mode64) \
473 t1 = newTemp(mode64 ? Ity_I64 : Ity_I32); \
474 if(!mode64) \
1026 vassert(!mode64); in getAcc()
1035 vassert(!mode64); in getDSPControl()
1045 vassert(!mode64); in putDSPControl()
1058 return mode64 ? mkU64(0x0) : mkU32(0x0); in getIReg()
1060 IRType ty = mode64 ? Ity_I64 : Ity_I32; in getIReg()
1068 if (mode64) in getHI()
1076 if (mode64) in getLO()
1084 if (mode64) in getFCSR()
1094 if (mode64) in getByteFromReg()
1106 if (mode64) in putFCSR()
1149 if (mode64) in calculateFCSR()
1172 if (mode64) in calculateFCSR()
1201 if (mode64) in getULR()
1209 IRType ty = mode64 ? Ity_I64 : Ity_I32; in putIReg()
1224 if (mode64) { in putLO()
1242 if (mode64) { in putHI()
1261 vassert(!mode64); in putAcc()
1304 vassert(mode64); in narrowTo()
1308 vassert(mode64); in narrowTo()
1352 if (mode64) in dis_branch_likely()
1360 if (mode64) in dis_branch_likely()
1369 if (mode64) in dis_branch_likely()
1381 if (mode64) in dis_branch()
1393 if (mode64) in dis_branch()
1400 if (mode64) in dis_branch()
1500 if (mode64) in get_IR_roundingmode()
1543 IRType ty = mode64 ? Ity_I64 : Ity_I32; in dis_instr_shrt()
1562 vassert(mode64); in dis_instr_shrt()
1584 vassert(mode64); in dis_instr_shrt()
1638 vassert(mode64); in dis_instr_shrt()
1764 putHI(mkWidenFrom32(mode64 ? Ity_I64: Ity_I32, in dis_instr_CCondFmt()
1782 putLO(mkWidenFrom32(mode64 ? Ity_I64: Ity_I32, in dis_instr_CCondFmt()
2076 IRType ty = mode64 ? Ity_I64 : Ity_I32; in dis_instr_branch()
2077 IROp opSlt = mode64 ? Iop_CmpLT64S : Iop_CmpLT32S; in dis_instr_branch()
2108 assign(tmpLt, mode64 ? unop(Iop_1Uto64, mkexpr(tmpLtRes)) : in dis_instr_branch()
2124 assign(tmpLt, mode64 ? unop(Iop_1Uto64, mkexpr(tmpLtRes)) : in dis_instr_branch()
2139 assign(tmpLt, mode64 ? unop(Iop_1Uto64, mkexpr(tmpLtRes)) : in dis_instr_branch()
2158 assign(tmpRes, mode64 ? unop(Iop_1Uto64, in dis_instr_branch()
2248 IRType ty = mode64? Ity_I64 : Ity_I32; in dis_instr_CVM()
2435 if (mode64) in dis_instr_CVM()
2458 if(mode64) { in dis_instr_CVM()
2514 vassert(mode64); /*Caution! Only for Mode 64*/ in dis_instr_CVM()
2577 if (mode64) in dis_instr_CVM()
2589 if (mode64) in dis_instr_CVM()
2601 if (mode64) in dis_instr_CVM()
2613 if (mode64) in dis_instr_CVM()
2644 if (mode64) in dis_instr_CVM()
2653 vassert(mode64); /* Currently Implemented only for n64 */ in dis_instr_CVM()
2661 if (mode64) in dis_instr_CVM()
2679 if (mode64) in dis_instr_CVM()
2690 if (mode64) in dis_instr_CVM()
2853 vassert(!mode64); in disDSPInstr_MIPS_WRK()
3002 vassert(!mode64); in disDSPInstr_MIPS_WRK()
3010 vassert(!mode64); in disDSPInstr_MIPS_WRK()
3023 vassert(!mode64); in disDSPInstr_MIPS_WRK()
3040 vassert(!mode64); in disDSPInstr_MIPS_WRK()
3057 vassert(!mode64); in disDSPInstr_MIPS_WRK()
3074 vassert(!mode64); in disDSPInstr_MIPS_WRK()
3091 vassert(!mode64); in disDSPInstr_MIPS_WRK()
3170 vassert(!mode64); in disDSPInstr_MIPS_WRK()
3178 vassert(!mode64); in disDSPInstr_MIPS_WRK()
3187 vassert(!mode64); in disDSPInstr_MIPS_WRK()
3195 vassert(!mode64); in disDSPInstr_MIPS_WRK()
3203 vassert(!mode64); in disDSPInstr_MIPS_WRK()
3232 vassert(!mode64); in disDSPInstr_MIPS_WRK()
3300 vassert(!mode64); in disDSPInstr_MIPS_WRK()
3317 vassert(!mode64); in disDSPInstr_MIPS_WRK()
3334 vassert(!mode64); in disDSPInstr_MIPS_WRK()
3349 vassert(!mode64); in disDSPInstr_MIPS_WRK()
3369 vassert(!mode64); in disDSPInstr_MIPS_WRK()
3494 vassert(!mode64); in disDSPInstr_MIPS_WRK()
3629 vassert(!mode64); in disDSPInstr_MIPS_WRK()
3712 vassert(!mode64); in disDSPInstr_MIPS_WRK()
3807 vassert(!mode64); in disDSPInstr_MIPS_WRK()
3940 vassert(!mode64); in disDSPInstr_MIPS_WRK()
4071 vassert(!mode64); in disDSPInstr_MIPS_WRK()
4208 vassert(!mode64); in disDSPInstr_MIPS_WRK()
4356 vassert(!mode64); in disDSPInstr_MIPS_WRK()
4450 vassert(!mode64); in disDSPInstr_MIPS_WRK()
4557 vassert(!mode64); in disDSPInstr_MIPS_WRK()
4672 vassert(!mode64); in disDSPInstr_MIPS_WRK()
4792 vassert(!mode64); in disDSPInstr_MIPS_WRK()
4861 vassert(!mode64); in disDSPInstr_MIPS_WRK()
4867 putDSPControl(mode64 ? in disDSPInstr_MIPS_WRK()
4931 mode64 ? mkU32(0xFF000000) in disDSPInstr_MIPS_WRK()
4953 vassert(!mode64); in disDSPInstr_MIPS_WRK()
4984 vassert(!mode64); in disDSPInstr_MIPS_WRK()
5022 vassert(!mode64); in disDSPInstr_MIPS_WRK()
5061 vassert(!mode64); in disDSPInstr_MIPS_WRK()
5071 vassert(!mode64); in disDSPInstr_MIPS_WRK()
5081 vassert(!mode64); in disDSPInstr_MIPS_WRK()
5098 vassert(!mode64); in disDSPInstr_MIPS_WRK()
5189 vassert(!mode64); in disDSPInstr_MIPS_WRK()
5292 vassert(!mode64); in disDSPInstr_MIPS_WRK()
5394 vassert(!mode64); in disDSPInstr_MIPS_WRK()
5514 vassert(!mode64); in disDSPInstr_MIPS_WRK()
5611 vassert(!mode64); in disDSPInstr_MIPS_WRK()
5667 vassert(!mode64); in disDSPInstr_MIPS_WRK()
5724 vassert(!mode64); in disDSPInstr_MIPS_WRK()
5778 vassert(!mode64); in disDSPInstr_MIPS_WRK()
5831 vassert(!mode64); in disDSPInstr_MIPS_WRK()
5900 vassert(!mode64); in disDSPInstr_MIPS_WRK()
5969 vassert(!mode64); in disDSPInstr_MIPS_WRK()
6028 vassert(!mode64); in disDSPInstr_MIPS_WRK()
6084 vassert(!mode64); in disDSPInstr_MIPS_WRK()
6169 vassert(!mode64); in disDSPInstr_MIPS_WRK()
6254 vassert(!mode64); in disDSPInstr_MIPS_WRK()
6282 vassert(!mode64); in disDSPInstr_MIPS_WRK()
6323 vassert(!mode64); in disDSPInstr_MIPS_WRK()
6355 vassert(!mode64); in disDSPInstr_MIPS_WRK()
6379 vassert(!mode64); in disDSPInstr_MIPS_WRK()
6417 vassert(!mode64); in disDSPInstr_MIPS_WRK()
6455 vassert(!mode64); in disDSPInstr_MIPS_WRK()
6497 vassert(!mode64); in disDSPInstr_MIPS_WRK()
6537 vassert(!mode64); in disDSPInstr_MIPS_WRK()
6623 vassert(!mode64); in disDSPInstr_MIPS_WRK()
6716 vassert(!mode64); in disDSPInstr_MIPS_WRK()
6788 vassert(!mode64); in disDSPInstr_MIPS_WRK()
6865 vassert(!mode64); in disDSPInstr_MIPS_WRK()
6942 vassert(!mode64); in disDSPInstr_MIPS_WRK()
7001 vassert(!mode64); in disDSPInstr_MIPS_WRK()
7067 vassert(!mode64); in disDSPInstr_MIPS_WRK()
7132 vassert(!mode64); in disDSPInstr_MIPS_WRK()
7197 vassert(!mode64); in disDSPInstr_MIPS_WRK()
7225 vassert(!mode64); in disDSPInstr_MIPS_WRK()
7258 vassert(!mode64); in disDSPInstr_MIPS_WRK()
7291 vassert(!mode64); in disDSPInstr_MIPS_WRK()
7319 vassert(!mode64); in disDSPInstr_MIPS_WRK()
7336 vassert(!mode64); in disDSPInstr_MIPS_WRK()
7354 vassert(!mode64); in disDSPInstr_MIPS_WRK()
7566 vassert(!mode64); in disDSPInstr_MIPS_WRK()
7574 vassert(!mode64); in disDSPInstr_MIPS_WRK()
7641 vassert(!mode64); in disDSPInstr_MIPS_WRK()
7660 vassert(!mode64); in disDSPInstr_MIPS_WRK()
7692 vassert(!mode64); in disDSPInstr_MIPS_WRK()
7701 vassert(!mode64); in disDSPInstr_MIPS_WRK()
7795 vassert(!mode64); in disDSPInstr_MIPS_WRK()
7889 vassert(!mode64); in disDSPInstr_MIPS_WRK()
7991 vassert(!mode64); in disDSPInstr_MIPS_WRK()
8107 vassert(!mode64); in disDSPInstr_MIPS_WRK()
8165 vassert(!mode64); in disDSPInstr_MIPS_WRK()
8286 vassert(!mode64); in disDSPInstr_MIPS_WRK()
8326 vassert(!mode64); in disDSPInstr_MIPS_WRK()
8437 vassert(!mode64); in disDSPInstr_MIPS_WRK()
8507 vassert(!mode64); in disDSPInstr_MIPS_WRK()
8693 vassert(!mode64); in disDSPInstr_MIPS_WRK()
8771 vassert(!mode64); in disDSPInstr_MIPS_WRK()
8881 vassert(!mode64); in disDSPInstr_MIPS_WRK()
8903 vassert(!mode64); in disDSPInstr_MIPS_WRK()
9013 vassert(!mode64); in disDSPInstr_MIPS_WRK()
9041 vassert(!mode64); in disDSPInstr_MIPS_WRK()
9224 vassert(!mode64); in disDSPInstr_MIPS_WRK()
9256 vassert(!mode64); in disDSPInstr_MIPS_WRK()
9395 vassert(!mode64); in disDSPInstr_MIPS_WRK()
9439 vassert(!mode64); in disDSPInstr_MIPS_WRK()
9519 vassert(!mode64); in disDSPInstr_MIPS_WRK()
9538 vassert(!mode64); in disDSPInstr_MIPS_WRK()
9612 vassert(!mode64); in disDSPInstr_MIPS_WRK()
9636 vassert(!mode64); in disDSPInstr_MIPS_WRK()
9654 vassert(!mode64); in disDSPInstr_MIPS_WRK()
9694 vassert(!mode64); in disDSPInstr_MIPS_WRK()
9704 vassert(!mode64); in disDSPInstr_MIPS_WRK()
9714 vassert(!mode64); in disDSPInstr_MIPS_WRK()
9803 vassert(!mode64); in disDSPInstr_MIPS_WRK()
9891 vassert(!mode64); in disDSPInstr_MIPS_WRK()
9928 vassert(!mode64); in disDSPInstr_MIPS_WRK()
9936 vassert(!mode64); in disDSPInstr_MIPS_WRK()
9978 vassert(!mode64); in disDSPInstr_MIPS_WRK()
10020 vassert(!mode64); in disDSPInstr_MIPS_WRK()
10081 vassert(!mode64); in disDSPInstr_MIPS_WRK()
10171 vassert(!mode64); in disDSPInstr_MIPS_WRK()
10187 vassert(!mode64); in disDSPInstr_MIPS_WRK()
10203 vassert(!mode64); in disDSPInstr_MIPS_WRK()
10223 vassert(!mode64); in disDSPInstr_MIPS_WRK()
10243 vassert(!mode64); in disDSPInstr_MIPS_WRK()
10275 vassert(!mode64); in disDSPInstr_MIPS_WRK()
10316 vassert(!mode64); in disDSPInstr_MIPS_WRK()
10345 vassert(!mode64); in disDSPInstr_MIPS_WRK()
10374 vassert(!mode64); in disDSPInstr_MIPS_WRK()
10400 vassert(!mode64); in disDSPInstr_MIPS_WRK()
10434 vassert(!mode64); in disDSPInstr_MIPS_WRK()
10527 vassert(!mode64); in disDSPInstr_MIPS_WRK()
10621 vassert(!mode64); in disDSPInstr_MIPS_WRK()
10725 vassert(!mode64); in disDSPInstr_MIPS_WRK()
10755 vassert(!mode64); in disDSPInstr_MIPS_WRK()
10783 vassert(!mode64); in disDSPInstr_MIPS_WRK()
10812 vassert(!mode64); in disDSPInstr_MIPS_WRK()
10845 vassert(!mode64); in disDSPInstr_MIPS_WRK()
10942 vassert(!mode64); in disDSPInstr_MIPS_WRK()
11041 vassert(!mode64); in disDSPInstr_MIPS_WRK()
11073 vassert(!mode64); in disDSPInstr_MIPS_WRK()
11163 vassert(!mode64); in disDSPInstr_MIPS_WRK()
11253 vassert(!mode64); in disDSPInstr_MIPS_WRK()
11310 vassert(!mode64); in disDSPInstr_MIPS_WRK()
11367 vassert(!mode64); in disDSPInstr_MIPS_WRK()
11459 vassert(!mode64); in disDSPInstr_MIPS_WRK()
11553 vassert(!mode64); in disDSPInstr_MIPS_WRK()
11719 vassert(!mode64); in disDSPInstr_MIPS_WRK()
11892 vassert(!mode64); in disDSPInstr_MIPS_WRK()
11926 vassert(!mode64); in disDSPInstr_MIPS_WRK()
11971 vassert(!mode64); in disDSPInstr_MIPS_WRK()
12100 UInt word1 = mode64 ? 0xF8 : 0x342; in disInstr_MIPS_WRK()
12101 UInt word2 = mode64 ? 0x378 : 0x742; in disInstr_MIPS_WRK()
12102 UInt word3 = mode64 ? 0x778 : 0xC2; in disInstr_MIPS_WRK()
12103 UInt word4 = mode64 ? 0x4F8 : 0x4C2; in disInstr_MIPS_WRK()
12110 if (mode64) in disInstr_MIPS_WRK()
12123 if (mode64) in disInstr_MIPS_WRK()
12133 if (mode64) in disInstr_MIPS_WRK()
12149 if (mode64) { in disInstr_MIPS_WRK()
12194 IRType ty = mode64 ? Ity_I64 : Ity_I32; in disInstr_MIPS_WRK()
12203 if (mode64) { in disInstr_MIPS_WRK()
12219 if (mode64) in disInstr_MIPS_WRK()
12532 if (mode64) { in disInstr_MIPS_WRK()
12571 if (mode64) in disInstr_MIPS_WRK()
12595 if (mode64) in disInstr_MIPS_WRK()
12626 if (mode64) in disInstr_MIPS_WRK()
12837 vassert(mode64); in disInstr_MIPS_WRK()
13471 if (mode64) { in disInstr_MIPS_WRK()
13536 if (mode64) in disInstr_MIPS_WRK()
13545 if (mode64) in disInstr_MIPS_WRK()
13554 if (mode64) in disInstr_MIPS_WRK()
13563 if (mode64) in disInstr_MIPS_WRK()
13572 if (mode64) in disInstr_MIPS_WRK()
13591 assign(t2, binop(mode64 ? Iop_Add64 : Iop_Add32, getIReg(rs), in disInstr_MIPS_WRK()
13613 assign(t0, binop(mode64 ? Iop_Add64 : Iop_Add32, getIReg(rs), in disInstr_MIPS_WRK()
13650 assign(t0, binop(mode64 ? Iop_Add64 : Iop_Add32, getIReg(rs), in disInstr_MIPS_WRK()
13666 assign(t0, binop(mode64 ? Iop_Add64 : Iop_Add32, getIReg(rs), in disInstr_MIPS_WRK()
13786 if (mode64) { in disInstr_MIPS_WRK()
13861 if (mode64) { in disInstr_MIPS_WRK()
13931 vassert(mode64); in disInstr_MIPS_WRK()
14054 vassert(mode64); in disInstr_MIPS_WRK()
14189 if (mode64) { in disInstr_MIPS_WRK()
14316 if (mode64) { in disInstr_MIPS_WRK()
14463 if (mode64) { in disInstr_MIPS_WRK()
14479 if (mode64) { in disInstr_MIPS_WRK()
14542 if (mode64) { in disInstr_MIPS_WRK()
14604 if (mode64) { in disInstr_MIPS_WRK()
14670 if (mode64) { in disInstr_MIPS_WRK()
14805 if (mode64) { in disInstr_MIPS_WRK()
14824 if (mode64) { in disInstr_MIPS_WRK()
15128 if (mode64) { in disInstr_MIPS_WRK()
15272 if (mode64) in disInstr_MIPS_WRK()
15280 if (mode64) in disInstr_MIPS_WRK()
15559 if (mode64) { in disInstr_MIPS_WRK()
15582 if (mode64) { in disInstr_MIPS_WRK()
15687 mode64 ? IRConst_U64(guest_PC_curr_instr + 4) : in disInstr_MIPS_WRK()
15696 if (mode64) { in disInstr_MIPS_WRK()
15718 if (mode64) { in disInstr_MIPS_WRK()
15841 if (mode64) { in disInstr_MIPS_WRK()
15880 mode64 ? IRConst_U64(guest_PC_curr_instr + 4) : in disInstr_MIPS_WRK()
15889 if (mode64) { in disInstr_MIPS_WRK()
15898 if (mode64) { in disInstr_MIPS_WRK()
15907 if (mode64) { in disInstr_MIPS_WRK()
15916 if (mode64) { in disInstr_MIPS_WRK()
15925 if (mode64) in disInstr_MIPS_WRK()
15942 if (mode64) { in disInstr_MIPS_WRK()
15957 if (mode64) in disInstr_MIPS_WRK()
15967 if (mode64) in disInstr_MIPS_WRK()
15977 if (mode64) in disInstr_MIPS_WRK()
15990 if (mode64) { in disInstr_MIPS_WRK()
16002 if (mode64) { in disInstr_MIPS_WRK()
16021 if (mode64) { in disInstr_MIPS_WRK()
16045 if (mode64) { in disInstr_MIPS_WRK()
16079 if (mode64) { in disInstr_MIPS_WRK()
16102 if (mode64) { in disInstr_MIPS_WRK()
16113 if (mode64) in disInstr_MIPS_WRK()
16122 if (mode64) { in disInstr_MIPS_WRK()
16177 if (mode64) { in disInstr_MIPS_WRK()
16232 if (mode64) { in disInstr_MIPS_WRK()
16269 if (mode64) { in disInstr_MIPS_WRK()
16306 if (mode64) { in disInstr_MIPS_WRK()
16343 if (mode64) { in disInstr_MIPS_WRK()
16511 if (mode64) { in disInstr_MIPS_WRK()
16522 if (mode64) { in disInstr_MIPS_WRK()
16533 lastn = dis_branch_likely(binop(mode64 ? Iop_CmpNE64 : Iop_CmpNE32, in disInstr_MIPS_WRK()
16534 binop(mode64 ? Iop_And64 : Iop_And32, getIReg(rs), in disInstr_MIPS_WRK()
16535 mode64 ? mkU64(0x8000000000000000ULL) : mkU32(0x80000000)), in disInstr_MIPS_WRK()
16536 mode64 ? mkU64(0x8000000000000000ULL) : mkU32(0x80000000)), in disInstr_MIPS_WRK()
16542 lastn = dis_branch_likely(binop(mode64 ? Iop_CmpNE64 : Iop_CmpNE32, in disInstr_MIPS_WRK()
16543 binop(mode64 ? Iop_And64 : Iop_And32, getIReg(rs), in disInstr_MIPS_WRK()
16544 mode64 ? mkU64(0x8000000000000000ULL) : mkU32(0x80000000)), in disInstr_MIPS_WRK()
16545 mode64 ? mkU64(0x0) : mkU32(0x0)), imm); in disInstr_MIPS_WRK()
16550 if (mode64) { in disInstr_MIPS_WRK()
16561 putIReg(31, mode64 ? mkU64(guest_PC_curr_instr + 8) : in disInstr_MIPS_WRK()
16563 lastn = dis_branch_likely(binop(mode64 ? Iop_CmpNE64 : Iop_CmpNE32, in disInstr_MIPS_WRK()
16564 binop(mode64 ? Iop_And64 : Iop_And32, getIReg(rs), in disInstr_MIPS_WRK()
16565 mode64 ? mkU64(0x8000000000000000ULL) : mkU32(0x80000000)), in disInstr_MIPS_WRK()
16566 mode64 ? mkU64(0x8000000000000000ULL) : mkU32(0x80000000)), in disInstr_MIPS_WRK()
16572 if (mode64) { in disInstr_MIPS_WRK()
16583 if (mode64) { in disInstr_MIPS_WRK()
16601 if (mode64) { in disInstr_MIPS_WRK()
16622 if (mode64) { in disInstr_MIPS_WRK()
16643 if (mode64) { in disInstr_MIPS_WRK()
16660 if (mode64) { in disInstr_MIPS_WRK()
16677 if (mode64) { in disInstr_MIPS_WRK()
16694 if (mode64) { in disInstr_MIPS_WRK()
16711 vassert(!mode64); in disInstr_MIPS_WRK()
16730 if (mode64) in disInstr_MIPS_WRK()
16740 lastn = dis_branch_likely(binop(mode64 ? Iop_CmpNE64 : Iop_CmpNE32, in disInstr_MIPS_WRK()
16746 if (mode64) in disInstr_MIPS_WRK()
16756 lastn = dis_branch_likely(binop(mode64 ? Iop_CmpEQ64 : Iop_CmpEQ32, in disInstr_MIPS_WRK()
16762 if (mode64) in disInstr_MIPS_WRK()
16772 if (mode64) in disInstr_MIPS_WRK()
16782 if (mode64) in disInstr_MIPS_WRK()
16792 lastn = dis_branch_likely(unop(Iop_Not1, (binop(mode64 ? Iop_CmpLE64S : in disInstr_MIPS_WRK()
16793 Iop_CmpLE32S, getIReg(rs), mode64 ? in disInstr_MIPS_WRK()
16827 mode64 ? IRConst_U64(guest_PC_curr_instr + 4) : in disInstr_MIPS_WRK()
16836 if (mode64) { in disInstr_MIPS_WRK()
16846 if (mode64) { in disInstr_MIPS_WRK()
16855 if (mode64) { in disInstr_MIPS_WRK()
16864 if (mode64) { in disInstr_MIPS_WRK()
16873 if (mode64) in disInstr_MIPS_WRK()
16883 if (mode64) in disInstr_MIPS_WRK()
16937 vassert(mode64); in disInstr_MIPS_WRK()
16976 vassert(mode64); in disInstr_MIPS_WRK()
17023 if (mode64) in disInstr_MIPS_WRK()
17056 putIReg(rt, unop(mode64 ? Iop_1Uto64 : Iop_1Uto32, mkexpr(t2))); in disInstr_MIPS_WRK()
17187 if (mode64) { in disInstr_MIPS_WRK()
17207 if (mode64) in disInstr_MIPS_WRK()
17232 if (mode64) in disInstr_MIPS_WRK()
17255 if (mode64) in disInstr_MIPS_WRK()
17291 mode64 = guest_arch != VexArchMIPS32; in disInstr_MIPS()