Lines Matching refs:X110
2635 #define X110 BITS4(0, 1,1,0) macro
2956 *p++ = X_3_6_2_16_5(X110, X100101, X00, 0/*imm16*/, xD); in imm64_to_ireg()
2977 *p++ = X_3_6_2_16_5(X110, X100101, i, h[i], xD); in imm64_to_ireg()
3009 *p++ = X_3_6_2_16_5(X110, X100101, i, h[i], xD); in imm64_to_ireg_EXACTLY4()
3034 expected = X_3_6_2_16_5(X110, X100101, i, h[i], xD); in is_imm64_to_ireg_EXACTLY4()
3280 i->ARM64in.Arith.isAdd ? X100 : X110, in emit_ARM64Instr()
3327 case ARM64lo_XOR: opc = X110; break; in emit_ARM64Instr()
3391 *p++ = X_3_6_1_6_6_5_5(X110, X100110, in emit_ARM64Instr()
3395 *p++ = X_3_6_1_6_6_5_5(X110, X100110, 1, sh, 63, rN, rD); in emit_ARM64Instr()
3433 *p++ = X_3_8_5_6_5_5(X110, in emit_ARM64Instr()
3439 *p++ = X_3_8_5_6_5_5(X110, in emit_ARM64Instr()