Lines Matching refs:ARM64Instr_Logic

282    addInstr(env, ARM64Instr_Logic(dst, src, mask, ARM64lo_AND));  in widen_z_32_to_64()
432    addInstr(env, ARM64Instr_Logic(tL, tL, ril_two, ARM64lo_AND));  in set_FPCR_rounding_mode()
433    addInstr(env, ARM64Instr_Logic(tR, tR, ril_one, ARM64lo_AND));  in set_FPCR_rounding_mode()
434    addInstr(env, ARM64Instr_Logic(t3, tL, ARM64RIL_R(tR), ARM64lo_OR));  in set_FPCR_rounding_mode()
1533             addInstr(env, ARM64Instr_Logic(dst, argL, argR, lop));  in iselIntExpr_R_wrk()
1604          addInstr(env, ARM64Instr_Logic(hi32, hi32, ARM64RIL_R(lo32),  in iselIntExpr_R_wrk()
1805             addInstr(env, ARM64Instr_Logic(dst, dst, ARM64RIL_R(src),  in iselIntExpr_R_wrk()
1815             addInstr(env, ARM64Instr_Logic(dst, dst, ARM64RIL_R(src),  in iselIntExpr_R_wrk()
1828             addInstr(env, ARM64Instr_Logic(dst, dst, ARM64RIL_R(src),  in iselIntExpr_R_wrk()
1928                addInstr(env, ARM64Instr_Logic(dst, src, one, ARM64lo_AND));  in iselIntExpr_R_wrk()
2816                   addInstr(env, ARM64Instr_Logic(fpsr,  in iselV128Expr_wrk()
3491             addInstr(env, ARM64Instr_Logic(fpsr, fpsr, ril_one, ARM64lo_AND));  in iselV256Expr_wrk()
3826          addInstr(env, ARM64Instr_Logic(r_res, hregARM64_X0(), one,  in iselStmt()
3829          addInstr(env, ARM64Instr_Logic(r_res, r_res, one,  in iselStmt()