Lines Matching refs:ARM64Instr_Shift
292 addInstr(env, ARM64Instr_Shift(dst, src, n48, ARM64sh_SHL)); in widen_s_16_to_64()
293 addInstr(env, ARM64Instr_Shift(dst, dst, n48, ARM64sh_SAR)); in widen_s_16_to_64()
303 addInstr(env, ARM64Instr_Shift(dst, src, n48, ARM64sh_SHL)); in widen_z_16_to_64()
304 addInstr(env, ARM64Instr_Shift(dst, dst, n48, ARM64sh_SHR)); in widen_z_16_to_64()
314 addInstr(env, ARM64Instr_Shift(dst, src, n32, ARM64sh_SHL)); in widen_s_32_to_64()
315 addInstr(env, ARM64Instr_Shift(dst, dst, n32, ARM64sh_SAR)); in widen_s_32_to_64()
325 addInstr(env, ARM64Instr_Shift(dst, src, n56, ARM64sh_SHL)); in widen_s_8_to_64()
326 addInstr(env, ARM64Instr_Shift(dst, dst, n56, ARM64sh_SAR)); in widen_s_8_to_64()
334 addInstr(env, ARM64Instr_Shift(dst, src, n56, ARM64sh_SHL)); in widen_z_8_to_64()
335 addInstr(env, ARM64Instr_Shift(dst, dst, n56, ARM64sh_SHR)); in widen_z_8_to_64()
430 addInstr(env, ARM64Instr_Shift(tL, irrm, ARM64RI6_I6(1), ARM64sh_SHL)); in set_FPCR_rounding_mode()
431 addInstr(env, ARM64Instr_Shift(tR, irrm, ARM64RI6_I6(1), ARM64sh_SHR)); in set_FPCR_rounding_mode()
435 addInstr(env, ARM64Instr_Shift(t3, t3, ARM64RI6_I6(22), ARM64sh_SHL)); in set_FPCR_rounding_mode()
1549 addInstr(env, ARM64Instr_Shift(dst, argL, argR, sop)); in iselIntExpr_R_wrk()
1559 addInstr(env, ARM64Instr_Shift(dst, dst, argR, ARM64sh_SHR)); in iselIntExpr_R_wrk()
1602 addInstr(env, ARM64Instr_Shift(hi32, hi32s, ARM64RI6_I6(32), in iselIntExpr_R_wrk()
1817 addInstr(env, ARM64Instr_Shift(dst, dst, ARM64RI6_I6(63), in iselIntExpr_R_wrk()
1830 addInstr(env, ARM64Instr_Shift(dst, dst, ARM64RI6_I6(63), in iselIntExpr_R_wrk()
1865 addInstr(env, ARM64Instr_Shift(dst, dst, ARM64RI6_I6(63), in iselIntExpr_R_wrk()
1867 addInstr(env, ARM64Instr_Shift(dst, dst, ARM64RI6_I6(63), in iselIntExpr_R_wrk()
2812 addInstr(env, ARM64Instr_Shift(fpsr, fpsr, ARM64RI6_I6(27), in iselV128Expr_wrk()
3487 addInstr(env, ARM64Instr_Shift(fpsr, fpsr, ARM64RI6_I6(27), in iselV256Expr_wrk()