Lines Matching refs:vassert
117 vassert(tmp >= 0); in lookupIRTemp()
118 vassert(tmp < env->n_vregmap); in lookupIRTemp()
125 vassert(tmp >= 0); in lookupIRTempPair()
126 vassert(tmp < env->n_vregmap); in lookupIRTempPair()
127 vassert(! hregIsInvalid(env->vregmapHI[tmp])); in lookupIRTempPair()
234 vassert(off < (8 << 12)); /* otherwise it's unrepresentable */ in mk_baseblock_64bit_access_amode()
235 vassert((off & 7) == 0); /* ditto */ in mk_baseblock_64bit_access_amode()
242 vassert(off < (4 << 12)); /* otherwise it's unrepresentable */ in mk_baseblock_32bit_access_amode()
243 vassert((off & 3) == 0); /* ditto */ in mk_baseblock_32bit_access_amode()
250 vassert(off < (2 << 12)); /* otherwise it's unrepresentable */ in mk_baseblock_16bit_access_amode()
251 vassert((off & 1) == 0); /* ditto */ in mk_baseblock_16bit_access_amode()
258 vassert(off < (1 << 12)); /* otherwise it's unrepresentable */ in mk_baseblock_8bit_access_amode()
264 vassert(off < (1<<12)); in mk_baseblock_128bit_access_addr()
343 vassert(con->tag == Ico_U64); in isZeroU64()
383 vassert(typeOfIRExpr(env->type_env,mode) == Ity_I32); in set_FPCR_rounding_mode()
391 vassert(typeOfIRExpr(env->type_env, env->previous_rm) == Ity_I32); in set_FPCR_rounding_mode()
429 vassert(ril_one && ril_two); in set_FPCR_rounding_mode()
489 vassert(ARM64_N_ARGREGS == 8); in doHelperCall()
570 vassert(nBBPTRs == 0 || nBBPTRs == 1); in doHelperCall()
576 vassert(retTy == Ity_V128 || retTy == Ity_V256); in doHelperCall()
577 vassert(retTy != Ity_V256); // we don't handle that yet (if ever) in doHelperCall()
583 vassert(retTy != Ity_V128 && retTy != Ity_V256); in doHelperCall()
584 vassert(nVECRETs == 0); in doHelperCall()
655 vassert(0); //ATC in doHelperCall()
664 vassert(0); in doHelperCall()
693 vassert(0); //ATC in doHelperCall()
698 vassert(!hregIsInvalid(r_vecRetAddr)); in doHelperCall()
723 vassert(!(hregIsInvalid(tmpregs[i]))); in doHelperCall()
732 vassert(nextArgReg <= ARM64_N_ARGREGS); in doHelperCall()
736 vassert(nBBPTRs == 0 || nBBPTRs == 1); in doHelperCall()
737 vassert(nVECRETs == (retTy == Ity_V128 || retTy == Ity_V256) ? 1 : 0); in doHelperCall()
738 vassert(*stackAdjustAfterCall == 0); in doHelperCall()
739 vassert(is_RetLoc_INVALID(*retloc)); in doHelperCall()
753 vassert(0); // ATC in doHelperCall()
760 vassert(0); in doHelperCall()
847 vassert(sane_AMode(am)); in iselIntExpr_AMode()
855 vassert(ty == Ity_I64); in iselIntExpr_AMode_wrk()
863 default: vassert(0); in iselIntExpr_AMode_wrk()
925 vassert(ri->ARM64riA.I12.imm12 < 4096); in iselIntExpr_RIA()
926 vassert(ri->ARM64riA.I12.shift == 0 || ri->ARM64riA.I12.shift == 12); in iselIntExpr_RIA()
929 vassert(hregClass(ri->ARM64riA.R.reg) == HRcInt64); in iselIntExpr_RIA()
930 vassert(hregIsVirtual(ri->ARM64riA.R.reg)); in iselIntExpr_RIA()
941 vassert(ty == Ity_I64 || ty == Ity_I32); in iselIntExpr_RIA_wrk()
1008 vassert(width == 32 || width == 64); in CountLeadingZeros()
1020 vassert(width == 32 || width == 64); in CountTrailingZeros()
1032 vassert(width == 32 || width == 64); in CountSetBits()
1077 vassert(n != NULL && imm_s != NULL && imm_r != NULL); in isImmLogical()
1078 vassert(width == 32 || width == 64); in isImmLogical()
1176 vassert(n < 2 && imm_s < 64 && imm_r < 64); in mb_mkARM64RIL_I()
1188 vassert(ri->ARM64riL.I13.bitN < 2); in iselIntExpr_RIL()
1189 vassert(ri->ARM64riL.I13.immR < 64); in iselIntExpr_RIL()
1190 vassert(ri->ARM64riL.I13.immS < 64); in iselIntExpr_RIL()
1193 vassert(hregClass(ri->ARM64riL.R.reg) == HRcInt64); in iselIntExpr_RIL()
1194 vassert(hregIsVirtual(ri->ARM64riL.R.reg)); in iselIntExpr_RIL()
1205 vassert(ty == Ity_I64 || ty == Ity_I32); in iselIntExpr_RIL_wrk()
1211 vassert(e->Iex.Const.con->tag == Ico_U64); in iselIntExpr_RIL_wrk()
1214 vassert(ty == Ity_I32); in iselIntExpr_RIL_wrk()
1215 vassert(e->Iex.Const.con->tag == Ico_U32); in iselIntExpr_RIL_wrk()
1248 vassert(ri->ARM64ri6.I6.imm6 < 64); in iselIntExpr_RI6()
1249 vassert(ri->ARM64ri6.I6.imm6 > 0); in iselIntExpr_RI6()
1252 vassert(hregClass(ri->ARM64ri6.R.reg) == HRcInt64); in iselIntExpr_RI6()
1253 vassert(hregIsVirtual(ri->ARM64ri6.R.reg)); in iselIntExpr_RI6()
1264 vassert(ty == Ity_I64 || ty == Ity_I8); in iselIntExpr_RI6_wrk()
1298 vassert(cc != ARM64cc_NV); in iselCondCode()
1304 vassert(e); in iselCondCode_wrk()
1305 vassert(typeOfIRExpr(env->type_env,e) == Ity_I1); in iselCondCode_wrk()
1312 vassert(one); in iselCondCode_wrk()
1334 vassert(one); /* '1' must be representable */ in iselCondCode_wrk()
1437 vassert(hregClass(r) == HRcInt64); in iselIntExpr_R()
1438 vassert(hregIsVirtual(r)); in iselIntExpr_R()
1446 vassert(ty == Ity_I64 || ty == Ity_I32 || ty == Ity_I16 || ty == Ity_I8); in iselIntExpr_R_wrk()
1667 vassert(arg1con->tag == Ico_U32); // else ill-typed IR in iselIntExpr_R_wrk()
1915 vassert(0); in iselIntExpr_R_wrk()
1927 vassert(one); in iselIntExpr_R_wrk()
1993 vassert(ty == e->Iex.CCall.retty); in iselIntExpr_R_wrk()
2009 vassert(is_sane_RetLoc(rloc)); in iselIntExpr_R_wrk()
2010 vassert(rloc.pri == RLPri_Int); in iselIntExpr_R_wrk()
2011 vassert(addToSp == 0); in iselIntExpr_R_wrk()
2076 vassert(hregClass(*rHi) == HRcInt64); in iselInt128Expr()
2077 vassert(hregIsVirtual(*rHi)); in iselInt128Expr()
2078 vassert(hregClass(*rLo) == HRcInt64); in iselInt128Expr()
2079 vassert(hregIsVirtual(*rLo)); in iselInt128Expr()
2086 vassert(e); in iselInt128Expr_wrk()
2087 vassert(typeOfIRExpr(env->type_env,e) == Ity_I128); in iselInt128Expr_wrk()
2130 vassert(hregClass(r) == HRcVec128); in iselV128Expr()
2131 vassert(hregIsVirtual(r)); in iselV128Expr()
2139 vassert(e); in iselV128Expr_wrk()
2140 vassert(ty == Ity_V128); in iselV128Expr_wrk()
2148 vassert(e->Iex.Const.con->tag == Ico_V128); in iselV128Expr_wrk()
2190 vassert(ty == Ity_V128); in iselV128Expr_wrk()
2200 vassert(ty == Ity_V128); in iselV128Expr_wrk()
2285 default: vassert(0); in iselV128Expr_wrk()
2310 default: vassert(0); in iselV128Expr_wrk()
2568 default: vassert(0); in iselV128Expr_wrk()
2607 default: vassert(0); in iselV128Expr_wrk()
2664 default: vassert(0); in iselV128Expr_wrk()
2692 default: vassert(0); in iselV128Expr_wrk()
2798 vassert(0); in iselV128Expr_wrk()
2815 vassert(ril_one); in iselV128Expr_wrk()
2863 vassert(immB >= 1 && immB <= 15); in iselV128Expr_wrk()
2905 default: vassert(0); in iselV128Expr_wrk()
2987 vassert(hregClass(r) == HRcFlt64); in iselDblExpr()
2988 vassert(hregIsVirtual(r)); in iselDblExpr()
2996 vassert(e); in iselDblExpr_wrk()
2997 vassert(ty == Ity_F64); in iselDblExpr_wrk()
3016 vassert(sizeof(u) == 8); in iselDblExpr_wrk()
3025 vassert(e->Iex.Load.ty == Ity_F64); in iselDblExpr_wrk()
3098 default: vassert(0); in iselDblExpr_wrk()
3170 vassert(hregClass(r) == HRcFlt64); in iselFltExpr()
3171 vassert(hregIsVirtual(r)); in iselFltExpr()
3179 vassert(e); in iselFltExpr_wrk()
3180 vassert(ty == Ity_F32); in iselFltExpr_wrk()
3203 vassert(sizeof(u) == 4); in iselFltExpr_wrk()
3212 vassert(e->Iex.Load.ty == Ity_F32); in iselFltExpr_wrk()
3267 default: vassert(0); in iselFltExpr_wrk()
3289 default: vassert(0); in iselFltExpr_wrk()
3354 vassert(hregClass(r) == HRcFlt64); in iselF16Expr()
3355 vassert(hregIsVirtual(r)); in iselF16Expr()
3363 vassert(e); in iselF16Expr_wrk()
3364 vassert(ty == Ity_F16); in iselF16Expr_wrk()
3410 vassert(hregClass(*rHi) == HRcVec128); in iselV256Expr()
3411 vassert(hregClass(*rLo) == HRcVec128); in iselV256Expr()
3412 vassert(hregIsVirtual(*rHi)); in iselV256Expr()
3413 vassert(hregIsVirtual(*rLo)); in iselV256Expr()
3420 vassert(e); in iselV256Expr_wrk()
3422 vassert(ty == Ity_V256); in iselV256Expr_wrk()
3477 default: vassert(0); in iselV256Expr_wrk()
3490 vassert(ril_one); in iselV256Expr_wrk()
3726 vassert(is_sane_RetLoc(rloc)); in iselStmt()
3732 vassert(d->tmp == IRTemp_INVALID); in iselStmt()
3733 vassert(rloc.pri == RLPri_None); in iselStmt()
3734 vassert(addToSp == 0); in iselStmt()
3738 vassert(rloc.pri == RLPri_Int); in iselStmt()
3739 vassert(addToSp == 0); in iselStmt()
3751 vassert(rloc.pri == RLPri_V128SpRel); in iselStmt()
3752 vassert(rloc.spOff < 256); // stay sane in iselStmt()
3753 vassert(addToSp >= 16); // ditto in iselStmt()
3754 vassert(addToSp < 256); // ditto in iselStmt()
3767 vassert(0); in iselStmt()
3788 default: vassert(0); in iselStmt()
3809 default: vassert(0); in iselStmt()
3824 vassert(ty == Ity_I1); in iselStmt()
3825 vassert(one); in iselStmt()
3943 vassert(cdst->tag == Ico_U64); in iselNext()
4012 vassert(0); // are we expecting any other kind? in iselNext()
4039 vassert(arch_host == VexArchARM64); in iselSB_ARM64()
4042 vassert(archinfo_host->endness == VexEndnessLE); in iselSB_ARM64()
4045 vassert(sizeof(ARM64Instr) <= 32); in iselSB_ARM64()