143 void ppHRegARM ( HReg reg )  {  in ppHRegARM()
205 ARMAMode1* ARMAMode1_RI  ( HReg reg, Int simm13 ) {  in ARMAMode1_RI()
213 ARMAMode1* ARMAMode1_RRS ( HReg base, HReg index, UInt shift ) {  in ARMAMode1_RRS()
273 ARMAMode2* ARMAMode2_RI ( HReg reg, Int simm9 ) {  in ARMAMode2_RI()
281 ARMAMode2* ARMAMode2_RR ( HReg base, HReg index ) {  in ARMAMode2_RR()
339 ARMAModeV* mkARMAModeV ( HReg reg, Int simm11 ) {  in mkARMAModeV()
365 ARMAModeN *mkARMAModeN_RR ( HReg rN, HReg rM ) {  in mkARMAModeN_RR()
373 ARMAModeN *mkARMAModeN_R ( HReg rN ) {  in mkARMAModeN_R()
432 ARMRI84* ARMRI84_R ( HReg reg ) {  in ARMRI84_R()
487 ARMRI5* ARMRI5_R ( HReg reg ) {  in ARMRI5_R()
646 ARMNRS* mkARMNRS(ARMNRS_tag tag, HReg reg, UInt index)  in mkARMNRS()
1087                          HReg dst, HReg argL, ARMRI84* argR ) {  in ARMInstr_Alu()
1097                             HReg dst, HReg argL, ARMRI5* argR ) {  in ARMInstr_Shift()
1106 ARMInstr* ARMInstr_Unary ( ARMUnaryOp op, HReg dst, HReg src ) {  in ARMInstr_Unary()
1114 ARMInstr* ARMInstr_CmpOrTst ( Bool isCmp, HReg argL, ARMRI84* argR ) {  in ARMInstr_CmpOrTst()
1122 ARMInstr* ARMInstr_Mov ( HReg dst, ARMRI84* src ) {  in ARMInstr_Mov()
1129 ARMInstr* ARMInstr_Imm32  ( HReg dst, UInt imm32 ) {  in ARMInstr_Imm32()
1137                             Bool isLoad, HReg rD, ARMAMode1* amode ) {  in ARMInstr_LdSt32()
1149                             HReg rD, ARMAMode2* amode ) {  in ARMInstr_LdSt16()
1161                             Bool isLoad, HReg rD, ARMAMode1* amode ) {  in ARMInstr_LdSt8U()
1171 ARMInstr* ARMInstr_Ld8S ( ARMCondCode cc, HReg rD, ARMAMode2* amode ) {  in ARMInstr_Ld8S()
1190 ARMInstr* ARMInstr_XIndir ( HReg dstGA, ARMAMode1* amR15T,  in ARMInstr_XIndir()
1199 ARMInstr* ARMInstr_XAssisted ( HReg dstGA, ARMAMode1* amR15T,  in ARMInstr_XAssisted()
1209 ARMInstr* ARMInstr_CMov ( ARMCondCode cond, HReg dst, ARMRI84* src ) {  in ARMInstr_CMov()
1249 ARMInstr* ARMInstr_VLdStD ( Bool isLoad, HReg dD, ARMAModeV* am ) {  in ARMInstr_VLdStD()
1257 ARMInstr* ARMInstr_VLdStS ( Bool isLoad, HReg fD, ARMAModeV* am ) {  in ARMInstr_VLdStS()
1265 ARMInstr* ARMInstr_VAluD ( ARMVfpOp op, HReg dst, HReg argL, HReg argR ) {  in ARMInstr_VAluD()
1274 ARMInstr* ARMInstr_VAluS ( ARMVfpOp op, HReg dst, HReg argL, HReg argR ) {  in ARMInstr_VAluS()
1283 ARMInstr* ARMInstr_VUnaryD ( ARMVfpUnaryOp op, HReg dst, HReg src ) {  in ARMInstr_VUnaryD()
1291 ARMInstr* ARMInstr_VUnaryS ( ARMVfpUnaryOp op, HReg dst, HReg src ) {  in ARMInstr_VUnaryS()
1299 ARMInstr* ARMInstr_VCmpD ( HReg argL, HReg argR ) {  in ARMInstr_VCmpD()
1306 ARMInstr* ARMInstr_VCMovD ( ARMCondCode cond, HReg dst, HReg src ) {  in ARMInstr_VCMovD()
1315 ARMInstr* ARMInstr_VCMovS ( ARMCondCode cond, HReg dst, HReg src ) {  in ARMInstr_VCMovS()
1324 ARMInstr* ARMInstr_VCvtSD ( Bool sToD, HReg dst, HReg src ) {  in ARMInstr_VCvtSD()
1332 ARMInstr* ARMInstr_VXferD ( Bool toD, HReg dD, HReg rHi, HReg rLo ) {  in ARMInstr_VXferD()
1341 ARMInstr* ARMInstr_VXferS ( Bool toS, HReg fD, HReg rLo ) {  in ARMInstr_VXferS()
1350                             HReg dst, HReg src ) {  in ARMInstr_VCvtID()
1359 ARMInstr* ARMInstr_FPSCR ( Bool toFPSCR, HReg iReg ) {  in ARMInstr_FPSCR()
1377 ARMInstr* ARMInstr_NLdStQ ( Bool isLoad, HReg dQ, ARMAModeN *amode ) {  in ARMInstr_NLdStQ()
1386 ARMInstr* ARMInstr_NLdStD ( Bool isLoad, HReg dD, ARMAModeN *amode ) {  in ARMInstr_NLdStD()
1395 ARMInstr* ARMInstr_NUnary ( ARMNeonUnOp op, HReg dQ, HReg nQ,  in ARMInstr_NUnary()
1419 ARMInstr* ARMInstr_NDual ( ARMNeonDualOp op, HReg nQ, HReg mQ,  in ARMInstr_NDual()
1432                              HReg dst, HReg argL, HReg argR,  in ARMInstr_NBinary()
1445 ARMInstr* ARMInstr_NeonImm (HReg dst, ARMNImm* imm ) {  in ARMInstr_NeonImm()
1453 ARMInstr* ARMInstr_NCMovQ ( ARMCondCode cond, HReg dst, HReg src ) {  in ARMInstr_NCMovQ()
1464                             HReg dst, HReg argL, HReg argR,  in ARMInstr_NShift()
1477 ARMInstr* ARMInstr_NShl64 ( HReg dst, HReg src, UInt amt )  in ARMInstr_NShl64()
1504 ARMInstr* ARMInstr_Add32 ( HReg rD, HReg rN, UInt imm32 ) {  in ARMInstr_Add32()
2512 Bool isMove_ARMInstr ( const ARMInstr* i, HReg* src, HReg* dst )  in isMove_ARMInstr()
2557                     HReg rreg, Int offsetB, Bool mode64 )  in genSpill_ARM()
2574          HReg r8   = hregARM_R8();  /* baseblock */  in genSpill_ARM()
2575          HReg r12  = hregARM_R12(); /* spill temp */  in genSpill_ARM()
2576          HReg base = r8;  in genSpill_ARM()
2599          HReg r8  = hregARM_R8();  in genSpill_ARM()
2600          HReg r12 = hregARM_R12();  in genSpill_ARM()
2612                      HReg rreg, Int offsetB, Bool mode64 )  in genReload_ARM()
2629          HReg r8   = hregARM_R8();  /* baseblock */  in genReload_ARM()
2630          HReg r12  = hregARM_R12(); /* spill temp */  in genReload_ARM()
2631          HReg base = r8;  in genReload_ARM()
2654          HReg r8  = hregARM_R8();  in genReload_ARM()
2655          HReg r12 = hregARM_R12();  in genReload_ARM()
2671 static inline UInt iregEnc ( HReg r )  in iregEnc()
2681 static inline UInt dregEnc ( HReg r )  in dregEnc()
2691 static inline UInt fregEnc ( HReg r )  in fregEnc()
2701 static inline UInt qregEnc ( HReg r )  in qregEnc()
3070          HReg        rD;  in emit_ARMInstr()
3110          HReg        rD = i->ARMin.LdSt16.rD;  in emit_ARMInstr()
3117             HReg rN = am->ARMam2.RI.reg;  in emit_ARMInstr()
3159          HReg        rD = i->ARMin.Ld8S.rD;  in emit_ARMInstr()
3164             HReg rN = am->ARMam2.RI.reg;  in emit_ARMInstr()
4508          HReg regDreg = i->ARMin.NShl64.dst;  in emit_ARMInstr()
4509          HReg regMreg = i->ARMin.NShl64.src;  in emit_ARMInstr()