1027          if (i->ARMin.NBinary.op == ARMneon_VEXT)  in showARMNeonDataSize()
1029          if (i->ARMin.NBinary.op == ARMneon_VAND ||  in showARMNeonDataSize()
1030              i->ARMin.NBinary.op == ARMneon_VORR ||  in showARMNeonDataSize()
1031              i->ARMin.NBinary.op == ARMneon_VXOR)  in showARMNeonDataSize()
1033          return showARMNeonDataSize_wrk(i->ARMin.NBinary.size);  in showARMNeonDataSize()
1436    i->ARMin.NBinary.op   = op;  in ARMInstr_NBinary()
1437    i->ARMin.NBinary.argL = argL;  in ARMInstr_NBinary()
1438    i->ARMin.NBinary.argR = argR;  in ARMInstr_NBinary()
1439    i->ARMin.NBinary.dst  = dst;  in ARMInstr_NBinary()
1440    i->ARMin.NBinary.size = size;  in ARMInstr_NBinary()
1441    i->ARMin.NBinary.Q    = Q;  in ARMInstr_NBinary()
1948                     showARMNeonBinOp(i->ARMin.NBinary.op),  in ppARMInstr()
1949                     showARMNeonBinOpDataType(i->ARMin.NBinary.op),  in ppARMInstr()
1952          ppHRegARM(i->ARMin.NBinary.dst);  in ppARMInstr()
1954          ppHRegARM(i->ARMin.NBinary.argL);  in ppARMInstr()
1956          ppHRegARM(i->ARMin.NBinary.argR);  in ppARMInstr()
2276          addHRegUse(u, HRmWrite, i->ARMin.NBinary.dst);  in getRegUsage_ARMInstr()
2279          addHRegUse(u, HRmRead, i->ARMin.NBinary.argL);  in getRegUsage_ARMInstr()
2280          addHRegUse(u, HRmRead, i->ARMin.NBinary.argR);  in getRegUsage_ARMInstr()
2477          i->ARMin.NBinary.argL = lookupHRegRemap(m, i->ARMin.NBinary.argL);  in mapRegs_ARMInstr()
2478          i->ARMin.NBinary.argR = lookupHRegRemap(m, i->ARMin.NBinary.argR);  in mapRegs_ARMInstr()
2479          i->ARMin.NBinary.dst  = lookupHRegRemap(m, i->ARMin.NBinary.dst);  in mapRegs_ARMInstr()
4239          UInt Q = i->ARMin.NBinary.Q ? 1 : 0;  in emit_ARMInstr()
4240          UInt regD = (hregClass(i->ARMin.NBinary.dst) == HRcVec128)  in emit_ARMInstr()
4241                        ? (qregEnc(i->ARMin.NBinary.dst) << 1)  in emit_ARMInstr()
4242                        : dregEnc(i->ARMin.NBinary.dst);  in emit_ARMInstr()
4243          UInt regN = (hregClass(i->ARMin.NBinary.argL) == HRcVec128)  in emit_ARMInstr()
4244                        ? (qregEnc(i->ARMin.NBinary.argL) << 1)  in emit_ARMInstr()
4245                        : dregEnc(i->ARMin.NBinary.argL);  in emit_ARMInstr()
4246          UInt regM = (hregClass(i->ARMin.NBinary.argR) == HRcVec128)  in emit_ARMInstr()
4247                        ? (qregEnc(i->ARMin.NBinary.argR) << 1)  in emit_ARMInstr()
4248                        : dregEnc(i->ARMin.NBinary.argR);  in emit_ARMInstr()
4249          UInt sz1 = i->ARMin.NBinary.size >> 1;  in emit_ARMInstr()
4250          UInt sz2 = i->ARMin.NBinary.size & 1;  in emit_ARMInstr()
4258          switch (i->ARMin.NBinary.op) {  in emit_ARMInstr()
4340                if (i->ARMin.NBinary.size >= 16)  in emit_ARMInstr()
4343                                i->ARMin.NBinary.size & 0xf, BITS4(N,Q,M,0),  in emit_ARMInstr()