1035          if (i->ARMin.NUnary.op == ARMneon_COPY ||  in showARMNeonDataSize()
1036              i->ARMin.NUnary.op == ARMneon_NOT ||  in showARMNeonDataSize()
1037              i->ARMin.NUnary.op == ARMneon_VCVTF32toF16||  in showARMNeonDataSize()
1038              i->ARMin.NUnary.op == ARMneon_VCVTF16toF32||  in showARMNeonDataSize()
1039              i->ARMin.NUnary.op == ARMneon_VCVTFtoFixedS ||  in showARMNeonDataSize()
1040              i->ARMin.NUnary.op == ARMneon_VCVTFtoFixedU ||  in showARMNeonDataSize()
1041              i->ARMin.NUnary.op == ARMneon_VCVTFixedStoF ||  in showARMNeonDataSize()
1042              i->ARMin.NUnary.op == ARMneon_VCVTFixedUtoF ||  in showARMNeonDataSize()
1043              i->ARMin.NUnary.op == ARMneon_VCVTFtoS ||  in showARMNeonDataSize()
1044              i->ARMin.NUnary.op == ARMneon_VCVTFtoU ||  in showARMNeonDataSize()
1045              i->ARMin.NUnary.op == ARMneon_VCVTStoF ||  in showARMNeonDataSize()
1046              i->ARMin.NUnary.op == ARMneon_VCVTUtoF)  in showARMNeonDataSize()
1048          if (i->ARMin.NUnary.op == ARMneon_VQSHLNSS ||  in showARMNeonDataSize()
1049              i->ARMin.NUnary.op == ARMneon_VQSHLNUU ||  in showARMNeonDataSize()
1050              i->ARMin.NUnary.op == ARMneon_VQSHLNUS) {  in showARMNeonDataSize()
1052             size = i->ARMin.NUnary.size;  in showARMNeonDataSize()
1063          return showARMNeonDataSize_wrk(i->ARMin.NUnary.size);  in showARMNeonDataSize()
1399    i->ARMin.NUnary.op   = op;  in ARMInstr_NUnary()
1400    i->ARMin.NUnary.src  = nQ;  in ARMInstr_NUnary()
1401    i->ARMin.NUnary.dst  = dQ;  in ARMInstr_NUnary()
1402    i->ARMin.NUnary.size = size;  in ARMInstr_NUnary()
1403    i->ARMin.NUnary.Q    = Q;  in ARMInstr_NUnary()
1880                     showARMNeonUnOp(i->ARMin.NUnary.op),  in ppARMInstr()
1881                     showARMNeonUnOpDataType(i->ARMin.NUnary.op),  in ppARMInstr()
1883          ppHRegARM(i->ARMin.NUnary.dst);  in ppARMInstr()
1885          ppHRegARM(i->ARMin.NUnary.src);  in ppARMInstr()
1886          if (i->ARMin.NUnary.op == ARMneon_EQZ)  in ppARMInstr()
1888          if (i->ARMin.NUnary.op == ARMneon_VCVTFtoFixedS ||  in ppARMInstr()
1889              i->ARMin.NUnary.op == ARMneon_VCVTFtoFixedU ||  in ppARMInstr()
1890              i->ARMin.NUnary.op == ARMneon_VCVTFixedStoF ||  in ppARMInstr()
1891              i->ARMin.NUnary.op == ARMneon_VCVTFixedUtoF) {  in ppARMInstr()
1892             vex_printf(", #%u", i->ARMin.NUnary.size);  in ppARMInstr()
1894          if (i->ARMin.NUnary.op == ARMneon_VQSHLNSS ||  in ppARMInstr()
1895              i->ARMin.NUnary.op == ARMneon_VQSHLNUU ||  in ppARMInstr()
1896              i->ARMin.NUnary.op == ARMneon_VQSHLNUS) {  in ppARMInstr()
1898             size = i->ARMin.NUnary.size;  in ppARMInstr()
2253          addHRegUse(u, HRmWrite, i->ARMin.NUnary.dst);  in getRegUsage_ARMInstr()
2254          addHRegUse(u, HRmRead, i->ARMin.NUnary.src);  in getRegUsage_ARMInstr()
2454          i->ARMin.NUnary.src = lookupHRegRemap(m, i->ARMin.NUnary.src);  in mapRegs_ARMInstr()
2455          i->ARMin.NUnary.dst = lookupHRegRemap(m, i->ARMin.NUnary.dst);  in mapRegs_ARMInstr()
2538          if (i->ARMin.NUnary.op == ARMneon_COPY) {  in isMove_ARMInstr()
2539             *src = i->ARMin.NUnary.src;  in isMove_ARMInstr()
2540             *dst = i->ARMin.NUnary.dst;  in isMove_ARMInstr()
3989          UInt Q = i->ARMin.NUnary.Q ? 1 : 0;  in emit_ARMInstr()
3990          UInt regD = (hregClass(i->ARMin.NUnary.dst) == HRcVec128)  in emit_ARMInstr()
3991                        ? (qregEnc(i->ARMin.NUnary.dst) << 1)  in emit_ARMInstr()
3992                        : dregEnc(i->ARMin.NUnary.dst);  in emit_ARMInstr()
3995          UInt sz1 = i->ARMin.NUnary.size >> 1;  in emit_ARMInstr()
3996          UInt sz2 = i->ARMin.NUnary.size & 1;  in emit_ARMInstr()
3997          UInt sz = i->ARMin.NUnary.size;  in emit_ARMInstr()
4000          if (i->ARMin.NUnary.op != ARMneon_DUP) {  in emit_ARMInstr()
4001             regM = (hregClass(i->ARMin.NUnary.src) == HRcVec128)   in emit_ARMInstr()
4002                      ? (qregEnc(i->ARMin.NUnary.src) << 1)  in emit_ARMInstr()
4003                      : dregEnc(i->ARMin.NUnary.src);  in emit_ARMInstr()
4006             regM = iregEnc(i->ARMin.NUnary.src);  in emit_ARMInstr()
4011          switch (i->ARMin.NUnary.op) {  in emit_ARMInstr()
4073                sz1 = i->ARMin.NUnary.size == 0 ? 1 : 0;  in emit_ARMInstr()
4074                sz2 = i->ARMin.NUnary.size == 1 ? 1 : 0;  in emit_ARMInstr()