Lines Matching refs:XIndir
921 i->Min.XIndir.dstGA = dstGA; in MIPSInstr_XIndir()
922 i->Min.XIndir.amPC = amPC; in MIPSInstr_XIndir()
923 i->Min.XIndir.cond = cond; in MIPSInstr_XIndir()
1330 showMIPSCondCode(i->Min.XIndir.cond)); in ppMIPSInstr()
1331 ppHRegMIPS(i->Min.XIndir.dstGA, mode64); in ppMIPSInstr()
1333 ppMIPSAMode(i->Min.XIndir.amPC, mode64); in ppMIPSInstr()
1690 addHRegUse(u, HRmRead, i->Min.XIndir.dstGA); in getRegUsage_MIPSInstr()
1691 addRegUsage_MIPSAMode(u, i->Min.XIndir.amPC); in getRegUsage_MIPSInstr()
1848 mapReg(m, &i->Min.XIndir.dstGA); in mapRegs_MIPSInstr()
1849 mapRegs_MIPSAMode(m, i->Min.XIndir.amPC); in mapRegs_MIPSInstr()
3067 if (i->Min.XIndir.cond != MIPScc_AL) { in emit_MIPSInstr()
3068 vassert(i->Min.XIndir.cond != MIPScc_NV); in emit_MIPSInstr()
3076 iregNo(i->Min.XIndir.dstGA, mode64), in emit_MIPSInstr()
3077 i->Min.XIndir.amPC, mode64); in emit_MIPSInstr()
3088 if (i->Min.XIndir.cond != MIPScc_AL) { in emit_MIPSInstr()
3117 iregNo(i->Min.XIndir.dstGA, mode64), in emit_MIPSInstr()
3118 i->Min.XIndir.amPC, mode64); in emit_MIPSInstr()