Lines Matching refs:mode64
48 const RRegUniverse* getRRegUniverse_MIPS ( Bool mode64 ) in getRRegUniverse_MIPS() argument
60 UInt howNeeded = mode64 ? 2 : 1; in getRRegUniverse_MIPS()
69 ru->regs[ru->size++] = hregMIPS_GPR16(mode64); in getRRegUniverse_MIPS()
70 ru->regs[ru->size++] = hregMIPS_GPR17(mode64); in getRRegUniverse_MIPS()
71 ru->regs[ru->size++] = hregMIPS_GPR18(mode64); in getRRegUniverse_MIPS()
72 ru->regs[ru->size++] = hregMIPS_GPR19(mode64); in getRRegUniverse_MIPS()
73 ru->regs[ru->size++] = hregMIPS_GPR20(mode64); in getRRegUniverse_MIPS()
74 ru->regs[ru->size++] = hregMIPS_GPR21(mode64); in getRRegUniverse_MIPS()
75 ru->regs[ru->size++] = hregMIPS_GPR22(mode64); in getRRegUniverse_MIPS()
77 ru->regs[ru->size++] = hregMIPS_GPR12(mode64); in getRRegUniverse_MIPS()
78 ru->regs[ru->size++] = hregMIPS_GPR13(mode64); in getRRegUniverse_MIPS()
79 ru->regs[ru->size++] = hregMIPS_GPR14(mode64); in getRRegUniverse_MIPS()
80 ru->regs[ru->size++] = hregMIPS_GPR15(mode64); in getRRegUniverse_MIPS()
81 ru->regs[ru->size++] = hregMIPS_GPR24(mode64); in getRRegUniverse_MIPS()
83 ru->regs[ru->size++] = hregMIPS_F16(mode64); in getRRegUniverse_MIPS()
84 ru->regs[ru->size++] = hregMIPS_F18(mode64); in getRRegUniverse_MIPS()
85 ru->regs[ru->size++] = hregMIPS_F20(mode64); in getRRegUniverse_MIPS()
86 ru->regs[ru->size++] = hregMIPS_F22(mode64); in getRRegUniverse_MIPS()
87 ru->regs[ru->size++] = hregMIPS_F24(mode64); in getRRegUniverse_MIPS()
88 ru->regs[ru->size++] = hregMIPS_F26(mode64); in getRRegUniverse_MIPS()
89 ru->regs[ru->size++] = hregMIPS_F28(mode64); in getRRegUniverse_MIPS()
90 ru->regs[ru->size++] = hregMIPS_F30(mode64); in getRRegUniverse_MIPS()
91 if (!mode64) { in getRRegUniverse_MIPS()
93 ru->regs[ru->size++] = hregMIPS_D0(mode64); in getRRegUniverse_MIPS()
94 ru->regs[ru->size++] = hregMIPS_D1(mode64); in getRRegUniverse_MIPS()
95 ru->regs[ru->size++] = hregMIPS_D2(mode64); in getRRegUniverse_MIPS()
96 ru->regs[ru->size++] = hregMIPS_D3(mode64); in getRRegUniverse_MIPS()
97 ru->regs[ru->size++] = hregMIPS_D4(mode64); in getRRegUniverse_MIPS()
98 ru->regs[ru->size++] = hregMIPS_D5(mode64); in getRRegUniverse_MIPS()
99 ru->regs[ru->size++] = hregMIPS_D6(mode64); in getRRegUniverse_MIPS()
100 ru->regs[ru->size++] = hregMIPS_D7(mode64); in getRRegUniverse_MIPS()
106 ru->regs[ru->size++] = hregMIPS_HI(mode64); in getRRegUniverse_MIPS()
107 ru->regs[ru->size++] = hregMIPS_LO(mode64); in getRRegUniverse_MIPS()
108 ru->regs[ru->size++] = hregMIPS_GPR0(mode64); in getRRegUniverse_MIPS()
109 ru->regs[ru->size++] = hregMIPS_GPR1(mode64); in getRRegUniverse_MIPS()
110 ru->regs[ru->size++] = hregMIPS_GPR2(mode64); in getRRegUniverse_MIPS()
111 ru->regs[ru->size++] = hregMIPS_GPR3(mode64); in getRRegUniverse_MIPS()
112 ru->regs[ru->size++] = hregMIPS_GPR4(mode64); in getRRegUniverse_MIPS()
113 ru->regs[ru->size++] = hregMIPS_GPR5(mode64); in getRRegUniverse_MIPS()
114 ru->regs[ru->size++] = hregMIPS_GPR6(mode64); in getRRegUniverse_MIPS()
115 ru->regs[ru->size++] = hregMIPS_GPR7(mode64); in getRRegUniverse_MIPS()
116 ru->regs[ru->size++] = hregMIPS_GPR8(mode64); in getRRegUniverse_MIPS()
117 ru->regs[ru->size++] = hregMIPS_GPR9(mode64); in getRRegUniverse_MIPS()
118 ru->regs[ru->size++] = hregMIPS_GPR10(mode64); in getRRegUniverse_MIPS()
119 ru->regs[ru->size++] = hregMIPS_GPR11(mode64); in getRRegUniverse_MIPS()
120 ru->regs[ru->size++] = hregMIPS_GPR23(mode64); in getRRegUniverse_MIPS()
121 ru->regs[ru->size++] = hregMIPS_GPR25(mode64); in getRRegUniverse_MIPS()
122 ru->regs[ru->size++] = hregMIPS_GPR29(mode64); in getRRegUniverse_MIPS()
123 ru->regs[ru->size++] = hregMIPS_GPR31(mode64); in getRRegUniverse_MIPS()
132 void ppHRegMIPS(HReg reg, Bool mode64) in ppHRegMIPS() argument
527 void ppMIPSAMode(MIPSAMode * am, Bool mode64) in ppMIPSAMode() argument
535 ppHRegMIPS(am->Mam.IR.base, mode64); in ppMIPSAMode()
539 ppHRegMIPS(am->Mam.RR.base, mode64); in ppMIPSAMode()
541 ppHRegMIPS(am->Mam.RR.index, mode64); in ppMIPSAMode()
605 void ppMIPSRH(MIPSRH * op, Bool mode64) in ppMIPSRH() argument
616 ppHRegMIPS(op->Mrh.Reg.reg, mode64); in ppMIPSRH()
938 MIPSInstr *MIPSInstr_Load(UChar sz, HReg dst, MIPSAMode * src, Bool mode64) in MIPSInstr_Load() argument
948 vassert(mode64); in MIPSInstr_Load()
952 MIPSInstr *MIPSInstr_Store(UChar sz, MIPSAMode * dst, HReg src, Bool mode64) in MIPSInstr_Store() argument
962 vassert(mode64); in MIPSInstr_Store()
966 MIPSInstr *MIPSInstr_LoadL(UChar sz, HReg dst, MIPSAMode * src, Bool mode64) in MIPSInstr_LoadL() argument
976 vassert(mode64); in MIPSInstr_LoadL()
981 HReg expd, HReg data, Bool mode64) in MIPSInstr_Cas() argument
993 vassert(mode64); in MIPSInstr_Cas()
997 MIPSInstr *MIPSInstr_StoreC(UChar sz, MIPSAMode * dst, HReg src, Bool mode64) in MIPSInstr_StoreC() argument
1007 vassert(mode64); in MIPSInstr_StoreC()
1175 static void ppLoadImm(HReg dst, ULong imm, Bool mode64) in ppLoadImm() argument
1178 ppHRegMIPS(dst, mode64); in ppLoadImm()
1182 void ppMIPSInstr(const MIPSInstr * i, Bool mode64) in ppMIPSInstr() argument
1186 ppLoadImm(i->Min.LI.dst, i->Min.LI.imm, mode64); in ppMIPSInstr()
1194 ppHRegMIPS(i->Min.Alu.dst, mode64); in ppMIPSInstr()
1196 ppHRegMIPS(r_srcL, mode64); in ppMIPSInstr()
1198 ppMIPSRH(rh_srcR, mode64); in ppMIPSInstr()
1207 ppHRegMIPS(i->Min.Shft.dst, mode64); in ppMIPSInstr()
1209 ppHRegMIPS(r_srcL, mode64); in ppMIPSInstr()
1211 ppMIPSRH(rh_srcR, mode64); in ppMIPSInstr()
1216 ppHRegMIPS(i->Min.Unary.dst, mode64); in ppMIPSInstr()
1218 ppHRegMIPS(i->Min.Unary.src, mode64); in ppMIPSInstr()
1223 ppHRegMIPS(i->Min.Cmp.dst, mode64); in ppMIPSInstr()
1225 ppHRegMIPS(i->Min.Cmp.srcL, mode64); in ppMIPSInstr()
1227 ppHRegMIPS(i->Min.Cmp.srcR, mode64); in ppMIPSInstr()
1236 ppHRegMIPS(i->Min.Mul.dst, mode64); in ppMIPSInstr()
1238 ppHRegMIPS(i->Min.Mul.srcL, mode64); in ppMIPSInstr()
1240 ppHRegMIPS(i->Min.Mul.srcR, mode64); in ppMIPSInstr()
1245 ppHRegMIPS(i->Min.Mul.dst, mode64); in ppMIPSInstr()
1247 ppHRegMIPS(i->Min.Mul.srcL, mode64); in ppMIPSInstr()
1249 ppHRegMIPS(i->Min.Mul.srcR, mode64); in ppMIPSInstr()
1256 ppHRegMIPS(i->Min.MtHL.src, mode64); in ppMIPSInstr()
1261 ppHRegMIPS(i->Min.MtHL.src, mode64); in ppMIPSInstr()
1266 ppHRegMIPS(i->Min.MfHL.dst, mode64); in ppMIPSInstr()
1271 ppHRegMIPS(i->Min.MfHL.dst, mode64); in ppMIPSInstr()
1276 ppHRegMIPS(i->Min.Macc.srcL, mode64); in ppMIPSInstr()
1278 ppHRegMIPS(i->Min.Macc.srcR, mode64); in ppMIPSInstr()
1286 ppHRegMIPS(i->Min.Div.srcL, mode64); in ppMIPSInstr()
1288 ppHRegMIPS(i->Min.Div.srcR, mode64); in ppMIPSInstr()
1298 if (!mode64) in ppMIPSInstr()
1301 ppLoadImm(hregMIPS_GPR25(mode64), i->Min.Call.target, mode64); in ppMIPSInstr()
1312 if (!mode64) in ppMIPSInstr()
1323 ppMIPSAMode(i->Min.XDirect.amPC, mode64); in ppMIPSInstr()
1331 ppHRegMIPS(i->Min.XIndir.dstGA, mode64); in ppMIPSInstr()
1333 ppMIPSAMode(i->Min.XIndir.amPC, mode64); in ppMIPSInstr()
1341 ppHRegMIPS(i->Min.XAssisted.dstGA, mode64); in ppMIPSInstr()
1343 ppMIPSAMode(i->Min.XAssisted.amPC, mode64); in ppMIPSInstr()
1353 ppHRegMIPS(i->Min.Load.dst, mode64); in ppMIPSInstr()
1355 ppMIPSAMode(i->Min.Load.src, mode64); in ppMIPSInstr()
1363 ppHRegMIPS(i->Min.Store.src, mode64); in ppMIPSInstr()
1365 ppMIPSAMode(i->Min.Store.dst, mode64); in ppMIPSInstr()
1370 ppHRegMIPS(i->Min.LoadL.dst, mode64); in ppMIPSInstr()
1372 ppMIPSAMode(i->Min.LoadL.src, mode64); in ppMIPSInstr()
1390 ppHRegMIPS(i->Min.Cas.old , mode64); in ppMIPSInstr()
1392 ppHRegMIPS(i->Min.Cas.addr , mode64); in ppMIPSInstr()
1396 ppHRegMIPS(i->Min.Cas.old , mode64); in ppMIPSInstr()
1398 ppHRegMIPS(i->Min.Cas.expd , mode64); in ppMIPSInstr()
1404 ppHRegMIPS(i->Min.Cas.old , mode64); in ppMIPSInstr()
1406 ppHRegMIPS(i->Min.Cas.old , mode64); in ppMIPSInstr()
1410 ppHRegMIPS(i->Min.Cas.data , mode64); in ppMIPSInstr()
1412 ppHRegMIPS(i->Min.Cas.addr , mode64); in ppMIPSInstr()
1416 ppHRegMIPS(i->Min.Cas.old , mode64); in ppMIPSInstr()
1418 ppHRegMIPS(i->Min.Cas.expd , mode64); in ppMIPSInstr()
1420 ppHRegMIPS(i->Min.Cas.data , mode64); in ppMIPSInstr()
1426 ppHRegMIPS(i->Min.StoreC.src, mode64); in ppMIPSInstr()
1428 ppMIPSAMode(i->Min.StoreC.dst, mode64); in ppMIPSInstr()
1433 ppHRegMIPS(i->Min.RdWrLR.gpr, mode64); in ppMIPSInstr()
1438 ppHRegMIPS(i->Min.FpUnary.dst, mode64); in ppMIPSInstr()
1440 ppHRegMIPS(i->Min.FpUnary.src, mode64); in ppMIPSInstr()
1444 ppHRegMIPS(i->Min.FpBinary.dst, mode64); in ppMIPSInstr()
1446 ppHRegMIPS(i->Min.FpBinary.srcL, mode64); in ppMIPSInstr()
1448 ppHRegMIPS(i->Min.FpBinary.srcR, mode64); in ppMIPSInstr()
1452 ppHRegMIPS(i->Min.FpTernary.dst, mode64); in ppMIPSInstr()
1454 ppHRegMIPS(i->Min.FpTernary.src1, mode64); in ppMIPSInstr()
1456 ppHRegMIPS(i->Min.FpTernary.src2, mode64); in ppMIPSInstr()
1458 ppHRegMIPS(i->Min.FpTernary.src3, mode64); in ppMIPSInstr()
1462 ppHRegMIPS(i->Min.FpConvert.dst, mode64); in ppMIPSInstr()
1464 ppHRegMIPS(i->Min.FpConvert.src, mode64); in ppMIPSInstr()
1468 ppHRegMIPS(i->Min.FpCompare.srcL, mode64); in ppMIPSInstr()
1470 ppHRegMIPS(i->Min.FpCompare.srcR, mode64); in ppMIPSInstr()
1474 ppHRegMIPS(i->Min.FpMulAcc.dst, mode64); in ppMIPSInstr()
1476 ppHRegMIPS(i->Min.FpMulAcc.srcML, mode64); in ppMIPSInstr()
1478 ppHRegMIPS(i->Min.FpMulAcc.srcMR, mode64); in ppMIPSInstr()
1480 ppHRegMIPS(i->Min.FpMulAcc.srcAcc, mode64); in ppMIPSInstr()
1486 ppHRegMIPS(i->Min.FpLdSt.reg, mode64); in ppMIPSInstr()
1488 ppMIPSAMode(i->Min.FpLdSt.addr, mode64); in ppMIPSInstr()
1491 ppHRegMIPS(i->Min.FpLdSt.reg, mode64); in ppMIPSInstr()
1493 ppMIPSAMode(i->Min.FpLdSt.addr, mode64); in ppMIPSInstr()
1498 ppHRegMIPS(i->Min.FpLdSt.reg, mode64); in ppMIPSInstr()
1500 ppMIPSAMode(i->Min.FpLdSt.addr, mode64); in ppMIPSInstr()
1503 ppHRegMIPS(i->Min.FpLdSt.reg, mode64); in ppMIPSInstr()
1505 ppMIPSAMode(i->Min.FpLdSt.addr, mode64); in ppMIPSInstr()
1512 ppHRegMIPS(i->Min.MtFCSR.src, mode64); in ppMIPSInstr()
1518 ppHRegMIPS(i->Min.MfFCSR.dst, mode64); in ppMIPSInstr()
1524 ppHRegMIPS(i->Min.FpGpMove.dst, mode64); in ppMIPSInstr()
1526 ppHRegMIPS(i->Min.FpGpMove.src, mode64); in ppMIPSInstr()
1531 ppHRegMIPS(i->Min.MoveCond.dst, mode64); in ppMIPSInstr()
1533 ppHRegMIPS(i->Min.MoveCond.src, mode64); in ppMIPSInstr()
1535 ppHRegMIPS(i->Min.MoveCond.cond, mode64); in ppMIPSInstr()
1540 ppMIPSAMode(i->Min.EvCheck.amCounter, mode64); in ppMIPSInstr()
1543 ppMIPSAMode(i->Min.EvCheck.amCounter, mode64); in ppMIPSInstr()
1545 ppMIPSAMode(i->Min.EvCheck.amFailAddr, mode64); in ppMIPSInstr()
1549 if (mode64) in ppMIPSInstr()
1572 void getRegUsage_MIPSInstr(HRegUsage * u, const MIPSInstr * i, Bool mode64) in getRegUsage_MIPSInstr() argument
1605 addHRegUse(u, HRmWrite, hregMIPS_HI(mode64)); in getRegUsage_MIPSInstr()
1606 addHRegUse(u, HRmWrite, hregMIPS_LO(mode64)); in getRegUsage_MIPSInstr()
1611 addHRegUse(u, HRmRead, hregMIPS_HI(mode64)); in getRegUsage_MIPSInstr()
1612 addHRegUse(u, HRmRead, hregMIPS_LO(mode64)); in getRegUsage_MIPSInstr()
1622 addHRegUse(u, HRmModify, hregMIPS_HI(mode64)); in getRegUsage_MIPSInstr()
1623 addHRegUse(u, HRmModify, hregMIPS_LO(mode64)); in getRegUsage_MIPSInstr()
1628 addHRegUse(u, HRmWrite, hregMIPS_HI(mode64)); in getRegUsage_MIPSInstr()
1629 addHRegUse(u, HRmWrite, hregMIPS_LO(mode64)); in getRegUsage_MIPSInstr()
1640 addHRegUse(u, HRmWrite, hregMIPS_GPR1(mode64)); in getRegUsage_MIPSInstr()
1642 addHRegUse(u, HRmWrite, hregMIPS_GPR2(mode64)); in getRegUsage_MIPSInstr()
1643 addHRegUse(u, HRmWrite, hregMIPS_GPR3(mode64)); in getRegUsage_MIPSInstr()
1645 addHRegUse(u, HRmWrite, hregMIPS_GPR4(mode64)); in getRegUsage_MIPSInstr()
1646 addHRegUse(u, HRmWrite, hregMIPS_GPR5(mode64)); in getRegUsage_MIPSInstr()
1647 addHRegUse(u, HRmWrite, hregMIPS_GPR6(mode64)); in getRegUsage_MIPSInstr()
1648 addHRegUse(u, HRmWrite, hregMIPS_GPR7(mode64)); in getRegUsage_MIPSInstr()
1650 addHRegUse(u, HRmWrite, hregMIPS_GPR8(mode64)); in getRegUsage_MIPSInstr()
1651 addHRegUse(u, HRmWrite, hregMIPS_GPR9(mode64)); in getRegUsage_MIPSInstr()
1652 addHRegUse(u, HRmWrite, hregMIPS_GPR10(mode64)); in getRegUsage_MIPSInstr()
1653 addHRegUse(u, HRmWrite, hregMIPS_GPR11(mode64)); in getRegUsage_MIPSInstr()
1654 addHRegUse(u, HRmWrite, hregMIPS_GPR12(mode64)); in getRegUsage_MIPSInstr()
1655 addHRegUse(u, HRmWrite, hregMIPS_GPR13(mode64)); in getRegUsage_MIPSInstr()
1656 addHRegUse(u, HRmWrite, hregMIPS_GPR14(mode64)); in getRegUsage_MIPSInstr()
1657 addHRegUse(u, HRmWrite, hregMIPS_GPR15(mode64)); in getRegUsage_MIPSInstr()
1659 addHRegUse(u, HRmWrite, hregMIPS_GPR24(mode64)); in getRegUsage_MIPSInstr()
1660 addHRegUse(u, HRmWrite, hregMIPS_GPR25(mode64)); in getRegUsage_MIPSInstr()
1661 addHRegUse(u, HRmWrite, hregMIPS_GPR31(mode64)); in getRegUsage_MIPSInstr()
1666 if (argir & (1<<11)) addHRegUse(u, HRmRead, hregMIPS_GPR11(mode64)); in getRegUsage_MIPSInstr()
1667 if (argir & (1<<10)) addHRegUse(u, HRmRead, hregMIPS_GPR10(mode64)); in getRegUsage_MIPSInstr()
1668 if (argir & (1<<9)) addHRegUse(u, HRmRead, hregMIPS_GPR9(mode64)); in getRegUsage_MIPSInstr()
1669 if (argir & (1<<8)) addHRegUse(u, HRmRead, hregMIPS_GPR8(mode64)); in getRegUsage_MIPSInstr()
1670 if (argir & (1<<7)) addHRegUse(u, HRmRead, hregMIPS_GPR7(mode64)); in getRegUsage_MIPSInstr()
1671 if (argir & (1<<6)) addHRegUse(u, HRmRead, hregMIPS_GPR6(mode64)); in getRegUsage_MIPSInstr()
1672 if (argir & (1<<5)) addHRegUse(u, HRmRead, hregMIPS_GPR5(mode64)); in getRegUsage_MIPSInstr()
1673 if (argir & (1<<4)) addHRegUse(u, HRmRead, hregMIPS_GPR4(mode64)); in getRegUsage_MIPSInstr()
1780 ppMIPSInstr(i, mode64); in getRegUsage_MIPSInstr()
1792 void mapRegs_MIPSInstr(HRegRemap * m, MIPSInstr * i, Bool mode64) in mapRegs_MIPSInstr() argument
1940 ppMIPSInstr(i, mode64); in mapRegs_MIPSInstr()
1972 Int offsetB, Bool mode64) in genSpill_MIPS() argument
1978 am = MIPSAMode_IR(offsetB, GuestStatePointer(mode64)); in genSpill_MIPS()
1982 vassert(mode64); in genSpill_MIPS()
1983 *i1 = MIPSInstr_Store(8, am, rreg, mode64); in genSpill_MIPS()
1986 vassert(!mode64); in genSpill_MIPS()
1987 *i1 = MIPSInstr_Store(4, am, rreg, mode64); in genSpill_MIPS()
1990 vassert(!mode64); in genSpill_MIPS()
2004 Int offsetB, Bool mode64) in genReload_MIPS() argument
2008 am = MIPSAMode_IR(offsetB, GuestStatePointer(mode64)); in genReload_MIPS()
2012 vassert(mode64); in genReload_MIPS()
2013 *i1 = MIPSInstr_Load(8, rreg, am, mode64); in genReload_MIPS()
2016 vassert(!mode64); in genReload_MIPS()
2017 *i1 = MIPSInstr_Load(4, rreg, am, mode64); in genReload_MIPS()
2020 if (mode64) in genReload_MIPS()
2037 inline static UInt iregNo(HReg r, Bool mode64) in iregNo() argument
2040 vassert(hregClass(r) == (mode64 ? HRcInt64 : HRcInt32)); in iregNo()
2047 inline static UInt fregNo(HReg r, Bool mode64) in fregNo() argument
2170 Bool mode64) in doAMode_IR() argument
2176 rA = iregNo(am->Mam.IR.base, mode64); in doAMode_IR()
2210 Bool mode64) in doAMode_RR() argument
2215 rA = iregNo(am->Mam.RR.base, mode64); in doAMode_RR()
2216 rB = iregNo(am->Mam.RR.index, mode64); in doAMode_RR()
2233 if (mode64) { in doAMode_RR()
2262 static UChar *mkLoadImm(UChar * p, UInt r_dst, ULong imm, Bool mode64) in mkLoadImm() argument
2264 if (!mode64) { in mkLoadImm()
2285 vassert(mode64); in mkLoadImm()
2308 UInt r_dst, ULong imm, Bool mode64) in mkLoadImm_EXACTLY2or6() argument
2312 if (!mode64) { in mkLoadImm_EXACTLY2or6()
2321 if (!mode64) { in mkLoadImm_EXACTLY2or6()
2330 vassert(mode64); in mkLoadImm_EXACTLY2or6()
2350 UInt r_dst, ULong imm, Bool mode64 ) in isLoadImm_EXACTLY2or6() argument
2354 if (!mode64) { in isLoadImm_EXACTLY2or6()
2363 if (!mode64) { in isLoadImm_EXACTLY2or6()
2407 MIPSAMode* am, Bool mode64 ) in do_load_or_store_machine_word() argument
2412 if (mode64) { in do_load_or_store_machine_word()
2415 p = doAMode_IR(p, mode64 ? 55 : 35, reg, am, mode64); in do_load_or_store_machine_word()
2429 if (mode64) { in do_load_or_store_machine_word()
2432 p = doAMode_IR(p, mode64 ? 63 : 43, reg, am, mode64); in do_load_or_store_machine_word()
2450 MIPSAMode* am, Bool mode64 ) in do_load_or_store_word32() argument
2455 if (mode64) { in do_load_or_store_word32()
2458 p = doAMode_IR(p, 35, reg, am, mode64); in do_load_or_store_word32()
2472 if (mode64) { in do_load_or_store_word32()
2475 p = doAMode_IR(p, 43, reg, am, mode64); in do_load_or_store_word32()
2510 Bool mode64, in emit_MIPSInstr() argument
2523 p = mkLoadImm(p, iregNo(i->Min.LI.dst, mode64), i->Min.LI.imm, mode64); in emit_MIPSInstr()
2529 UInt r_dst = iregNo(i->Min.Alu.dst, mode64); in emit_MIPSInstr()
2530 UInt r_srcL = iregNo(i->Min.Alu.srcL, mode64); in emit_MIPSInstr()
2532 mode64); in emit_MIPSInstr()
2638 UInt r_dst = iregNo(i->Min.Shft.dst, mode64); in emit_MIPSInstr()
2639 UInt r_srcL = iregNo(i->Min.Shft.srcL, mode64); in emit_MIPSInstr()
2641 mode64); in emit_MIPSInstr()
2642 if (!mode64) in emit_MIPSInstr()
2732 UInt r_dst = iregNo(i->Min.Unary.dst, mode64); in emit_MIPSInstr()
2733 UInt r_src = iregNo(i->Min.Unary.src, mode64); in emit_MIPSInstr()
2757 UInt r_srcL = iregNo(i->Min.Cmp.srcL, mode64); in emit_MIPSInstr()
2758 UInt r_srcR = iregNo(i->Min.Cmp.srcR, mode64); in emit_MIPSInstr()
2759 UInt r_dst = iregNo(i->Min.Cmp.dst, mode64); in emit_MIPSInstr()
2804 UInt r_srcL = iregNo(i->Min.Mul.srcL, mode64); in emit_MIPSInstr()
2805 UInt r_srcR = iregNo(i->Min.Mul.srcR, mode64); in emit_MIPSInstr()
2806 UInt r_dst = iregNo(i->Min.Mul.dst, mode64); in emit_MIPSInstr()
2825 else if (mode64 && !sz32) in emit_MIPSInstr()
2835 UInt r_srcL = iregNo(i->Min.Macc.srcL, mode64); in emit_MIPSInstr()
2836 UInt r_srcR = iregNo(i->Min.Macc.srcR, mode64); in emit_MIPSInstr()
2875 UInt r_srcL = iregNo(i->Min.Div.srcL, mode64); in emit_MIPSInstr()
2876 UInt r_srcR = iregNo(i->Min.Div.srcR, mode64); in emit_MIPSInstr()
2897 UInt r_src = iregNo(i->Min.MtHL.src, mode64); in emit_MIPSInstr()
2903 UInt r_src = iregNo(i->Min.MtHL.src, mode64); in emit_MIPSInstr()
2909 UInt r_dst = iregNo(i->Min.MfHL.dst, mode64); in emit_MIPSInstr()
2915 UInt r_dst = iregNo(i->Min.MfHL.dst, mode64); in emit_MIPSInstr()
2921 UInt r_src = iregNo(i->Min.MtFCSR.src, mode64); in emit_MIPSInstr()
2928 UInt r_dst = iregNo(i->Min.MfFCSR.dst, mode64); in emit_MIPSInstr()
2959 if (!mode64) { in emit_MIPSInstr()
2965 p = mkLoadImm(p, r_dst, i->Min.Call.target, mode64); in emit_MIPSInstr()
2971 if (!mode64) { in emit_MIPSInstr()
2978 UInt r_src = iregNo(i->Min.Call.src, mode64); in emit_MIPSInstr()
3015 mode64); in emit_MIPSInstr()
3017 i->Min.XDirect.amPC, mode64); in emit_MIPSInstr()
3030 (Addr)disp_cp_chain_me, mode64); in emit_MIPSInstr()
3046 ptmp = mkFormI(ptmp, 35, GuestSP, 9, COND_OFFSET(mode64)); in emit_MIPSInstr()
3076 iregNo(i->Min.XIndir.dstGA, mode64), in emit_MIPSInstr()
3077 i->Min.XIndir.amPC, mode64); in emit_MIPSInstr()
3083 (Addr)disp_cp_xindir, mode64); in emit_MIPSInstr()
3096 ptmp = mkFormI(ptmp, 35, GuestSP, 9, COND_OFFSET(mode64)); in emit_MIPSInstr()
3117 iregNo(i->Min.XIndir.dstGA, mode64), in emit_MIPSInstr()
3118 i->Min.XIndir.amPC, mode64); in emit_MIPSInstr()
3149 p = mkLoadImm_EXACTLY2or6(p, /*r*/ GuestSP, trcval, mode64); in emit_MIPSInstr()
3153 (ULong)(Addr)disp_cp_xassisted, mode64); in emit_MIPSInstr()
3168 ptmp = mkFormI(ptmp, 35, GuestSP, 9, COND_OFFSET(mode64)); in emit_MIPSInstr()
3178 UInt r_dst = iregNo(i->Min.Load.dst, mode64); in emit_MIPSInstr()
3180 if (mode64 && (sz == 4 || sz == 8)) { in emit_MIPSInstr()
3196 vassert(mode64); in emit_MIPSInstr()
3202 p = doAMode_IR(p, opc, r_dst, am_addr, mode64); in emit_MIPSInstr()
3205 UInt r_dst = iregNo(i->Min.Load.dst, mode64); in emit_MIPSInstr()
3220 vassert(mode64); in emit_MIPSInstr()
3226 p = doAMode_RR(p, opc, r_dst, am_addr, mode64); in emit_MIPSInstr()
3235 UInt r_src = iregNo(i->Min.Store.src, mode64); in emit_MIPSInstr()
3237 if (mode64 && (sz == 4 || sz == 8)) { in emit_MIPSInstr()
3252 vassert(mode64); in emit_MIPSInstr()
3259 p = doAMode_IR(p, opc, r_src, am_addr, mode64); in emit_MIPSInstr()
3262 UInt r_src = iregNo(i->Min.Store.src, mode64); in emit_MIPSInstr()
3276 vassert(mode64); in emit_MIPSInstr()
3283 p = doAMode_RR(p, opc, r_src, am_addr, mode64); in emit_MIPSInstr()
3290 UInt r_src = iregNo(am_addr->Mam.IR.base, mode64); in emit_MIPSInstr()
3292 UInt r_dst = iregNo(i->Min.LoadL.dst, mode64); in emit_MIPSInstr()
3302 UInt r_src = iregNo(i->Min.StoreC.src, mode64); in emit_MIPSInstr()
3304 UInt r_dst = iregNo(am_addr->Mam.IR.base, mode64); in emit_MIPSInstr()
3315 UInt old = iregNo(i->Min.Cas.old, mode64); in emit_MIPSInstr()
3316 UInt addr = iregNo(i->Min.Cas.addr, mode64); in emit_MIPSInstr()
3317 UInt expd = iregNo(i->Min.Cas.expd, mode64); in emit_MIPSInstr()
3318 UInt data = iregNo(i->Min.Cas.data, mode64); in emit_MIPSInstr()
3346 UInt reg = iregNo(i->Min.RdWrLR.gpr, mode64); in emit_MIPSInstr()
3361 UInt f_reg = fregNo(i->Min.FpLdSt.reg, mode64); in emit_MIPSInstr()
3364 p = doAMode_IR(p, 0x31, f_reg, am_addr, mode64); in emit_MIPSInstr()
3366 p = doAMode_RR(p, 0x31, f_reg, am_addr, mode64); in emit_MIPSInstr()
3369 p = doAMode_IR(p, 0x39, f_reg, am_addr, mode64); in emit_MIPSInstr()
3371 p = doAMode_RR(p, 0x39, f_reg, am_addr, mode64); in emit_MIPSInstr()
3377 p = doAMode_IR(p, 0x35, f_reg, am_addr, mode64); in emit_MIPSInstr()
3379 p = doAMode_RR(p, 0x35, f_reg, am_addr, mode64); in emit_MIPSInstr()
3383 p = doAMode_IR(p, 0x3d, f_reg, am_addr, mode64); in emit_MIPSInstr()
3385 p = doAMode_RR(p, 0x3d, f_reg, am_addr, mode64); in emit_MIPSInstr()
3395 UInt fr_dst = fregNo(i->Min.FpUnary.dst, mode64); in emit_MIPSInstr()
3396 UInt fr_src = fregNo(i->Min.FpUnary.src, mode64); in emit_MIPSInstr()
3407 UInt fr_dst = fregNo(i->Min.FpUnary.dst, mode64); in emit_MIPSInstr()
3408 UInt fr_src = fregNo(i->Min.FpUnary.src, mode64); in emit_MIPSInstr()
3419 UInt fr_dst = fregNo(i->Min.FpUnary.dst, mode64); in emit_MIPSInstr()
3420 UInt fr_src = fregNo(i->Min.FpUnary.src, mode64); in emit_MIPSInstr()
3431 UInt fr_dst = fregNo(i->Min.FpUnary.dst, mode64); in emit_MIPSInstr()
3432 UInt fr_src = fregNo(i->Min.FpUnary.src, mode64); in emit_MIPSInstr()
3451 UInt fr_dst = fregNo(i->Min.FpBinary.dst, mode64); in emit_MIPSInstr()
3452 UInt fr_srcL = fregNo(i->Min.FpBinary.srcL, mode64); in emit_MIPSInstr()
3453 UInt fr_srcR = fregNo(i->Min.FpBinary.srcR, mode64); in emit_MIPSInstr()
3458 UInt fr_dst = fregNo(i->Min.FpBinary.dst, mode64); in emit_MIPSInstr()
3459 UInt fr_srcL = fregNo(i->Min.FpBinary.srcL, mode64); in emit_MIPSInstr()
3460 UInt fr_srcR = fregNo(i->Min.FpBinary.srcR, mode64); in emit_MIPSInstr()
3465 UInt fr_dst = fregNo(i->Min.FpBinary.dst, mode64); in emit_MIPSInstr()
3466 UInt fr_srcL = fregNo(i->Min.FpBinary.srcL, mode64); in emit_MIPSInstr()
3467 UInt fr_srcR = fregNo(i->Min.FpBinary.srcR, mode64); in emit_MIPSInstr()
3472 UInt fr_dst = fregNo(i->Min.FpBinary.dst, mode64); in emit_MIPSInstr()
3473 UInt fr_srcL = fregNo(i->Min.FpBinary.srcL, mode64); in emit_MIPSInstr()
3474 UInt fr_srcR = fregNo(i->Min.FpBinary.srcR, mode64); in emit_MIPSInstr()
3515 UInt fr_dst = fregNo(i->Min.FpTernary.dst, mode64); in emit_MIPSInstr()
3516 UInt fr_src1 = fregNo(i->Min.FpTernary.src1, mode64); in emit_MIPSInstr()
3517 UInt fr_src2 = fregNo(i->Min.FpTernary.src2, mode64); in emit_MIPSInstr()
3518 UInt fr_src3 = fregNo(i->Min.FpTernary.src3, mode64); in emit_MIPSInstr()
3531 UInt fr_dst = fregNo(i->Min.FpTernary.dst, mode64); in emit_MIPSInstr()
3532 UInt fr_src1 = fregNo(i->Min.FpTernary.src1, mode64); in emit_MIPSInstr()
3533 UInt fr_src2 = fregNo(i->Min.FpTernary.src2, mode64); in emit_MIPSInstr()
3534 UInt fr_src3 = fregNo(i->Min.FpTernary.src3, mode64); in emit_MIPSInstr()
3556 fr_dst = fregNo(i->Min.FpConvert.dst, mode64); in emit_MIPSInstr()
3561 fr_dst = fregNo(i->Min.FpConvert.dst, mode64); in emit_MIPSInstr()
3562 fr_src = fregNo(i->Min.FpConvert.src, mode64); in emit_MIPSInstr()
3566 fr_dst = fregNo(i->Min.FpConvert.dst, mode64); in emit_MIPSInstr()
3571 fr_dst = fregNo(i->Min.FpConvert.dst, mode64); in emit_MIPSInstr()
3572 fr_src = fregNo(i->Min.FpConvert.src, mode64); in emit_MIPSInstr()
3577 fr_src = fregNo(i->Min.FpConvert.src, mode64); in emit_MIPSInstr()
3587 fr_src = fregNo(i->Min.FpConvert.src, mode64); in emit_MIPSInstr()
3592 fr_src = fregNo(i->Min.FpConvert.src, mode64); in emit_MIPSInstr()
3596 if (mode64) { in emit_MIPSInstr()
3597 fr_dst = fregNo(i->Min.FpConvert.dst, mode64); in emit_MIPSInstr()
3601 fr_src = fregNo(i->Min.FpConvert.src, mode64); in emit_MIPSInstr()
3611 fr_dst = fregNo(i->Min.FpConvert.dst, mode64); in emit_MIPSInstr()
3612 fr_src = fregNo(i->Min.FpConvert.src, mode64); in emit_MIPSInstr()
3616 fr_dst = fregNo(i->Min.FpConvert.dst, mode64); in emit_MIPSInstr()
3621 fr_dst = fregNo(i->Min.FpConvert.dst, mode64); in emit_MIPSInstr()
3631 fr_dst = fregNo(i->Min.FpConvert.dst, mode64); in emit_MIPSInstr()
3632 fr_src = fregNo(i->Min.FpConvert.src, mode64); in emit_MIPSInstr()
3636 fr_dst = fregNo(i->Min.FpConvert.dst, mode64); in emit_MIPSInstr()
3642 fr_src = fregNo(i->Min.FpConvert.src, mode64); in emit_MIPSInstr()
3651 fr_dst = fregNo(i->Min.FpConvert.dst, mode64); in emit_MIPSInstr()
3652 fr_src = fregNo(i->Min.FpConvert.src, mode64); in emit_MIPSInstr()
3656 fr_dst = fregNo(i->Min.FpConvert.dst, mode64); in emit_MIPSInstr()
3666 fr_dst = fregNo(i->Min.FpConvert.dst, mode64); in emit_MIPSInstr()
3667 fr_src = fregNo(i->Min.FpConvert.src, mode64); in emit_MIPSInstr()
3671 fr_dst = fregNo(i->Min.FpConvert.dst, mode64); in emit_MIPSInstr()
3688 UInt r_dst = iregNo(i->Min.FpCompare.dst, mode64); in emit_MIPSInstr()
3724 rt = iregNo(i->Min.FpGpMove.dst, mode64); in emit_MIPSInstr()
3725 fs = fregNo(i->Min.FpGpMove.src, mode64); in emit_MIPSInstr()
3730 vassert(mode64); in emit_MIPSInstr()
3731 rt = iregNo(i->Min.FpGpMove.dst, mode64); in emit_MIPSInstr()
3732 fs = fregNo(i->Min.FpGpMove.src, mode64); in emit_MIPSInstr()
3737 rt = iregNo(i->Min.FpGpMove.src, mode64); in emit_MIPSInstr()
3738 fs = fregNo(i->Min.FpGpMove.dst, mode64); in emit_MIPSInstr()
3743 vassert(mode64); in emit_MIPSInstr()
3744 rt = iregNo(i->Min.FpGpMove.src, mode64); in emit_MIPSInstr()
3745 fs = fregNo(i->Min.FpGpMove.dst, mode64); in emit_MIPSInstr()
3759 d = fregNo(i->Min.MoveCond.dst, mode64); in emit_MIPSInstr()
3760 s = fregNo(i->Min.MoveCond.src, mode64); in emit_MIPSInstr()
3761 t = iregNo(i->Min.MoveCond.cond, mode64); in emit_MIPSInstr()
3768 t = iregNo(i->Min.MoveCond.cond, mode64); in emit_MIPSInstr()
3773 d = iregNo(i->Min.MoveCond.dst, mode64); in emit_MIPSInstr()
3774 s = iregNo(i->Min.MoveCond.src, mode64); in emit_MIPSInstr()
3775 t = iregNo(i->Min.MoveCond.cond, mode64); in emit_MIPSInstr()
3800 i->Min.EvCheck.amCounter, mode64); in emit_MIPSInstr()
3805 i->Min.EvCheck.amCounter, mode64); in emit_MIPSInstr()
3810 i->Min.EvCheck.amFailAddr, mode64); in emit_MIPSInstr()
3826 if (mode64) { in emit_MIPSInstr()
3893 ppMIPSInstr(i, mode64); in emit_MIPSInstr()
3915 Bool mode64 ) in chainXDirect_MIPS() argument
3931 mode64)); in chainXDirect_MIPS()
3932 vassert(fetch32(p + (mode64 ? 24 : 8) + 0) == 0x120F809); in chainXDirect_MIPS()
3933 vassert(fetch32(p + (mode64 ? 24 : 8) + 4) == 0x00000000); in chainXDirect_MIPS()
3947 (Addr)place_to_jump_to, mode64); in chainXDirect_MIPS()
3952 vassert(len == (mode64 ? 32 : 16)); /* stay sane */ in chainXDirect_MIPS()
3963 Bool mode64 ) in unchainXDirect_MIPS() argument
3979 mode64)); in unchainXDirect_MIPS()
3980 vassert(fetch32(p + (mode64 ? 24 : 8) + 0) == 0x120F809); in unchainXDirect_MIPS()
3981 vassert(fetch32(p + (mode64 ? 24 : 8) + 4) == 0x00000000); in unchainXDirect_MIPS()
3993 (Addr)disp_cp_chain_me, mode64); in unchainXDirect_MIPS()
3998 vassert(len == (mode64 ? 32 : 16)); /* stay sane */ in unchainXDirect_MIPS()
4008 Bool mode64 ) in patchProfInc_MIPS() argument
4011 if (mode64) { in patchProfInc_MIPS()
4019 mode64 ? 0x6555655565556555ULL : 0x65556555, in patchProfInc_MIPS()
4020 mode64)); in patchProfInc_MIPS()
4022 if (mode64) { in patchProfInc_MIPS()
4037 (Addr)location_of_counter, mode64); in patchProfInc_MIPS()