Lines Matching refs:mode64
55 ST_IN HReg hregMIPS_GPR16 ( Bool mode64 ) { return GPR(mode64, 16, 0, 0); } in hregMIPS_GPR16() argument
56 ST_IN HReg hregMIPS_GPR17 ( Bool mode64 ) { return GPR(mode64, 17, 1, 1); } in hregMIPS_GPR17() argument
57 ST_IN HReg hregMIPS_GPR18 ( Bool mode64 ) { return GPR(mode64, 18, 2, 2); } in hregMIPS_GPR18() argument
58 ST_IN HReg hregMIPS_GPR19 ( Bool mode64 ) { return GPR(mode64, 19, 3, 3); } in hregMIPS_GPR19() argument
59 ST_IN HReg hregMIPS_GPR20 ( Bool mode64 ) { return GPR(mode64, 20, 4, 4); } in hregMIPS_GPR20() argument
60 ST_IN HReg hregMIPS_GPR21 ( Bool mode64 ) { return GPR(mode64, 21, 5, 5); } in hregMIPS_GPR21() argument
61 ST_IN HReg hregMIPS_GPR22 ( Bool mode64 ) { return GPR(mode64, 22, 6, 6); } in hregMIPS_GPR22() argument
63 ST_IN HReg hregMIPS_GPR12 ( Bool mode64 ) { return GPR(mode64, 12, 7, 7); } in hregMIPS_GPR12() argument
64 ST_IN HReg hregMIPS_GPR13 ( Bool mode64 ) { return GPR(mode64, 13, 8, 8); } in hregMIPS_GPR13() argument
65 ST_IN HReg hregMIPS_GPR14 ( Bool mode64 ) { return GPR(mode64, 14, 9, 9); } in hregMIPS_GPR14() argument
66 ST_IN HReg hregMIPS_GPR15 ( Bool mode64 ) { return GPR(mode64, 15, 10, 10); } in hregMIPS_GPR15() argument
67 ST_IN HReg hregMIPS_GPR24 ( Bool mode64 ) { return GPR(mode64, 24, 11, 11); } in hregMIPS_GPR24() argument
69 ST_IN HReg hregMIPS_F16 ( Bool mode64 ) { return FR (mode64, 16, 12, 12); } in hregMIPS_F16() argument
70 ST_IN HReg hregMIPS_F18 ( Bool mode64 ) { return FR (mode64, 18, 13, 13); } in hregMIPS_F18() argument
71 ST_IN HReg hregMIPS_F20 ( Bool mode64 ) { return FR (mode64, 20, 14, 14); } in hregMIPS_F20() argument
72 ST_IN HReg hregMIPS_F22 ( Bool mode64 ) { return FR (mode64, 22, 15, 15); } in hregMIPS_F22() argument
73 ST_IN HReg hregMIPS_F24 ( Bool mode64 ) { return FR (mode64, 24, 16, 16); } in hregMIPS_F24() argument
74 ST_IN HReg hregMIPS_F26 ( Bool mode64 ) { return FR (mode64, 26, 17, 17); } in hregMIPS_F26() argument
75 ST_IN HReg hregMIPS_F28 ( Bool mode64 ) { return FR (mode64, 28, 18, 18); } in hregMIPS_F28() argument
76 ST_IN HReg hregMIPS_F30 ( Bool mode64 ) { return FR (mode64, 30, 19, 19); } in hregMIPS_F30() argument
80 ST_IN HReg hregMIPS_D0 ( Bool mode64 ) { vassert(!mode64); in hregMIPS_D0() argument
81 return DR (mode64, 0, 0, 20); } in hregMIPS_D0()
82 ST_IN HReg hregMIPS_D1 ( Bool mode64 ) { vassert(!mode64); in hregMIPS_D1() argument
83 return DR (mode64, 2, 0, 21); } in hregMIPS_D1()
84 ST_IN HReg hregMIPS_D2 ( Bool mode64 ) { vassert(!mode64); in hregMIPS_D2() argument
85 return DR (mode64, 4, 0, 22); } in hregMIPS_D2()
86 ST_IN HReg hregMIPS_D3 ( Bool mode64 ) { vassert(!mode64); in hregMIPS_D3() argument
87 return DR (mode64, 6, 0, 23); } in hregMIPS_D3()
88 ST_IN HReg hregMIPS_D4 ( Bool mode64 ) { vassert(!mode64); in hregMIPS_D4() argument
89 return DR (mode64, 8, 0, 24); } in hregMIPS_D4()
90 ST_IN HReg hregMIPS_D5 ( Bool mode64 ) { vassert(!mode64); in hregMIPS_D5() argument
91 return DR (mode64, 10, 0, 25); } in hregMIPS_D5()
92 ST_IN HReg hregMIPS_D6 ( Bool mode64 ) { vassert(!mode64); in hregMIPS_D6() argument
93 return DR (mode64, 12, 0, 26); } in hregMIPS_D6()
94 ST_IN HReg hregMIPS_D7 ( Bool mode64 ) { vassert(!mode64); in hregMIPS_D7() argument
95 return DR (mode64, 14, 0, 27); } in hregMIPS_D7()
97 ST_IN HReg hregMIPS_HI ( Bool mode64 ) { return FR (mode64, 33, 20, 28); } in hregMIPS_HI() argument
98 ST_IN HReg hregMIPS_LO ( Bool mode64 ) { return FR (mode64, 34, 21, 29); } in hregMIPS_LO() argument
100 ST_IN HReg hregMIPS_GPR0 ( Bool mode64 ) { return GPR(mode64, 0, 22, 30); } in hregMIPS_GPR0() argument
101 ST_IN HReg hregMIPS_GPR1 ( Bool mode64 ) { return GPR(mode64, 1, 23, 31); } in hregMIPS_GPR1() argument
102 ST_IN HReg hregMIPS_GPR2 ( Bool mode64 ) { return GPR(mode64, 2, 24, 32); } in hregMIPS_GPR2() argument
103 ST_IN HReg hregMIPS_GPR3 ( Bool mode64 ) { return GPR(mode64, 3, 25, 33); } in hregMIPS_GPR3() argument
104 ST_IN HReg hregMIPS_GPR4 ( Bool mode64 ) { return GPR(mode64, 4, 26, 34); } in hregMIPS_GPR4() argument
105 ST_IN HReg hregMIPS_GPR5 ( Bool mode64 ) { return GPR(mode64, 5, 27, 35); } in hregMIPS_GPR5() argument
106 ST_IN HReg hregMIPS_GPR6 ( Bool mode64 ) { return GPR(mode64, 6, 28, 36); } in hregMIPS_GPR6() argument
107 ST_IN HReg hregMIPS_GPR7 ( Bool mode64 ) { return GPR(mode64, 7, 29, 37); } in hregMIPS_GPR7() argument
108 ST_IN HReg hregMIPS_GPR8 ( Bool mode64 ) { return GPR(mode64, 8, 30, 38); } in hregMIPS_GPR8() argument
109 ST_IN HReg hregMIPS_GPR9 ( Bool mode64 ) { return GPR(mode64, 9, 31, 39); } in hregMIPS_GPR9() argument
110 ST_IN HReg hregMIPS_GPR10 ( Bool mode64 ) { return GPR(mode64, 10, 32, 40); } in hregMIPS_GPR10() argument
111 ST_IN HReg hregMIPS_GPR11 ( Bool mode64 ) { return GPR(mode64, 11, 33, 41); } in hregMIPS_GPR11() argument
112 ST_IN HReg hregMIPS_GPR23 ( Bool mode64 ) { return GPR(mode64, 23, 34, 42); } in hregMIPS_GPR23() argument
113 ST_IN HReg hregMIPS_GPR25 ( Bool mode64 ) { return GPR(mode64, 25, 35, 43); } in hregMIPS_GPR25() argument
114 ST_IN HReg hregMIPS_GPR29 ( Bool mode64 ) { return GPR(mode64, 29, 36, 44); } in hregMIPS_GPR29() argument
115 ST_IN HReg hregMIPS_GPR31 ( Bool mode64 ) { return GPR(mode64, 31, 37, 45); } in hregMIPS_GPR31() argument
624 Bool mode64);
626 Bool mode64);
629 Bool mode64);
631 Bool mode64);
633 HReg expd, HReg data, Bool mode64);
680 extern void ppMIPSInstr(const MIPSInstr *, Bool mode64);
685 extern void mapRegs_MIPSInstr (HRegRemap *, MIPSInstr *, Bool mode64);
689 Bool mode64,
701 extern const RRegUniverse* getRRegUniverse_MIPS ( Bool mode64 );
725 Bool mode64 );
731 Bool mode64 );
737 Bool mode64 );