Lines Matching refs:MIPSInstr_Alu
198 addInstr(env, MIPSInstr_Alu(Malu_DADD, sp, sp, MIPSRH_Imm(True, in add_to_sp()
201 addInstr(env, MIPSInstr_Alu(Malu_ADD, sp, sp, MIPSRH_Imm(True, in add_to_sp()
210 addInstr(env, MIPSInstr_Alu(Malu_DSUB, sp, sp, in sub_from_sp()
213 addInstr(env, MIPSInstr_Alu(Malu_SUB, sp, sp, in sub_from_sp()
292 addInstr(env, MIPSInstr_Alu(Malu_XOR, tmp, irrm, MIPSRH_Reg(tmp))); in set_MIPS_rounding_mode()
293 addInstr(env, MIPSInstr_Alu(Malu_AND, irrm, tmp, MIPSRH_Imm(False, 3))); in set_MIPS_rounding_mode()
330 return MIPSInstr_Alu(Malu_OR, r_dst, r_src, MIPSRH_Reg(r_src)); in mk_iMOVds_RR()
898 addInstr(env, MIPSInstr_Alu(aluOp, r_dst, r_srcL, ri_srcR)); in iselWordExpr_R_wrk()
1061 addInstr(env, MIPSInstr_Alu(Malu_SLT, tmp, argL, argRH)); in iselWordExpr_R_wrk()
1104 addInstr(env, MIPSInstr_Alu(Malu_AND, tLo_1, tLo, in iselWordExpr_R_wrk()
1107 addInstr(env, MIPSInstr_Alu(Malu_OR, r_dst, tHi_1, in iselWordExpr_R_wrk()
1136 addInstr(env, MIPSInstr_Alu(Malu_OR, r_ccMIPS, r_ccMIPS, in iselWordExpr_R_wrk()
1142 addInstr(env, MIPSInstr_Alu(Malu_OR, r_ccMIPS, r_ccMIPS, in iselWordExpr_R_wrk()
1150 addInstr(env, MIPSInstr_Alu(Malu_NOR, tmp, tmp, MIPSRH_Reg(tmp))); in iselWordExpr_R_wrk()
1151 addInstr(env, MIPSInstr_Alu(Malu_AND, tmp, tmp, in iselWordExpr_R_wrk()
1153 addInstr(env, MIPSInstr_Alu(Malu_OR, r_ccMIPS, r_ccMIPS, in iselWordExpr_R_wrk()
1168 addInstr(env, MIPSInstr_Alu(Malu_OR, r_ccIR_b0, r_ccMIPS, in iselWordExpr_R_wrk()
1170 addInstr(env, MIPSInstr_Alu(Malu_AND, r_ccIR_b0, r_ccIR_b0, in iselWordExpr_R_wrk()
1176 addInstr(env, MIPSInstr_Alu(Malu_AND, r_ccIR_b2, r_ccIR_b2, in iselWordExpr_R_wrk()
1182 addInstr(env, MIPSInstr_Alu(Malu_OR, r_ccIR_b6, r_ccMIPS, in iselWordExpr_R_wrk()
1186 addInstr(env, MIPSInstr_Alu(Malu_AND, r_ccIR_b6, r_ccIR_b6, in iselWordExpr_R_wrk()
1190 addInstr(env, MIPSInstr_Alu(Malu_OR, r_ccIR, r_ccIR_b0, in iselWordExpr_R_wrk()
1192 addInstr(env, MIPSInstr_Alu(Malu_OR, r_ccIR, r_ccIR, in iselWordExpr_R_wrk()
1218 addInstr(env, MIPSInstr_Alu(Malu_AND, tLo_1, tLo, in iselWordExpr_R_wrk()
1221 addInstr(env, MIPSInstr_Alu(Malu_OR, r_dst, tHi_1, in iselWordExpr_R_wrk()
1254 addInstr(env, MIPSInstr_Alu(Malu_AND, tLo_1, tLo, in iselWordExpr_R_wrk()
1256 addInstr(env, MIPSInstr_Alu(Malu_OR, r_dst, tHi_1, in iselWordExpr_R_wrk()
1274 addInstr(env, MIPSInstr_Alu(Malu_AND, tLo_1, tLo, in iselWordExpr_R_wrk()
1276 addInstr(env, MIPSInstr_Alu(Malu_OR, r_dst, tHi_1, in iselWordExpr_R_wrk()
1440 addInstr(env, MIPSInstr_Alu(Malu_SUB, r_dst, r_dst, r_srcR)); in iselWordExpr_R_wrk()
1452 addInstr(env, MIPSInstr_Alu(Malu_NOR, r_dst, r_srcL, r_srcR)); in iselWordExpr_R_wrk()
1520 addInstr(env, MIPSInstr_Alu(Malu_AND, r_dst, r_src, in iselWordExpr_R_wrk()
1566 addInstr(env, MIPSInstr_Alu(Malu_AND, r_dst, r_src, in iselWordExpr_R_wrk()
1631 addInstr(env, MIPSInstr_Alu(Malu_AND, tmp, r_src, in iselWordExpr_R_wrk()
1651 addInstr(env, MIPSInstr_Alu(Malu_SUB, r_dst, hregMIPS_GPR0(mode64), in iselWordExpr_R_wrk()
1654 addInstr(env, MIPSInstr_Alu(Malu_OR, r_dst, r_dst, in iselWordExpr_R_wrk()
1670 addInstr(env, MIPSInstr_Alu(op, r_dst, in iselWordExpr_R_wrk()
1673 addInstr(env, MIPSInstr_Alu(Malu_OR, r_dst, r_dst, in iselWordExpr_R_wrk()
1697 addInstr(env, MIPSInstr_Alu(Malu_OR, r_src, lo, MIPSRH_Reg(hi))); in iselWordExpr_R_wrk()
1710 addInstr(env, MIPSInstr_Alu(Malu_DSUB, tmp2, hregMIPS_GPR0(mode64), in iselWordExpr_R_wrk()
1713 addInstr(env, MIPSInstr_Alu(Malu_OR, tmp2, tmp2, MIPSRH_Reg(tmp1))); in iselWordExpr_R_wrk()
2138 addInstr(env, MIPSInstr_Alu(Malu_SUB, r_dst, r_dst, r_srcR)); in iselCondCode_wrk()
2395 addInstr(env, MIPSInstr_Alu(Malu_ADD, tLo, xLo, MIPSRH_Reg(yLo))); in iselInt64Expr_wrk()
2400 addInstr(env, MIPSInstr_Alu(Malu_ADD, tHi1, xHi, MIPSRH_Reg(yHi))); in iselInt64Expr_wrk()
2401 addInstr(env, MIPSInstr_Alu(Malu_ADD, tHi, tHi1, in iselInt64Expr_wrk()
2421 addInstr(env, MIPSInstr_Alu(Malu_SUB, tLo, xLo, MIPSRH_Reg(yLo))); in iselInt64Expr_wrk()
2426 addInstr(env, MIPSInstr_Alu(Malu_ADD, yHi, yHi, in iselInt64Expr_wrk()
2428 addInstr(env, MIPSInstr_Alu(Malu_SUB, tHi, xHi, MIPSRH_Reg(yHi))); in iselInt64Expr_wrk()
2488 addInstr(env, MIPSInstr_Alu(op, tHi, xHi, MIPSRH_Reg(yHi))); in iselInt64Expr_wrk()
2489 addInstr(env, MIPSInstr_Alu(op, tLo, xLo, MIPSRH_Reg(yLo))); in iselInt64Expr_wrk()
2526 addInstr(env, MIPSInstr_Alu(Malu_AND, a2, sa->Mrh.Reg.reg, in iselInt64Expr_wrk()
2532 addInstr(env, MIPSInstr_Alu(Malu_NOR, v0, zero, MIPSRH_Reg(a2))); in iselInt64Expr_wrk()
2546 addInstr(env, MIPSInstr_Alu(Malu_AND, a0tmp, a2, in iselInt64Expr_wrk()
2549 addInstr(env, MIPSInstr_Alu(Malu_OR, v0, a3, MIPSRH_Reg(v0))); in iselInt64Expr_wrk()
2590 addInstr(env, MIPSInstr_Alu(Malu_AND, a2, sa->Mrh.Reg.reg, in iselInt64Expr_wrk()
2596 addInstr(env, MIPSInstr_Alu(Malu_NOR, v0, zero, MIPSRH_Reg(a2))); in iselInt64Expr_wrk()
2607 addInstr(env, MIPSInstr_Alu(Malu_AND, v0, a2, in iselInt64Expr_wrk()
2610 addInstr(env, MIPSInstr_Alu(Malu_OR, v1, a3, MIPSRH_Reg(v1))); in iselInt64Expr_wrk()
2658 addInstr(env, MIPSInstr_Alu(Malu_AND, a2, sa->Mrh.Reg.reg, in iselInt64Expr_wrk()
2664 addInstr(env, MIPSInstr_Alu(Malu_NOR, v0, zero, MIPSRH_Reg(a2))); in iselInt64Expr_wrk()
2675 addInstr(env, MIPSInstr_Alu(Malu_AND, v0, a2, in iselInt64Expr_wrk()
2678 addInstr(env, MIPSInstr_Alu(Malu_OR, v1, a3, MIPSRH_Reg(v1))); in iselInt64Expr_wrk()
2726 addInstr(env, MIPSInstr_Alu(Malu_AND, a2, sa->Mrh.Reg.reg, in iselInt64Expr_wrk()
2732 addInstr(env, MIPSInstr_Alu(Malu_NOR, v0, zero, MIPSRH_Reg(a2))); in iselInt64Expr_wrk()
2746 addInstr(env, MIPSInstr_Alu(Malu_AND, a0tmp, a2, in iselInt64Expr_wrk()
2752 addInstr(env, MIPSInstr_Alu(Malu_OR, v0, a3, MIPSRH_Reg(v0))); in iselInt64Expr_wrk()
2848 addInstr(env, MIPSInstr_Alu(Malu_AND, tLo, src, in iselInt64Expr_wrk()
2850 addInstr(env, MIPSInstr_Alu(Malu_ADD, tHi, hregMIPS_GPR0(mode64), in iselInt64Expr_wrk()
2863 addInstr(env, MIPSInstr_Alu(Malu_ADD, tHi, hregMIPS_GPR0(mode64), in iselInt64Expr_wrk()
2886 addInstr(env, MIPSInstr_Alu(Malu_SUB, tmp2, zero, MIPSRH_Reg(yLo))); in iselInt64Expr_wrk()
2888 addInstr(env, MIPSInstr_Alu(Malu_SUB, tmp, zero, MIPSRH_Reg(yHi))); in iselInt64Expr_wrk()
2889 addInstr(env, MIPSInstr_Alu(Malu_SUB, tmp1, tmp, MIPSRH_Reg(tmp1))); in iselInt64Expr_wrk()
2894 addInstr(env, MIPSInstr_Alu(Malu_OR, tHi, yHi, MIPSRH_Reg(tmp1))); in iselInt64Expr_wrk()
2895 addInstr(env, MIPSInstr_Alu(Malu_OR, tLo, yLo, MIPSRH_Reg(tmp2))); in iselInt64Expr_wrk()
2908 addInstr(env, MIPSInstr_Alu(Malu_OR, tmp1, srcLo, in iselInt64Expr_wrk()
2912 addInstr(env, MIPSInstr_Alu(Malu_SUB, tmp2, hregMIPS_GPR0(mode64), in iselInt64Expr_wrk()
2915 addInstr(env, MIPSInstr_Alu(Malu_OR, tmp2, tmp2, MIPSRH_Reg(tmp1))); in iselInt64Expr_wrk()