Lines Matching refs:barriers

21       <li style="margin:3px 0 0"><a href="#datamem_barriers">Data memory barriers</a>
422 <h3 id="datamem_barriers">Data memory barriers</h3>
424 <p>Memory barriers provide a way for your code to tell the CPU that memory
513 <p>Because the architectures have different memory models, these barriers are
569  It’s safest to insert barriers in both places and not worry about the
574 <p>As mentioned earlier, store/load barriers are the only kind required on x86
726 <p>The key thing to remember about barriers is that they define ordering.  Don’t
831 <p>It often makes sense to pair barriers and atomic operations together. The
959 SMP -- only store/load barriers are required.  The implementation of
965 that code can move across acquire and release barriers, but only in one
1039 <p>Hence, you only need store/load barriers on x86 SMP.</p>
1070 (explicit compiler reorder barriers may be required).  There are no atomicity
1212 is likely guarded by functions that themselves employ barriers (libc heap
1215 barriers, however, the above code could fail on ARM SMP.</p>
1259 appropriate memory barriers.</p>
1469 semaphores.  These include the proper memory barriers, providing correct and
1562 <li>Understand what sorts of barriers you can use on x86 and ARM.  (And other
1805 barrier, so for ARM we must use explicit barriers.</p>
1852 …nstruction, read this.  Also describes the instructions used for memory barriers on executable cod…
1856 <dd>Documentation for Linux kernel memory barriers.  Includes some useful examples and ASCII art.
1857 …//www.kernel.org/doc/Documentation/memory-barriers.txt">http://www.kernel.org/doc/Documentation/me…