Lines Matching refs:loads

169 loads the value from location B into reg0, and then loads the value from
214 sequential.  While the architecture guarantees that loads are not reordered with
215 respect to other loads, and stores are not reordered with respect to other
304 with or visible to core #2’s cache except as loads or stores from main memory.
321 ordering of stores followed by loads improves performance but imposes a burden
389 loads or stores are ordered with respect to each other.</p>
410 made by thread 1 in program order, and thread 1 will observe thread 2’s loads in
413 <p>On ARM SMP, the loads and stores can be observed in any order.  It is
460 mentioned earlier, the loads and stores can be observed in any order.</p>
469 then loads A from its local cache, where the value is still zero.</p>
492 guarantees about the ordering of loads in thread 1, but we don’t have any of
494 guarantee for the loads there.</p>
498 also need to guarantee that thread 1 observes the loads in program order.</p>
505 completely and wait for any “in-flight” loads to finish, ensuring that future
506 loads are observed after previous loads.  What the CPU actually does doesn’t
678 <p>The loads from r0 and r3 may be observed out of order, even though the load
707 signal thread 3.  Thread 3 sees it and loads from A, using an address dependency
889 acquisition of the lock before they observe any loads or stores in the critical
917 <strong>before</strong> we release the lock, so that loads and stores in the
956 the store of zero to the lock word is observed after any loads or stores in the
1008 <p>We issue both loads, do some unrelated computation, and then execute the
1009 instructions that make use of the loads.  If the integer division takes less
1010 time than one of the loads, we essentially get it for free, since it happens
1025 <p>Returning to an earlier point, we can state that on x86 all loads are
1026 acquiring loads, and all stores are releasing stores.  As a result:</p>
1065 hardware, and you’re guaranteed that the loads and stores will appear to happen
1128 address dependency rules will ensure that any loads from an offset of
1261 <p>It should be mentioned that, while loads and stores of object references and
1341 volatile keyword, you can think about the loads as if they were
1350 localGoods.x</code> will not perform any volatile loads.)</p>
1720 their similarities with acquiring loads and releasing stores, which works as a
1742 fields.  The rules for acquiring loads and releasing stores would allow the
1799 result, but because loads tend to outnumber stores it’s best to associate it