Lines Matching refs:float
8 declare <2 x float> @llvm.aarch64.neon.fmax.v2f32(<2 x float>, <2 x float>) nounwind readnone
9 declare <4 x float> @llvm.aarch64.neon.fmax.v4f32(<4 x float>, <4 x float>) nounwind readnone
17 declare <2 x float> @llvm.aarch64.neon.fmin.v2f32(<2 x float>, <2 x float>) nounwind readnone
18 declare <4 x float> @llvm.aarch64.neon.fmin.v4f32(<4 x float>, <4 x float>) nounwind readnone
34 declare <2 x float> @llvm.aarch64.neon.frecpe.v2f32(<2 x float>) nounwind readnone
35 declare <4 x float> @llvm.aarch64.neon.frecpe.v4f32(<4 x float>) nounwind readnone
37 declare <2 x float> @llvm.aarch64.neon.frsqrte.v2f32(<2 x float>) nounwind readnone
38 declare <4 x float> @llvm.aarch64.neon.frsqrte.v4f32(<4 x float>) nounwind readnone
40 declare <2 x float> @llvm.aarch64.neon.frecps.v2f32(<2 x float>, <2 x float>) nounwind readnone
41 declare <4 x float> @llvm.aarch64.neon.frecps.v4f32(<4 x float>, <4 x float>) nounwind readnone
43 declare <2 x float> @llvm.aarch64.neon.frsqrts.v2f32(<2 x float>, <2 x float>) nounwind readnone
44 declare <4 x float> @llvm.aarch64.neon.frsqrts.v4f32(<4 x float>, <4 x float>) nounwind readnone
50 define internal <4 x float> @smear_4f(float %in) nounwind readnone alwaysinline {
51 %1 = insertelement <4 x float> undef, float %in, i32 0
52 %2 = insertelement <4 x float> %1, float %in, i32 1
53 %3 = insertelement <4 x float> %2, float %in, i32 2
54 %4 = insertelement <4 x float> %3, float %in, i32 3
55 ret <4 x float> %4
76 define internal <2 x float> @smear_2f(float %in) nounwind readnone alwaysinline {
77 %1 = insertelement <2 x float> undef, float %in, i32 0
78 %2 = insertelement <2 x float> %1, float %in, i32 1
79 ret <2 x float> %2
108 define <4 x float> @_Z5clampDv4_fS_S_(<4 x float> %value, <4 x float> %low, <4 x float> %high) noun…
109 …%1 = tail call <4 x float> @llvm.aarch64.neon.fmin.v4f32(<4 x float> %value, <4 x float> %high) no…
110 …%2 = tail call <4 x float> @llvm.aarch64.neon.fmax.v4f32(<4 x float> %1, <4 x float> %low) nounwin…
111 ret <4 x float> %2
114 define <4 x float> @_Z5clampDv4_fff(<4 x float> %value, float %low, float %high) nounwind readonly {
115 %_high = tail call <4 x float> @smear_4f(float %high) nounwind readnone
116 %_low = tail call <4 x float> @smear_4f(float %low) nounwind readnone
117 …%out = tail call <4 x float> @_Z5clampDv4_fS_S_(<4 x float> %value, <4 x float> %_low, <4 x float>…
118 ret <4 x float> %out
121 define <3 x float> @_Z5clampDv3_fS_S_(<3 x float> %value, <3 x float> %low, <3 x float> %high) noun…
122 …%_value = shufflevector <3 x float> %value, <3 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32…
123 %_low = shufflevector <3 x float> %low, <3 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
124 …%_high = shufflevector <3 x float> %high, <3 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
125 …%a = tail call <4 x float> @llvm.aarch64.neon.fmin.v4f32(<4 x float> %_value, <4 x float> %_high) …
126 …%b = tail call <4 x float> @llvm.aarch64.neon.fmax.v4f32(<4 x float> %a, <4 x float> %_low) nounwi…
127 %c = shufflevector <4 x float> %b, <4 x float> undef, <3 x i32> <i32 0, i32 1, i32 2>
128 ret <3 x float> %c
131 define <3 x float> @_Z5clampDv3_fff(<3 x float> %value, float %low, float %high) nounwind readonly {
132 …%_value = shufflevector <3 x float> %value, <3 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32…
133 %_high = tail call <4 x float> @smear_4f(float %high) nounwind readnone
134 %_low = tail call <4 x float> @smear_4f(float %low) nounwind readnone
135 …%a = tail call <4 x float> @llvm.aarch64.neon.fmin.v4f32(<4 x float> %_value, <4 x float> %_high) …
136 …%b = tail call <4 x float> @llvm.aarch64.neon.fmax.v4f32(<4 x float> %a, <4 x float> %_low) nounwi…
137 %c = shufflevector <4 x float> %b, <4 x float> undef, <3 x i32> <i32 0, i32 1, i32 2>
138 ret <3 x float> %c
141 define <2 x float> @_Z5clampDv2_fS_S_(<2 x float> %value, <2 x float> %low, <2 x float> %high) noun…
142 …%1 = tail call <2 x float> @llvm.aarch64.neon.fmin.v2f32(<2 x float> %value, <2 x float> %high) no…
143 …%2 = tail call <2 x float> @llvm.aarch64.neon.fmax.v2f32(<2 x float> %1, <2 x float> %low) nounwin…
144 ret <2 x float> %2
147 define <2 x float> @_Z5clampDv2_fff(<2 x float> %value, float %low, float %high) nounwind readonly {
148 %_high = tail call <2 x float> @smear_2f(float %high) nounwind readnone
149 %_low = tail call <2 x float> @smear_2f(float %low) nounwind readnone
150 …%a = tail call <2 x float> @llvm.aarch64.neon.fmin.v2f32(<2 x float> %value, <2 x float> %_high) n…
151 …%b = tail call <2 x float> @llvm.aarch64.neon.fmax.v2f32(<2 x float> %a, <2 x float> %_low) nounwi…
152 ret <2 x float> %b
155 define float @_Z5clampfff(float %value, float %low, float %high) nounwind readonly {
156 %1 = fcmp olt float %value, %high
157 %2 = select i1 %1, float %value, float %high
158 %3 = fcmp ogt float %2, %low
159 %4 = select i1 %3, float %2, float %low
160 ret float %4
268 define <4 x float> @_Z4fmaxDv4_fS_(<4 x float> %v1, <4 x float> %v2) nounwind readonly {
269 …%1 = tail call <4 x float> @llvm.aarch64.neon.fmax.v4f32(<4 x float> %v1, <4 x float> %v2) nounwin…
270 ret <4 x float> %1
273 define <4 x float> @_Z4fmaxDv4_ff(<4 x float> %v1, float %v2) nounwind readonly {
274 %1 = tail call <4 x float> @smear_4f(float %v2) nounwind readnone
275 …%2 = tail call <4 x float> @llvm.aarch64.neon.fmax.v4f32(<4 x float> %v1, <4 x float> %1) nounwind…
276 ret <4 x float> %2
279 define <3 x float> @_Z4fmaxDv3_fS_(<3 x float> %v1, <3 x float> %v2) nounwind readonly {
280 %1 = shufflevector <3 x float> %v1, <3 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
281 %2 = shufflevector <3 x float> %v2, <3 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
282 …%3 = tail call <4 x float> @llvm.aarch64.neon.fmax.v4f32(<4 x float> %1, <4 x float> %2) nounwind …
283 %4 = shufflevector <4 x float> %3, <4 x float> undef, <3 x i32> <i32 0, i32 1, i32 2>
284 ret <3 x float> %4
287 define <3 x float> @_Z4fmaxDv3_ff(<3 x float> %v1, float %v2) nounwind readonly {
288 %1 = shufflevector <3 x float> %v1, <3 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
289 %2 = tail call <4 x float> @smear_4f(float %v2) nounwind readnone
290 …%3 = tail call <4 x float> @llvm.aarch64.neon.fmax.v4f32(<4 x float> %1, <4 x float> %2) nounwind …
291 %c = shufflevector <4 x float> %3, <4 x float> undef, <3 x i32> <i32 0, i32 1, i32 2>
292 ret <3 x float> %c
295 define <2 x float> @_Z4fmaxDv2_fS_(<2 x float> %v1, <2 x float> %v2) nounwind readonly {
296 …%1 = tail call <2 x float> @llvm.aarch64.neon.fmax.v2f32(<2 x float> %v1, <2 x float> %v2) nounwin…
297 ret <2 x float> %1
300 define <2 x float> @_Z4fmaxDv2_ff(<2 x float> %v1, float %v2) nounwind readonly {
301 %1 = tail call <2 x float> @smear_2f(float %v2) nounwind readnone
302 …%2 = tail call <2 x float> @llvm.aarch64.neon.fmax.v2f32(<2 x float> %v1, <2 x float> %1) nounwind…
303 ret <2 x float> %2
306 define float @_Z4fmaxff(float %v1, float %v2) nounwind readonly {
307 %1 = fcmp ogt float %v1, %v2
308 %2 = select i1 %1, float %v1, float %v2
309 ret float %2
317 define <4 x float> @_Z4fminDv4_fS_(<4 x float> %v1, <4 x float> %v2) nounwind readonly {
318 …%1 = tail call <4 x float> @llvm.aarch64.neon.fmin.v4f32(<4 x float> %v1, <4 x float> %v2) nounwin…
319 ret <4 x float> %1
322 define <4 x float> @_Z4fminDv4_ff(<4 x float> %v1, float %v2) nounwind readonly {
323 %1 = tail call <4 x float> @smear_4f(float %v2) nounwind readnone
324 …%2 = tail call <4 x float> @llvm.aarch64.neon.fmin.v4f32(<4 x float> %v1, <4 x float> %1) nounwind…
325 ret <4 x float> %2
328 define <3 x float> @_Z4fminDv3_fS_(<3 x float> %v1, <3 x float> %v2) nounwind readonly {
329 %1 = shufflevector <3 x float> %v1, <3 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
330 %2 = shufflevector <3 x float> %v2, <3 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
331 …%3 = tail call <4 x float> @llvm.aarch64.neon.fmin.v4f32(<4 x float> %1, <4 x float> %2) nounwind …
332 %4 = shufflevector <4 x float> %3, <4 x float> undef, <3 x i32> <i32 0, i32 1, i32 2>
333 ret <3 x float> %4
336 define <3 x float> @_Z4fminDv3_ff(<3 x float> %v1, float %v2) nounwind readonly {
337 %1 = shufflevector <3 x float> %v1, <3 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
338 %2 = tail call <4 x float> @smear_4f(float %v2) nounwind readnone
339 …%3 = tail call <4 x float> @llvm.aarch64.neon.fmin.v4f32(<4 x float> %1, <4 x float> %2) nounwind …
340 %c = shufflevector <4 x float> %3, <4 x float> undef, <3 x i32> <i32 0, i32 1, i32 2>
341 ret <3 x float> %c
344 define <2 x float> @_Z4fminDv2_fS_(<2 x float> %v1, <2 x float> %v2) nounwind readonly {
345 …%1 = tail call <2 x float> @llvm.aarch64.neon.fmin.v2f32(<2 x float> %v1, <2 x float> %v2) nounwin…
346 ret <2 x float> %1
349 define <2 x float> @_Z4fminDv2_ff(<2 x float> %v1, float %v2) nounwind readonly {
350 %1 = tail call <2 x float> @smear_2f(float %v2) nounwind readnone
351 …%2 = tail call <2 x float> @llvm.aarch64.neon.fmin.v2f32(<2 x float> %v1, <2 x float> %1) nounwind…
352 ret <2 x float> %2
355 define float @_Z4fminff(float %v1, float %v2) nounwind readnone {
356 %1 = fcmp olt float %v1, %v2
357 %2 = select i1 %1, float %v1, float %v2
358 ret float %2
557 define float @_Z3maxff(float %v1, float %v2) nounwind readnone {
558 %1 = tail call float @_Z4fmaxff(float %v1, float %v2)
559 ret float %1
562 define <2 x float> @_Z3maxDv2_fS_(<2 x float> %v1, <2 x float> %v2) nounwind readnone {
563 %1 = tail call <2 x float> @_Z4fmaxDv2_fS_(<2 x float> %v1, <2 x float> %v2)
564 ret <2 x float> %1
567 define <2 x float> @_Z3maxDv2_ff(<2 x float> %v1, float %v2) nounwind readnone {
568 %1 = tail call <2 x float> @_Z4fmaxDv2_ff(<2 x float> %v1, float %v2)
569 ret <2 x float> %1
572 define <3 x float> @_Z3maxDv3_fS_(<3 x float> %v1, <3 x float> %v2) nounwind readnone {
573 %1 = tail call <3 x float> @_Z4fmaxDv3_fS_(<3 x float> %v1, <3 x float> %v2)
574 ret <3 x float> %1
577 define <3 x float> @_Z3maxDv3_ff(<3 x float> %v1, float %v2) nounwind readnone {
578 %1 = tail call <3 x float> @_Z4fmaxDv3_ff(<3 x float> %v1, float %v2)
579 ret <3 x float> %1
582 define <4 x float> @_Z3maxDv4_fS_(<4 x float> %v1, <4 x float> %v2) nounwind readnone {
583 %1 = tail call <4 x float> @_Z4fmaxDv4_fS_(<4 x float> %v1, <4 x float> %v2)
584 ret <4 x float> %1
587 define <4 x float> @_Z3maxDv4_ff(<4 x float> %v1, float %v2) nounwind readnone {
588 %1 = tail call <4 x float> @_Z4fmaxDv4_ff(<4 x float> %v1, float %v2)
589 ret <4 x float> %1
788 define float @_Z3minff(float %v1, float %v2) nounwind readnone {
789 %1 = tail call float @_Z4fminff(float %v1, float %v2)
790 ret float %1
793 define <2 x float> @_Z3minDv2_fS_(<2 x float> %v1, <2 x float> %v2) nounwind readnone {
794 %1 = tail call <2 x float> @_Z4fminDv2_fS_(<2 x float> %v1, <2 x float> %v2)
795 ret <2 x float> %1
798 define <2 x float> @_Z3minDv2_ff(<2 x float> %v1, float %v2) nounwind readnone {
799 %1 = tail call <2 x float> @_Z4fminDv2_ff(<2 x float> %v1, float %v2)
800 ret <2 x float> %1
803 define <3 x float> @_Z3minDv3_fS_(<3 x float> %v1, <3 x float> %v2) nounwind readnone {
804 %1 = tail call <3 x float> @_Z4fminDv3_fS_(<3 x float> %v1, <3 x float> %v2)
805 ret <3 x float> %1
808 define <3 x float> @_Z3minDv3_ff(<3 x float> %v1, float %v2) nounwind readnone {
809 %1 = tail call <3 x float> @_Z4fminDv3_ff(<3 x float> %v1, float %v2)
810 ret <3 x float> %1
813 define <4 x float> @_Z3minDv4_fS_(<4 x float> %v1, <4 x float> %v2) nounwind readnone {
814 %1 = tail call <4 x float> @_Z4fminDv4_fS_(<4 x float> %v1, <4 x float> %v2)
815 ret <4 x float> %1
818 define <4 x float> @_Z3minDv4_ff(<4 x float> %v1, float %v2) nounwind readnone {
819 %1 = tail call <4 x float> @_Z4fminDv4_ff(<4 x float> %v1, float %v2)
820 ret <4 x float> %1
871 define <2 x float> @_Z10half_recipDv2_f(<2 x float> %v) nounwind readnone {
872 %1 = tail call <2 x float> @llvm.aarch64.neon.frecpe.v2f32(<2 x float> %v) nounwind readnone
873 …%2 = tail call <2 x float> @llvm.aarch64.neon.frecps.v2f32(<2 x float> %1, <2 x float> %v) nounwin…
874 %3 = fmul <2 x float> %1, %2
875 …%4 = tail call <2 x float> @llvm.aarch64.neon.frecps.v2f32(<2 x float> %3, <2 x float> %v) nounwin…
876 %5 = fmul <2 x float> %4, %3
877 ret <2 x float> %5
880 define <4 x float> @_Z10half_recipDv4_f(<4 x float> %v) nounwind readnone {
881 %1 = tail call <4 x float> @llvm.aarch64.neon.frecpe.v4f32(<4 x float> %v) nounwind readnone
882 …%2 = tail call <4 x float> @llvm.aarch64.neon.frecps.v4f32(<4 x float> %1, <4 x float> %v) nounwin…
883 %3 = fmul <4 x float> %1, %2
884 …%4 = tail call <4 x float> @llvm.aarch64.neon.frecps.v4f32(<4 x float> %3, <4 x float> %v) nounwin…
885 %5 = fmul <4 x float> %4, %3
886 ret <4 x float> %5
889 define <3 x float> @_Z10half_recipDv3_f(<3 x float> %v) nounwind readnone {
890 %1 = shufflevector <3 x float> %v, <3 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
891 %2 = tail call <4 x float> @_Z10half_recipDv4_f(<4 x float> %1) nounwind readnone
892 %3 = shufflevector <4 x float> %2, <4 x float> undef, <3 x i32> <i32 0, i32 1, i32 2>
893 ret <3 x float> %3
901 define float @_Z10half_rsqrtf(float %v) {
902 %1 = insertelement <2 x float> undef, float %v, i32 0
903 %2 = tail call <2 x float> @llvm.aarch64.neon.frsqrte.v2f32(<2 x float> %1) nounwind readnone
904 %3 = fmul <2 x float> %2, %2
905 …%4 = tail call <2 x float> @llvm.aarch64.neon.frsqrts.v2f32(<2 x float> %1, <2 x float> %3) nounwi…
906 %5 = fmul <2 x float> %2, %4
907 %6 = extractelement <2 x float> %5, i32 0
908 ret float %6
911 define <2 x float> @_Z10half_rsqrtDv2_f(<2 x float> %v) nounwind readnone {
912 %1 = tail call <2 x float> @llvm.aarch64.neon.frsqrte.v2f32(<2 x float> %v) nounwind readnone
913 %2 = fmul <2 x float> %1, %1
914 …%3 = tail call <2 x float> @llvm.aarch64.neon.frsqrts.v2f32(<2 x float> %v, <2 x float> %2) nounwi…
915 %4 = fmul <2 x float> %1, %3
916 ret <2 x float> %4
919 define <3 x float> @_Z10half_rsqrtDv3_f(<3 x float> %v) nounwind readnone {
920 %1 = shufflevector <3 x float> %v, <3 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
921 %2 = tail call <4 x float> @llvm.aarch64.neon.frsqrte.v4f32(<4 x float> %1) nounwind readnone
922 %3 = fmul <4 x float> %2, %2
923 …%4 = tail call <4 x float> @llvm.aarch64.neon.frsqrts.v4f32(<4 x float> %1, <4 x float> %3) nounwi…
924 %5 = fmul <4 x float> %2, %4
925 %6 = shufflevector <4 x float> %5, <4 x float> undef, <3 x i32> <i32 0, i32 1, i32 2>
926 ret <3 x float> %6
929 define <4 x float> @_Z10half_rsqrtDv4_f(<4 x float> %v) nounwind readnone {
930 %1 = tail call <4 x float> @llvm.aarch64.neon.frsqrte.v4f32(<4 x float> %v) nounwind readnone
931 %2 = fmul <4 x float> %1, %1
932 …%3 = tail call <4 x float> @llvm.aarch64.neon.frsqrts.v4f32(<4 x float> %v, <4 x float> %2) nounwi…
933 %4 = fmul <4 x float> %1, %3
934 ret <4 x float> %4
941 %struct.rs_matrix4x4 = type { [16 x float] }
942 %struct.rs_matrix3x3 = type { [9 x float] }
943 %struct.rs_matrix2x2 = type { [4 x float] }
945 define internal <4 x float> @smear_f(float %in) nounwind readnone alwaysinline {
946 %1 = insertelement <4 x float> undef, float %in, i32 0
947 %2 = insertelement <4 x float> %1, float %in, i32 1
948 %3 = insertelement <4 x float> %2, float %in, i32 2
949 %4 = insertelement <4 x float> %3, float %in, i32 3
950 ret <4 x float> %4
954 define <3 x float> @_Z16rsMatrixMultiplyPK12rs_matrix3x3Dv3_f(%struct.rs_matrix3x3* nocapture %m, <…
955 %x0 = extractelement <3 x float> %in, i32 0
956 %x = tail call <4 x float> @smear_f(float %x0) nounwind readnone
957 %y0 = extractelement <3 x float> %in, i32 1
958 %y = tail call <4 x float> @smear_f(float %y0) nounwind readnone
959 %z0 = extractelement <3 x float> %in, i32 2
960 %z = tail call <4 x float> @smear_f(float %z0) nounwind readnone
963 %px2 = bitcast float* %px to <4 x float>*
964 %xm = load <4 x float>, <4 x float>* %px2, align 4
967 %py2 = bitcast float* %py to <4 x float>*
968 ; %ym = call <4 x float> @llvm.aarch64.neon.ld4.v4f32(i8* %py2, i32 4) nounwind
969 %ym = load <4 x float>, <4 x float>* %py2, align 4
972 %pz2 = bitcast float* %pz to <4 x float>*
973 ; %zm2 = call <4 x float> @llvm.aarch64.neon.ld4.v4f32(i8* %pz2, i32 4) nounwind
974 %zm2 = load <4 x float>, <4 x float>* %pz2, align 4
975 %zm = shufflevector <4 x float> %zm2, <4 x float> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 4>
977 %a1 = fmul <4 x float> %x, %xm
978 %a2 = fmul <4 x float> %y, %ym
979 %a3 = fadd <4 x float> %a1, %a2
980 %a4 = fmul <4 x float> %z, %zm
981 %a5 = fadd <4 x float> %a4, %a3
982 %a6 = shufflevector <4 x float> %a5, <4 x float> undef, <3 x i32> <i32 0, i32 1, i32 2>
983 ret <3 x float> %a6
986 define <3 x float> @_Z16rsMatrixMultiplyPK12rs_matrix3x3Dv2_f(%struct.rs_matrix3x3* nocapture %m, <…
987 %x0 = extractelement <2 x float> %in, i32 0
988 %x = tail call <4 x float> @smear_f(float %x0) nounwind readnone
989 %y0 = extractelement <2 x float> %in, i32 1
990 %y = tail call <4 x float> @smear_f(float %y0) nounwind readnone
993 %px2 = bitcast float* %px to <4 x float>*
994 %xm = load <4 x float>, <4 x float>* %px2, align 4
996 %py2 = bitcast float* %py to <4 x float>*
997 %ym = load <4 x float>, <4 x float>* %py2, align 4
999 %a1 = fmul <4 x float> %x, %xm
1000 %a2 = fmul <4 x float> %y, %ym
1001 %a3 = fadd <4 x float> %a1, %a2
1002 %a4 = shufflevector <4 x float> %a3, <4 x float> undef, <3 x i32> <i32 0, i32 1, i32 2>
1003 ret <3 x float> %a4
1006 define <4 x float> @_Z16rsMatrixMultiplyPK12rs_matrix4x4Dv4_f(%struct.rs_matrix4x4* nocapture %m, <…
1007 %x0 = extractelement <4 x float> %in, i32 0
1008 %x = tail call <4 x float> @smear_f(float %x0) nounwind readnone
1009 %y0 = extractelement <4 x float> %in, i32 1
1010 %y = tail call <4 x float> @smear_f(float %y0) nounwind readnone
1011 %z0 = extractelement <4 x float> %in, i32 2
1012 %z = tail call <4 x float> @smear_f(float %z0) nounwind readnone
1013 %w0 = extractelement <4 x float> %in, i32 3
1014 %w = tail call <4 x float> @smear_f(float %w0) nounwind readnone
1017 %px2 = bitcast float* %px to <4 x float>*
1018 %xm = load <4 x float>, <4 x float>* %px2, align 4
1020 %py2 = bitcast float* %py to <4 x float>*
1021 %ym = load <4 x float>, <4 x float>* %py2, align 4
1023 %pz2 = bitcast float* %pz to <4 x float>*
1024 %zm = load <4 x float>, <4 x float>* %pz2, align 4
1026 %pw2 = bitcast float* %pw to <4 x float>*
1027 %wm = load <4 x float>, <4 x float>* %pw2, align 4
1029 %a1 = fmul <4 x float> %x, %xm
1030 %a2 = fmul <4 x float> %y, %ym
1031 %a3 = fadd <4 x float> %a1, %a2
1032 %a4 = fmul <4 x float> %z, %zm
1033 %a5 = fadd <4 x float> %a3, %a4
1034 %a6 = fmul <4 x float> %w, %wm
1035 %a7 = fadd <4 x float> %a5, %a6
1036 ret <4 x float> %a7
1039 define <4 x float> @_Z16rsMatrixMultiplyPK12rs_matrix4x4Dv3_f(%struct.rs_matrix4x4* nocapture %m, <…
1040 %x0 = extractelement <3 x float> %in, i32 0
1041 %x = tail call <4 x float> @smear_f(float %x0) nounwind readnone
1042 %y0 = extractelement <3 x float> %in, i32 1
1043 %y = tail call <4 x float> @smear_f(float %y0) nounwind readnone
1044 %z0 = extractelement <3 x float> %in, i32 2
1045 %z = tail call <4 x float> @smear_f(float %z0) nounwind readnone
1048 %px2 = bitcast float* %px to <4 x float>*
1049 %xm = load <4 x float>, <4 x float>* %px2, align 4
1051 %py2 = bitcast float* %py to <4 x float>*
1052 %ym = load <4 x float>, <4 x float>* %py2, align 4
1054 %pz2 = bitcast float* %pz to <4 x float>*
1055 %zm = load <4 x float>, <4 x float>* %pz2, align 4
1057 %pw2 = bitcast float* %pw to <4 x float>*
1058 %wm = load <4 x float>, <4 x float>* %pw2, align 4
1060 %a1 = fmul <4 x float> %x, %xm
1061 %a2 = fadd <4 x float> %wm, %a1
1062 %a3 = fmul <4 x float> %y, %ym
1063 %a4 = fadd <4 x float> %a2, %a3
1064 %a5 = fmul <4 x float> %z, %zm
1065 %a6 = fadd <4 x float> %a4, %a5
1066 ret <4 x float> %a6
1069 define <4 x float> @_Z16rsMatrixMultiplyPK12rs_matrix4x4Dv2_f(%struct.rs_matrix4x4* nocapture %m, <…
1070 %x0 = extractelement <2 x float> %in, i32 0
1071 %x = tail call <4 x float> @smear_f(float %x0) nounwind readnone
1072 %y0 = extractelement <2 x float> %in, i32 1
1073 %y = tail call <4 x float> @smear_f(float %y0) nounwind readnone
1076 %px2 = bitcast float* %px to <4 x float>*
1077 %xm = load <4 x float>, <4 x float>* %px2, align 4
1079 %py2 = bitcast float* %py to <4 x float>*
1080 %ym = load <4 x float>, <4 x float>* %py2, align 4
1082 %pw2 = bitcast float* %pw to <4 x float>*
1083 %wm = load <4 x float>, <4 x float>* %pw2, align 4
1085 %a1 = fmul <4 x float> %x, %xm
1086 %a2 = fadd <4 x float> %wm, %a1
1087 %a3 = fmul <4 x float> %y, %ym
1088 %a4 = fadd <4 x float> %a2, %a3
1089 ret <4 x float> %a4
1099 @fc_255.0 = internal constant <4 x float> <float 255.0, float 255.0, float 255.0, float 255.0>, ali…
1100 @fc_0.5 = internal constant <4 x float> <float 0.5, float 0.5, float 0.5, float 0.5>, align 16
1101 @fc_0 = internal constant <4 x float> <float 0.0, float 0.0, float 0.0, float 0.0>, align 16
1103 declare <4 x i8> @_Z14convert_uchar4Dv4_f(<4 x float> %in) nounwind readnone
1104 declare <4 x float> @_Z14convert_float4Dv4_h(<4 x i8> %in) nounwind readnone
1107 define <4 x i8> @_Z17rsPackColorTo8888Dv4_f(<4 x float> %color) nounwind readnone {
1108 %f255 = load <4 x float>, <4 x float>* @fc_255.0, align 16
1109 %f05 = load <4 x float>, <4 x float>* @fc_0.5, align 16
1110 %f0 = load <4 x float>, <4 x float>* @fc_0, align 16
1111 %v1 = fmul <4 x float> %f255, %color
1112 %v2 = fadd <4 x float> %f05, %v1
1113 …%v3 = tail call <4 x float> @_Z5clampDv4_fS_S_(<4 x float> %v2, <4 x float> %f0, <4 x float> %f255…
1114 %v4 = tail call <4 x i8> @_Z14convert_uchar4Dv4_f(<4 x float> %v3) nounwind readnone
1120 %1 = bitcast <4 x i32> %color to <4 x float>
1121 %2 = insertelement <4 x float> %1, float 1.0, i32 3
1122 %3 = tail call <4 x i8> @_Z17rsPackColorTo8888Dv4_f(<4 x float> %2) nounwind readnone
1126 ; uchar4 __attribute__((overloadable)) rsPackColorTo8888(float r, float g, float b)
1127 define <4 x i8> @_Z17rsPackColorTo8888fff(float %r, float %g, float %b) nounwind readnone {
1128 %1 = insertelement <4 x float> undef, float %r, i32 0
1129 %2 = insertelement <4 x float> %1, float %g, i32 1
1130 %3 = insertelement <4 x float> %2, float %b, i32 2
1131 %4 = insertelement <4 x float> %3, float 1.0, i32 3
1132 %5 = tail call <4 x i8> @_Z17rsPackColorTo8888Dv4_f(<4 x float> %4) nounwind readnone
1136 ; uchar4 __attribute__((overloadable)) rsPackColorTo8888(float r, float g, float b, float a)
1137 define <4 x i8> @_Z17rsPackColorTo8888ffff(float %r, float %g, float %b, float %a) nounwind readnon…
1138 %1 = insertelement <4 x float> undef, float %r, i32 0
1139 %2 = insertelement <4 x float> %1, float %g, i32 1
1140 %3 = insertelement <4 x float> %2, float %b, i32 2
1141 %4 = insertelement <4 x float> %3, float %a, i32 3
1142 %5 = tail call <4 x i8> @_Z17rsPackColorTo8888Dv4_f(<4 x float> %4) nounwind readnone