Lines Matching refs:uint
56 uint data_len;
125 uint count; /* # rates in this set */
158 uint count; /* # rates in this set */
200 uint count; /* # rates in this set */
1000 uint byteoff; /* byte offset */
1001 uint nbytes; /* number of bytes */
1022 uint band; /* band (optional) */
1054 uint count; /* Number of nodes */
1169 uint count; /* number of MAC addresses */
1176 uint rx_good_pkt;
1177 uint rx_bad_pkt;
1178 uint tx_good_pkt;
1179 uint tx_bad_pkt;
1180 uint rx_ocast_good_pkt; /* unicast packets destined for others */
1246 uint cmd; /* common ioctl definition */
1248 uint len; /* length of user buffer */
1250 uint used; /* bytes read or written (optional) */
1251 uint needed; /* bytes needed (optional) */
1266 uint vendorid; /* PCI vendor id */
1267 uint deviceid; /* device id of chip */
1268 uint radiorev; /* radio revision */
1269 uint chiprev; /* chip revision */
1270 uint corerev; /* core revision */
1271 uint boardid; /* board identifier (usu. PCI sub-device id) */
1272 uint boardvendor; /* board vendor (usu. PCI sub-vendor id) */
1273 uint boardrev; /* board revision */
1274 uint driverrev; /* driver version */
1275 uint ucoderev; /* microcode version */
1276 uint bus; /* bus type */
1277 uint chipnum; /* chip number */
1278 uint phytype; /* phy type */
1279 uint phyrev; /* phy revision */
1280 uint anarev; /* anacore rev */
1281 uint chippkg; /* chip package info */
1282 uint nvramrev; /* nvram revision number */
1289 uint instance;
2274 uint state; /* noted by WL_DFS_CACSTATE_XX. */
2275 uint duration; /* time spent in ms in state. */
2734 uint tx_power_max_rate_ind[4]; /* Index of the rate with the max target power */
2770 uint tx_power_max_rate_ind[4]; /* Index of the rate with the max target power */
3743 uint flag; /* bit field */
3748 uint min_srv_interval; /* Minimum Service Interval (us) */
3749 uint max_srv_interval; /* Maximum Service Interval (us) */
3750 uint inactivity_interval; /* Inactivity Interval (us) */
3751 uint suspension_interval; /* Suspension Interval (us) */
3752 uint srv_start_time; /* Service Start Time (us) */
3753 uint min_data_rate; /* Minimum Data Rate (bps) */
3754 uint mean_data_rate; /* Mean Data Rate (bps) */
3755 uint peak_data_rate; /* Peak Data Rate (bps) */
3756 uint max_burst_size; /* Maximum Burst Size (bytes) */
3757 uint delay_bound; /* Delay Bound (us) */
3758 uint min_phy_rate; /* Minimum PHY Rate (bps) */
4283 uint count;
4721 uint tx_power_max_rate_ind[4]; /* Index of the rate with the max target power */
4731 uint user_target; /* user limit */
4806 uint timestamp;
4812 uint timestamp;
4987 uint bsscfgidx;
5111 uint bsscfgidx;
5141 uint reason;
5182 uint op; /* operation code */