Lines Matching refs:new_op

2364   xtensa_opcode old_op, new_op;  in replace_tls_insn()  local
2433 new_op = xtensa_opcode_lookup (isa, "nop"); in replace_tls_insn()
2434 if (new_op == XTENSA_UNDEFINED) in replace_tls_insn()
2436 new_op = xtensa_opcode_lookup (isa, "or"); in replace_tls_insn()
2437 if (new_op == XTENSA_UNDEFINED in replace_tls_insn()
2438 || xtensa_opcode_encode (isa, fmt, 0, sbuff, new_op) != 0 in replace_tls_insn()
2439 || xtensa_operand_set_field (isa, new_op, 0, fmt, 0, in replace_tls_insn()
2441 || xtensa_operand_set_field (isa, new_op, 1, fmt, 0, in replace_tls_insn()
2443 || xtensa_operand_set_field (isa, new_op, 2, fmt, 0, in replace_tls_insn()
2452 if (xtensa_opcode_encode (isa, fmt, 0, sbuff, new_op) != 0) in replace_tls_insn()
2462 new_op = xtensa_opcode_lookup (isa, "rur.threadptr"); in replace_tls_insn()
2463 if (new_op == XTENSA_UNDEFINED in replace_tls_insn()
2464 || xtensa_opcode_encode (isa, fmt, 0, sbuff, new_op) != 0 in replace_tls_insn()
2465 || xtensa_operand_set_field (isa, new_op, 0, fmt, 0, in replace_tls_insn()
2479 new_op = xtensa_opcode_lookup (isa, "rur.threadptr"); in replace_tls_insn()
2480 if (new_op == XTENSA_UNDEFINED in replace_tls_insn()
2481 || xtensa_opcode_encode (isa, fmt, 0, sbuff, new_op) != 0 in replace_tls_insn()
2482 || xtensa_operand_set_field (isa, new_op, 0, fmt, 0, in replace_tls_insn()
2498 new_op = xtensa_opcode_lookup (isa, "add"); in replace_tls_insn()
2499 if (new_op == XTENSA_UNDEFINED in replace_tls_insn()
2500 || xtensa_opcode_encode (isa, fmt, 0, sbuff, new_op) != 0 in replace_tls_insn()
2501 || xtensa_operand_set_field (isa, new_op, 0, fmt, 0, in replace_tls_insn()
2503 || xtensa_operand_set_field (isa, new_op, 1, fmt, 0, in replace_tls_insn()
2505 || xtensa_operand_set_field (isa, new_op, 2, fmt, 0, in replace_tls_insn()