Lines Matching refs:Rd
154 ((Rd INT -1))
262 ((Rs INT -1) (Rd INT -1))
265 ((Rs INT -1) (Rd INT -1))
268 ((Rs INT -1) (Rd INT -1))
292 ((Rd INT -1) (Rs INT -1))
293 ((Rd INT -1))
296 ; Special case of u-exec for movem: don't treat Rd as an incoming
300 ((Rd INT -1))
317 (define-pmacro (cris-timing-Rd-sfield)
318 (crisv32-timing-destreg ((out Rd Rd-sfield)))
1583 ; Rd := destination operand, register addressing mode
1584 (dnop Rd "Destination general register" () h-gr f-dest)
1585 (define-pmacro Rd-sfield Rs)
1586 (define-pmacro Rs-dfield Rd)
1588 ; [Rd] := destination operand, indirect addressing mode
1589 ; = MODE_INDIRECT Rd
1591 ; [Rd+] := destination operand, autoincrement addressing mode
1592 ; = MODE_AUTOINCREMENT Rd
1604 ; d := destination operand, any of the modes Rd, [Rd] or [Rd+]
1973 ; MOVE.m Rs,Rd [ Rd | 011001mm | Rs ]
1976 "move.m ${Rs},${Rd}"
1977 (+ Rd MODE_REGISTER R_MOVE Rs)
1983 (set-subreg-gr BWD (regno Rd) newval)
1987 ; MOVE.D PC,Rd [ Rd | 01100110 | 1111 ]
1994 "move.d PC,${Rd}"
1995 (+ Rd MODE_REGISTER R_MOVE SIZE_DWORD (f-source 15))
1999 (set Rd pcval)
2003 ; MOVEQ i,Rd [ Rd | 001001 | i ]
2006 "moveq $i,$Rd"
2007 (+ Rd MODE_QUICK_IMMEDIATE Q_MOVEQ i)
2011 (set Rd newval)
2028 ; MOVS.z Rs,Rd [ Rd | 0100011z | Rs ]
2031 "movs.m ${Rs},${Rd}"
2032 (+ Rd MODE_REGISTER R_MOVX Rs)
2039 (set Rd newval)
2056 ; MOVU.z Rs,Rd [ Rd | 0100010z | Rs ]
2059 "movu.m ${Rs},${Rd}"
2060 (+ Rd MODE_REGISTER R_MOVX Rs)
2067 (set Rd newval)
2071 ; (MOVE.m [PC+],Rd [ Rd | 111001mm | 1111 ])
2076 "move.b ${sconst8},${Rd}"
2077 (+ Rd MODE_AUTOINCREMENT INDIR_MOVE_M_R SIZE_BYTE (f-source 15) sconst8)
2081 (set-subreg-gr QI (regno Rd) newval)
2087 "move.w ${sconst16},${Rd}"
2088 (+ Rd MODE_AUTOINCREMENT INDIR_MOVE_M_R SIZE_WORD (f-source 15) sconst16)
2092 (set-subreg-gr HI (regno Rd) newval)
2098 "move.d ${const32},${Rd}"
2099 (+ Rd MODE_AUTOINCREMENT INDIR_MOVE_M_R SIZE_DWORD (f-source 15) const32)
2103 (set Rd newval)
2107 ; (MOVS.z [PC+],Rd [ Rd | 1100011z | 1111 ])
2111 "movs.b ${sconst8},${Rd}"
2112 (+ Rd MODE_AUTOINCREMENT INDIR_MOVX SIGNED_BYTE (f-source 15) sconst8)
2117 (set Rd newval)
2123 "movs.w ${sconst16},${Rd}"
2124 (+ Rd MODE_AUTOINCREMENT INDIR_MOVX SIGNED_WORD (f-source 15) sconst16)
2129 (set Rd newval)
2133 ; (MOVU.z [PC+],Rd [ Rd | 1100010z | 1111 ])
2136 "movu.b ${uconst8},${Rd}"
2137 (+ Rd MODE_AUTOINCREMENT INDIR_MOVX UNSIGNED_BYTE (f-source 15) uconst8)
2142 (set Rd newval)
2148 "movu.w ${uconst16},${Rd}"
2149 (+ Rd MODE_AUTOINCREMENT INDIR_MOVX UNSIGNED_WORD (f-source 15) uconst16)
2154 (set Rd newval)
2158 ; ADDQ j,Rd [ Rd | 001000 | j ]
2160 addq "addq j,Rd"
2161 "addq $j,$Rd"
2162 (+ Rd MODE_QUICK_IMMEDIATE Q_ADDQ j)
2163 (cris-arit add SI Rd j)
2166 ; SUBQ j,Rd [ Rd | 001010| j ]
2168 subq "subq j,Rd"
2169 "subq $j,$Rd"
2170 (+ Rd MODE_QUICK_IMMEDIATE Q_SUBQ j)
2171 (cris-arit sub SI Rd j)
2362 ; CMP.m Rs,Rd [ Rd | 011011mm | Rs ]
2365 "$Rs,$Rd"
2366 (+ Rd MODE_REGISTER R_CMP Rs)
2371 Rd Rs cbit cbit))
2374 ; CMP.m [Rs],Rd [ Rd | 101011mm | Rs ]
2375 ; CMP.m [Rs+],Rd [ Rd | 111011mm | Rs ]
2378 "[${Rs}${inc}],${Rd}"
2379 (+ INDIR_CMP Rs Rd)
2384 Rd (cris-get-mem BWD Rs) cbit cbit))
2387 ; (CMP.m [PC+],Rd [ Rd | 111011mm | 1111 ])
2390 "cmp.b $sconst8,$Rd"
2391 (+ Rd MODE_AUTOINCREMENT INDIR_CMP SIZE_BYTE (f-source 15) sconst8)
2394 Rd (trunc QI sconst8) cbit cbit)
2399 "cmp.w $sconst16,$Rd"
2400 (+ Rd MODE_AUTOINCREMENT INDIR_CMP SIZE_WORD (f-source 15) sconst16)
2403 Rd (trunc HI sconst16) cbit cbit)
2408 "cmp.d $const32,$Rd"
2409 (+ Rd MODE_AUTOINCREMENT INDIR_CMP SIZE_DWORD (f-source 15) const32)
2412 Rd const32 cbit cbit)
2415 ; CMPQ i,Rd [ Rd | 001011 | i ]
2417 cmpq "cmpq i,Rd"
2418 "cmpq $i,$Rd"
2419 (+ Rd MODE_QUICK_IMMEDIATE Q_CMPQ i)
2422 Rd i cbit cbit)
2425 ; CMPS.z [Rs],Rd [ Rd | 1000111z | Rs ]
2426 ; CMPS.z [Rs+],Rd [ Rd | 1100111z | Rs ]
2429 "[${Rs}${inc}],$Rd"
2430 (+ Rd INDIR_CMPX Rs)
2435 Rd ((.sym BW -ext) (cris-get-mem BW Rs)) cbit cbit))
2438 ; (CMPS.z [PC+],Rd [ Rd | 1100111z | 1111 ])
2441 "[${Rs}${inc}],$Rd"
2442 (+ Rd MODE_AUTOINCREMENT INDIR_CMPX SIGNED_BYTE (f-source 15) sconst8)
2445 Rd (ext SI (trunc QI sconst8)) cbit cbit)
2449 "[${Rs}${inc}],$Rd"
2450 (+ Rd MODE_AUTOINCREMENT INDIR_CMPX SIGNED_WORD (f-source 15) sconst16)
2453 Rd (ext SI (trunc HI sconst16)) cbit cbit)
2456 ; CMPU.z [Rs],Rd [ Rd | 1000110z | Rs ]
2457 ; CMPU.z [Rs+],Rd [ Rd | 1100110z | Rs ]
2460 "[${Rs}${inc}],$Rd"
2461 (+ Rd INDIR_CMPX Rs)
2466 Rd ((.sym BW -zext) (cris-get-mem BW Rs)) cbit cbit))
2469 ; (CMPU.z [PC+],Rd [ Rd | 1100110z | 1111 ])
2472 "[${Rs}${inc}],$Rd"
2473 (+ Rd MODE_AUTOINCREMENT INDIR_CMPX UNSIGNED_BYTE (f-source 15) uconst8)
2476 Rd (zext SI (trunc QI uconst8)) cbit cbit)
2480 "[${Rs}${inc}],$Rd"
2481 (+ Rd MODE_AUTOINCREMENT INDIR_CMPX UNSIGNED_WORD (f-source 15) uconst16)
2484 Rd (zext SI (trunc HI uconst16)) cbit cbit)
2487 ; MOVE.m [Rs],Rd [ Rd | 101001mm | Rs ]
2488 ; MOVE.m [Rs+],Rd [ Rd | 111001mm | Rs ]
2491 "[${Rs}${inc}],${Rd}"
2492 (+ INDIR_MOVE_M_R Rs Rd)
2500 (if SI (andif prefix-set (not inc)) (regno Rs) (regno Rd))
2505 ; MOVS.z [Rs],Rd [ Rd | 1000011z | Rs ]
2506 ; MOVS.z [Rs+],Rd [ Rd | 1100011z | Rs ]
2509 "[${Rs}${inc}],${Rd}"
2510 (+ INDIR_MOVX Rs Rd)
2518 (set Rd tmp))
2522 ; MOVU.z [Rs],Rd [ Rd | 1000010z | Rs ]
2523 ; MOVU.z [Rs+],Rd [ Rd | 1100010z | Rs ]
2526 "[${Rs}${inc}],${Rd}"
2527 (+ INDIR_MOVX Rs Rd)
2535 (set Rd tmp))
2579 ; MOVE Ps,Rd [ Ps | 01100111 | Rd ]
2580 ; Note that in the insn format, the Rd operand is in the Rs field (the
2581 ; Rd field by the definition used everywhere else is the Ps position in
2598 "move ${Ps},${Rd-sfield}"
2599 (+ Ps RFIX_MOVE_S_R MODE_REGISTER SIZE_FIXED Rd-sfield)
2605 ; (set grno (regno Rd-sfield))
2614 (set-subreg-gr (.car2 r) (regno Rd-sfield) newval)))
2728 ; MOVE Ps,[Rd] [ Ps | 10100111 | Rd ]
2729 ; MOVE Ps,[Rd+] [ Ps | 11100111 | Rd ]
2740 "move ${Ps},[${Rd-sfield}${inc}]"
2741 (+ INFIX_MOVE_S_M SIZE_FIXED Rd-sfield Ps)
2752 (cris-set-mem (.car2 r) Rd-sfield Ps)))
2765 "sbfs [${Rd-sfield}${inc}]"
2766 (+ (f-dest 3) INFIX_SBFS SIZE_FIXED MODEMEMP_YES inc Rd-sfield)
2770 ; MOVE Ss,Rd [ Ss | 11110111 | Rd ]
2775 "move ${Ss},${Rd-sfield}"
2776 (+ Ss INFIX_MOVE_SS SIZE_FIXED (f-mode 3) Rd-sfield)
2779 (set Rd-sfield Ss)
2796 ; MOVEM Rs,[Rd] [ Rs | 10111111 | Rd ]
2797 ; MOVEM Rs,[Rd+] [ Rs | 11111111 | Rd ]
2814 "movem ${Rs-dfield},[${Rd-sfield}${inc}]"
2815 (+ INFIX_MOVEM_R_M MODEMEMP_YES inc SIZE_FIXED Rs-dfield Rd-sfield)
2831 Rd-sfield
2840 (set Rd-sfield
2850 "movem ${Rs-dfield},[${Rd-sfield}${inc}]"
2851 (+ INFIX_MOVEM_R_M MODEMEMP_YES inc SIZE_FIXED Rs-dfield Rd-sfield)
2862 (set addr Rd-sfield)
2870 (set Rd-sfield addr))
2878 ; MOVEM [Rs],Rd [ Rd | 10111011 | Rs ]
2879 ; MOVEM [Rs+],Rd [ Rd | 11111011 | Rs ]
2885 (if (ge SI (regno Rd) regn)
2897 "movem [${Rs}${inc}],${Rd}"
2898 (+ Rd INFIX_MOVEM_M_R MODEMEMP_YES inc SIZE_FIXED Rs)
2914 (sequence ((SI dummy)) (set dummy Rd))
2941 "movem [${Rs}${inc}],${Rd}"
2986 "movem [${Rs}${inc}],${Rd}"
2987 (+ INFIX_MOVEM_M_R MODEMEMP_YES inc SIZE_FIXED Rs Rd)
2999 (sequence ((SI dummy)) (set dummy Rd))
3016 ; ADD.m Rs,Rd [ Rd | 011000mm | Rs ]
3019 "$Rs,$Rd"
3020 (+ Rd MODE_REGISTER R_ADD Rs)
3021 (.pmacro (BWD) (cris-arit add BWD Rd Rs))
3024 ; ADD.m [Rs],Rd [ Rd | 101000mm | Rs ]
3025 ; ADD.m [Rs+],Rd [ Rd | 111000mm | Rs ]
3028 "[${Rs}${inc}],${Rd}"
3029 (+ INDIR_ADD Rs Rd)
3030 (.pmacro (BWD) (cris-arit-3op add BWD Rd (cris-get-mem BWD Rs) Rs))
3032 ; (ADD.m [PC+],Rd [ Rd | 111000mm | 1111 ])
3035 "add.b ${sconst8}],${Rd}"
3036 (+ Rd MODE_AUTOINCREMENT INDIR_ADD SIZE_BYTE (f-source 15) sconst8)
3037 (cris-arit add QI Rd sconst8)
3042 "add.w ${sconst16}],${Rd}"
3043 (+ Rd MODE_AUTOINCREMENT INDIR_ADD SIZE_WORD (f-source 15) sconst16)
3044 (cris-arit add HI Rd sconst16)
3049 "add.d ${const32}],${Rd}"
3050 (+ Rd MODE_AUTOINCREMENT INDIR_ADD SIZE_DWORD (f-source 15) const32)
3051 (cris-arit add SI Rd const32)
3071 ; ADDS.z Rs,Rd [ Rd | 0100001z | Rs ]
3074 "$Rs,$Rd"
3075 (+ Rd MODE_REGISTER R_ADDX Rs)
3076 (.pmacro (BW) (cris-arit add SI Rd ((.sym BW -ext) (trunc BW Rs))))
3079 ; ADDS.z [Rs],Rd [ Rd | 1000001z | Rs ]
3080 ; ADDS.z [Rs+],Rd [ Rd | 1100001z | Rs ]
3083 "[${Rs}${inc}],$Rd"
3084 (+ Rd INDIR_ADDX Rs)
3085 (.pmacro (BW) (cris-arit-3op add SI Rd ((.sym BW -ext) (cris-get-mem BW Rs)) Rs))
3088 ; (ADDS.z [PC+],Rd [ Rd | 1100001z | 1111 ])
3091 "[${Rs}${inc}],$Rd"
3092 (+ Rd MODE_AUTOINCREMENT INDIR_ADDX SIGNED_BYTE (f-source 15) sconst8)
3093 (cris-arit add SI Rd (ext SI (trunc QI sconst8)))
3097 "[${Rs}${inc}],$Rd"
3098 (+ Rd MODE_AUTOINCREMENT INDIR_ADDX SIGNED_WORD (f-source 15) sconst16)
3099 (cris-arit add SI Rd (ext SI (trunc HI sconst16)))
3127 ; ADDU.z Rs,Rd [ Rd | 0100000z | Rs ]
3130 "$Rs,$Rd"
3131 (+ Rd MODE_REGISTER R_ADDX Rs)
3132 (.pmacro (BW) (cris-arit add SI Rd ((.sym BW -zext) (trunc BW Rs))))
3135 ; ADDU.z [Rs],Rd [ Rd | 1000000z | Rs ]
3136 ; ADDU.z [Rs+],Rd [ Rd | 1100000z | Rs ]
3139 "[${Rs}${inc}],$Rd"
3140 (+ Rd INDIR_ADDX Rs)
3142 (cris-arit-3op add SI Rd ((.sym BW -zext) (cris-get-mem BW Rs)) Rs))
3145 ; (ADDU.z [PC+],Rd [ Rd | 1100000z | 1111 ])
3148 "[${Rs}${inc}],$Rd"
3149 (+ Rd MODE_AUTOINCREMENT INDIR_ADDX UNSIGNED_BYTE (f-source 15) sconst8)
3150 (cris-arit add SI Rd (zext SI (trunc QI sconst8)))
3154 "[${Rs}${inc}],$Rd"
3155 (+ Rd MODE_AUTOINCREMENT INDIR_ADDX UNSIGNED_WORD (f-source 15) sconst16)
3156 (cris-arit add SI Rd (zext SI (trunc HI sconst16)))
3159 ; SUB.m Rs,Rd [ Rd | 011010mm | Rs ]
3162 "$Rs,$Rd"
3163 (+ Rd MODE_REGISTER R_SUB Rs)
3164 (.pmacro (BWD) (cris-arit sub BWD Rd Rs))
3167 ; SUB.m [Rs],Rd [ Rd | 101010mm | Rs ]
3168 ; SUB.m [Rs+],Rd [ Rd | 111010mm | Rs ]
3171 "[${Rs}${inc}],${Rd}"
3172 (+ INDIR_SUB Rs Rd)
3173 (.pmacro (BWD) (cris-arit-3op sub BWD Rd (cris-get-mem BWD Rs) Rs))
3176 ; (SUB.m [PC+],Rd [ Rd | 111010mm | 1111 ]
3179 "sub.b ${sconst8}],${Rd}"
3180 (+ Rd MODE_AUTOINCREMENT INDIR_SUB SIZE_BYTE (f-source 15) sconst8)
3181 (cris-arit sub QI Rd sconst8)
3186 "sub.w ${sconst16}],${Rd}"
3187 (+ Rd MODE_AUTOINCREMENT INDIR_SUB SIZE_WORD (f-source 15) sconst16)
3188 (cris-arit sub HI Rd sconst16)
3193 "sub.d ${const32}],${Rd}"
3194 (+ Rd MODE_AUTOINCREMENT INDIR_SUB SIZE_DWORD (f-source 15) const32)
3195 (cris-arit sub SI Rd const32)
3198 ; SUBS.z Rs,Rd [ Rd | 0100101z | Rs ]
3201 "$Rs,$Rd"
3202 (+ Rd MODE_REGISTER R_SUBX Rs)
3203 (.pmacro (BW) (cris-arit sub SI Rd ((.sym BW -ext) (trunc BW Rs))))
3206 ; SUBS.z [Rs],Rd [ Rd | 1000101z | Rs ]
3207 ; SUBS.z [Rs+],Rd [ Rd | 1100101z | Rs ]
3210 "[${Rs}${inc}],$Rd"
3211 (+ Rd INDIR_SUBX Rs)
3213 (cris-arit-3op sub SI Rd ((.sym BW -ext) (cris-get-mem BW Rs)) Rs))
3216 ; (SUBS.z [PC+],Rd [ Rd | 1100101z | 1111 ])
3219 "[${Rs}${inc}],$Rd"
3220 (+ Rd MODE_AUTOINCREMENT INDIR_SUBX SIGNED_BYTE (f-source 15) sconst8)
3221 (cris-arit sub SI Rd (ext SI (trunc QI sconst8)))
3225 "[${Rs}${inc}],$Rd"
3226 (+ Rd MODE_AUTOINCREMENT INDIR_SUBX SIGNED_WORD (f-source 15) sconst16)
3227 (cris-arit sub SI Rd (ext SI (trunc HI sconst16)))
3230 ; SUBU.z Rs,Rd [ Rd | 0100100z | Rs ]
3233 "$Rs,$Rd"
3234 (+ Rd MODE_REGISTER R_SUBX Rs)
3235 (.pmacro (BW) (cris-arit sub SI Rd ((.sym BW -zext) (trunc BW Rs))))
3238 ; SUBU.z [Rs],Rd [ Rd | 1000100z | Rs ]
3239 ; SUBU.z [Rs+],Rd [ Rd | 1100100z | Rs ]
3242 "[${Rs}${inc}],$Rd"
3243 (+ Rd INDIR_SUBX Rs)
3245 (cris-arit-3op sub SI Rd ((.sym BW -zext) (cris-get-mem BW Rs)) Rs))
3248 ; (SUBU.z [PC+],Rd [ Rd | 1100100z | 1111 ])
3251 "[${Rs}${inc}],$Rd"
3252 (+ Rd MODE_AUTOINCREMENT INDIR_SUBX UNSIGNED_BYTE (f-source 15) sconst8)
3253 (cris-arit sub SI Rd (zext SI (trunc QI sconst8)))
3257 "[${Rs}${inc}],$Rd"
3258 (+ Rd MODE_AUTOINCREMENT INDIR_SUBX UNSIGNED_WORD (f-source 15) sconst16)
3259 (cris-arit sub SI Rd (zext SI (trunc HI sconst16)))
3262 ; ADDC Rs,Rd [ Rd | 01010111 | Rs ]
3266 "addc $Rs,$Rd"
3267 (+ Rd MODE_REGISTER RFIX_ADDC SIZE_FIXED Rs)
3268 ; Since this is equivalent to "ax" plus "add.d Rs,Rd", we'll just do
3273 (cris-arit add SI Rd Rs))
3276 ; ADDC [Rs],Rd [ Rd | 10011010 | Rs ]
3277 ; ADDC [Rs+],Rd [ Rd | 11011010 | Rs ]
3281 "addc [${Rs}${inc}],${Rd}"
3282 (+ Rd INDIR_ADDC SIZE_DWORD Rs)
3286 (cris-arit add SI Rd (cris-get-mem SI Rs)))
3289 ; (ADDC [Rs+],Rd [ Rd | 11011010 | 1111 ])
3293 "addc ${const32},${Rd}"
3294 (+ Rd MODE_AUTOINCREMENT INDIR_ADDC SIZE_DWORD (f-source 15) const32)
3298 (cris-arit add SI Rd const32))
3301 ; LAPC [PC+],Rd [ Rd | 11010111 1111 ]
3305 "lapc.d ${const32-pcrel},${Rd}"
3306 (+ Rd MODE_AUTOINCREMENT INFIX_LAPC SIZE_FIXED (f-source 15) const32-pcrel)
3309 (set Rd const32-pcrel)
3313 ; LAPCQ qo,Rd [ Rd | 10010111 | qo ]
3317 "lapcq ${qo},${Rd}"
3318 (+ Rd MODE_INDIRECT INFIX_LAPC SIZE_FIXED qo)
3321 (set Rd qo)
3325 ; ADDI Rs.m,Rd [ Rs | 010100mm | Rd ]
3328 "${Rs-dfield}.m,${Rd-sfield}"
3329 (+ Rd-sfield MODE_REGISTER R_ADDI Rs-dfield)
3334 (set Rd-sfield (add SI Rd-sfield (mul Rs-dfield (.sym BWD -size))))
3338 ; NEG.m Rs,Rd [ Rd | 010110mm | Rs ]
3340 neg "neg.m Rs,Rd"
3341 "$Rs,$Rd"
3342 (+ Rd MODE_REGISTER R_NEG Rs)
3343 (.pmacro (BWD) (cris-arit3 sub BWD Rd 0 Rs))
3362 ; MOVE.m Rs,[Rd] [ Rs | 101111mm | Rd ]
3363 ; MOVE.m Rs,[Rd+] [ Rs | 111111mm | Rd ]
3367 "${Rs-dfield},[${Rd-sfield}${inc}]"
3368 (+ Rs-dfield INDIR_MOVE_R_M Rd-sfield)
3374 (cris-set-mem BWD Rd-sfield tmpd)
3378 ; MULS.m Rs,Rd [ Rd | 110100mm | Rs ]
3380 muls "muls.m Rs,Rd"
3382 "$Rs,$Rd"
3383 (+ Rd MODE_MULS INDIR_MUL Rs)
3389 (set src2 (ext DI (trunc BWD Rd)))
3391 (set Rd (trunc SI tmpr))
3398 ; MULU.m Rs,Rd [ Rd | 100100mm | Rs ]
3400 mulu "mulu.m Rs,Rd"
3402 "$Rs,$Rd"
3403 (+ Rd MODE_MULU INDIR_MUL Rs)
3409 (set src2 (zext DI (trunc BWD Rd)))
3411 (set Rd (trunc SI tmpr))
3418 ; MCP Ps,Rd [ Ps | 01111111 | Rd ]
3422 "mcp $Ps,$Rd"
3423 (+ Ps MODE_REGISTER RFIX_MCP SIZE_FIXED Rd-sfield)
3428 (cris-arit5 add SI Rd-sfield Rd-sfield Ps rbit rbit))
3431 ; MSTEP Rs,Rd [ Rd | 01111111 | Rs ]
3435 "mstep $Rs,$Rd"
3436 (+ Rd MODE_REGISTER RFIX_MSTEP SIZE_FIXED Rs)
3440 (set tmpd (add (sll Rd 1) (if SI nbit tmps 0)))
3441 (set Rd tmpd)
3445 ; DSTEP Rs,Rd [ Rd | 01101111 | Rs ]
3448 "dstep $Rs,$Rd"
3449 (+ Rd MODE_REGISTER RFIX_DSTEP SIZE_FIXED Rs)
3453 (set tmp (sll Rd 1))
3455 (set Rd tmpd)
3459 ; ABS Rs,Rd [ Rd | 01101011 | Rs ]
3462 "abs $Rs,$Rd"
3463 (+ Rd MODE_REGISTER RFIX_ABS SIZE_FIXED Rs)
3467 (set Rd tmpd)
3471 ; AND.m Rs,Rd [ Rd | 011100mm | Rs ]
3474 "$Rs,$Rd"
3475 (+ Rd MODE_REGISTER R_AND Rs)
3480 (set tmpd (and BWD Rd Rs))
3481 (set-subreg-gr BWD (regno Rd) tmpd)
3485 ; AND.m [Rs],Rd [ Rd | 101100mm | Rs ]
3486 ; AND.m [Rs+],Rd [ Rd | 111100mm | Rs ]
3489 "[${Rs}${inc}],${Rd}"
3490 (+ INDIR_AND Rs Rd)
3495 (set tmpd (and BWD Rd (cris-get-mem BWD Rs)))
3498 (if SI (andif prefix-set (not inc)) (regno Rs) (regno Rd))
3503 ; (AND.m [PC+],Rd [ Rd | 111100mm | 1111 ])
3506 "and.b ${sconst8}],${Rd}"
3507 (+ Rd MODE_AUTOINCREMENT INDIR_AND SIZE_BYTE (f-source 15) sconst8)
3510 (set tmpd (and QI Rd sconst8))
3511 (set-subreg-gr QI (regno Rd) tmpd)
3517 "and.w ${sconst16}],${Rd}"
3518 (+ Rd MODE_AUTOINCREMENT INDIR_AND SIZE_WORD (f-source 15) sconst16)
3521 (set tmpd (and HI Rd sconst16))
3522 (set-subreg-gr HI (regno Rd) tmpd)
3528 "and.d ${const32}],${Rd}"
3529 (+ Rd MODE_AUTOINCREMENT INDIR_AND SIZE_DWORD (f-source 15) const32)
3532 (set tmpd (and SI Rd const32))
3533 (set-subreg-gr SI (regno Rd) tmpd)
3537 ; ANDQ i,Rd [ Rd | 001100 | i ]
3540 "andq $i,$Rd"
3541 (+ Rd MODE_QUICK_IMMEDIATE Q_ANDQ i)
3544 (set tmpd (and SI Rd i))
3545 (set-subreg-gr SI (regno Rd) tmpd)
3549 ; OR.m Rs,Rd [ Rd | 011101mm | Rs ]
3552 "$Rs,$Rd"
3553 (+ Rd MODE_REGISTER R_OR Rs)
3558 (set tmpd (or BWD Rd Rs))
3559 (set-subreg-gr BWD (regno Rd) tmpd)
3563 ; OR.m [Rs],Rd [ Rd | 101101mm | Rs ]
3564 ; OR.m [Rs+],Rd [ Rd | 111101mm | Rs ]
3567 "[${Rs}${inc}],${Rd}"
3568 (+ INDIR_OR Rs Rd)
3573 (set tmpd (or BWD Rd (cris-get-mem BWD Rs)))
3576 (if SI (andif prefix-set (not inc)) (regno Rs) (regno Rd))
3581 ; (OR.m [PC+],Rd [ Rd | 111101mm | 1111 ])
3584 "or.b ${sconst8}],${Rd}"
3585 (+ Rd MODE_AUTOINCREMENT INDIR_OR SIZE_BYTE (f-source 15) sconst8)
3588 (set tmpd (or QI Rd sconst8))
3589 (set-subreg-gr QI (regno Rd) tmpd)
3595 "or.w ${sconst16}],${Rd}"
3596 (+ Rd MODE_AUTOINCREMENT INDIR_OR SIZE_WORD (f-source 15) sconst16)
3599 (set tmpd (or HI Rd sconst16))
3600 (set-subreg-gr HI (regno Rd) tmpd)
3606 "or.d ${const32}],${Rd}"
3607 (+ Rd MODE_AUTOINCREMENT INDIR_OR SIZE_DWORD (f-source 15) const32)
3610 (set tmpd (or SI Rd const32))
3611 (set-subreg-gr SI (regno Rd) tmpd)
3615 ; ORQ i,Rd [ Rd | 001101 | i ]
3618 "orq $i,$Rd"
3619 (+ Rd MODE_QUICK_IMMEDIATE Q_ORQ i)
3622 (set tmpd (or SI Rd i))
3623 (set-subreg-gr SI (regno Rd) tmpd)
3627 ; XOR Rs,Rd [ Rd | 01111011 | Rs ]
3630 "xor $Rs,$Rd"
3631 (+ Rd MODE_REGISTER RFIX_XOR SIZE_FIXED Rs)
3634 (set tmpd (xor SI Rd Rs))
3635 (set Rd tmpd)
3716 ; NOT Rd alias for SWAPN Rd
3721 (+ (f-dest 8) RFIX_SWAP MODE_REGISTER SIZE_FIXED Rd-sfield)
3724 (set tmp Rd-sfield)
3726 (set Rd-sfield tmpd)
3730 ; SWAP<option> Rd [ N W B R | 01110111 | Rd ]
3735 (+ swapoption RFIX_SWAP MODE_REGISTER SIZE_FIXED Rd-sfield)
3738 (set tmps Rd-sfield)
3740 (set Rd-sfield tmpd)
3744 ; ASR.m Rs,Rd [ Rd | 011110mm | Rs ]
3747 "$Rs,$Rd"
3748 (+ Rd MODE_REGISTER R_ASR Rs)
3755 (set tmpd (sra SI (ext SI (trunc BWD Rd)) cnt2))
3756 (set-subreg-gr BWD (regno Rd) tmpd)
3760 ; ASRQ c,Rd [ Rd | 0011101 | c ]
3763 "asrq $c,${Rd}"
3764 (+ Rd Q_ASHQ MODE_QUICK_IMMEDIATE (f-b5 1) c)
3767 (set tmpd (sra Rd c))
3768 (set Rd tmpd)
3772 ; LSR.m Rs,Rd [ Rd | 011111mm | Rs ]
3775 "$Rs,$Rd"
3776 (+ Rd MODE_REGISTER R_LSR Rs)
3786 (srl SI (zext SI (trunc BWD Rd)) (and cnt 31))))
3787 (set-subreg-gr BWD (regno Rd) tmpd)
3791 ; LSRQ c,Rd [ Rd | 0011111 | c ]
3794 "lsrq $c,${Rd}"
3795 (+ Rd Q_LSHQ MODE_QUICK_IMMEDIATE (f-b5 1) c)
3798 (set tmpd (srl Rd c))
3799 (set Rd tmpd)
3803 ; LSL.m Rs,Rd [ Rd | 010011mm | Rs ]
3806 "$Rs,$Rd"
3807 (+ Rd MODE_REGISTER R_LSL Rs)
3817 (sll SI (zext SI (trunc BWD Rd)) (and cnt 31))))
3818 (set-subreg-gr BWD (regno Rd) tmpd)
3822 ; LSLQ c,Rd [ Rd | 0011110 | c ]
3825 "lslq $c,${Rd}"
3826 (+ Rd Q_LSHQ MODE_QUICK_IMMEDIATE (f-b5 0) c)
3829 (set tmpd (sll Rd c))
3830 (set Rd tmpd)
3834 ; BTST Rs,Rd [ Rd | 01001111 | Rs ]
3837 "$Rs,$Rd"
3838 (+ Rd MODE_REGISTER RFIX_BTST SIZE_FIXED Rs)
3841 (set tmpd (sll Rd (sub 31 (and Rs 31))))
3845 ; BTSTQ c,Rd [ Rd | 0011100 | c ]
3848 "btstq $c,${Rd}"
3849 (+ Rd Q_ASHQ MODE_QUICK_IMMEDIATE (f-b5 0) c)
3852 (set tmpd (sll Rd (sub 31 c)))
4223 ; BOUND.m Rs,Rd [ Rd | 010111mm | Rs ]
4226 "${Rs},${Rd}"
4227 (+ Rd R_BOUND MODE_REGISTER Rs)
4233 (set tmpopd Rd)
4235 (set Rd newval)
4239 ; BOUND.m [Rs],Rd [ Rd | 100111mm | Rs ]
4240 ; BOUND.m [Rs+],Rd [ Rd | 110111mm | Rs ]
4244 "[${Rs}${inc}],${Rd}"
4245 (+ Rd INDIR_BOUND Rs)
4251 (set tmpopd Rd)
4255 (set Rd newval))
4259 ; (BOUND.m [PC+],Rd [ Rd | 110111mm | 1111 ])
4262 "bound.b [PC+],${Rd}"
4263 (+ Rd MODE_AUTOINCREMENT INDIR_BOUND SIZE_BYTE (f-source 15) uconst8)
4267 (set tmpopd Rd)
4269 (set Rd newval)
4274 "bound.w [PC+],${Rd}"
4275 (+ Rd MODE_AUTOINCREMENT INDIR_BOUND SIZE_WORD (f-source 15) uconst16)
4279 (set tmpopd Rd)
4281 (set Rd newval)
4286 "bound.d [PC+],${Rd}"
4287 (+ Rd MODE_AUTOINCREMENT INDIR_BOUND SIZE_DWORD (f-source 15) const32)
4291 (set tmpopd Rd)
4293 (set Rd newval)
4297 ; Scc Rd [ cc | 01010011 | Rd ]
4300 "s${cc} ${Rd-sfield}"
4301 (+ cc MODE_REGISTER RFIX_SCC SIZE_FIXED Rd-sfield)
4305 (set Rd-sfield (zext SI truthval))
4309 ; LZ Rs,Rd [ Rd | 01110011 | Rs ]
4313 "lz ${Rs},${Rd}"
4314 (+ Rd MODE_REGISTER RFIX_LZ SIZE_FIXED Rs)
4331 (set Rd tmpd)
4422 ; ADDO.m [Rs],Rd,ACR [ Rd | 100101mm | Rs ]
4423 ; ADDO.m [Rs+],Rd,ACR [ Rd | 110101mm | Rs ]
4426 "[${Rs}${inc}],$Rd,ACR"
4427 (+ Rd INDIR_ADDO Rs)
4433 (set prefixreg (add SI Rd ((.sym BWD -ext) tmps)))
4437 ; (ADDO.m [PC+],Rd,ACR [ Rd | 110101mm | 1111 ]
4440 "addo.b [PC+],$Rd,ACR"
4441 (+ Rd MODE_AUTOINCREMENT INDIR_ADDO SIZE_BYTE (f-source 15) sconst8)
4444 (set prefixreg (add SI Rd (ext SI (trunc QI sconst8))))
4449 "addo.w [PC+],$Rd,ACR"
4450 (+ Rd MODE_AUTOINCREMENT INDIR_ADDO SIZE_WORD (f-source 15) sconst16)
4453 (set prefixreg (add SI Rd (ext SI (trunc HI sconst16))))
4458 "addo.d [PC+],$Rd,ACR"
4459 (+ Rd MODE_AUTOINCREMENT INDIR_ADDO SIZE_DWORD (f-source 15) const32)
4462 (set prefixreg (add SI Rd const32))
4492 ; ADDI Rs.m,Rd,ACR [ Rs | 010101mm | Rd ]
4496 "${Rs-dfield}.m,${Rd-sfield},ACR"
4497 (+ Rd-sfield MODE_REGISTER R_ADDI_ACR Rs-dfield)
4502 (set prefixreg (add SI Rd-sfield (mul Rs-dfield (.sym BWD -size))))