Lines Matching refs:fr
163 ; TO_W writes result to W regiser (eg. ADDC W,$fr)
164 ; NOTTO_W writes result in general register (eg. ADDC $fr,W)
282 (define-operand (name fr) (comment "register") (attrs)
283 (type h-registers) (index f-reg) (handlers (parse "fr") (print "fr")))
325 ; Check to see if an fr is one of IPL, SPL, DPL, ADDRL, PCL.
363 "sb $fr,$bitno"
364 (+ OP4_SB bitno fr)
365 (if (and fr (sll 1 bitno))
372 "snb $fr,$bitno"
373 (+ OP4_SNB bitno fr)
374 (if (not (and fr (sll 1 bitno)))
381 "setb $fr,$bitno"
382 (+ OP4_SETB bitno fr)
383 (set fr (or fr (sll 1 bitno)))
389 "clrb $fr,$bitno"
390 (+ OP4_CLRB bitno fr)
391 (set fr (and fr (inv (sll 1 bitno))))
565 (dni addcfr_w "Add w/carry fr,W"
567 "addc $fr,W"
568 (+ OP6_ADDC DIR_NOTTO_W fr)
570 (set newcbit (add-cflag w fr cbit))
571 (set dcbit (add-dcflag w fr cbit))
572 ;; If fr is an Lreg, then we have to do 16-bit arithmetic.
588 (set result (addc w fr cbit)) ;; else part
593 (set fr result))
597 (dni addcw_fr "Add w/carry W,fr"
599 "addc W,$fr"
600 (+ OP6_ADDC DIR_TO_W fr)
602 (set newcbit (add-cflag w fr cbit))
603 (set dcbit (add-dcflag w fr cbit))
604 (set result (addc w fr cbit))
612 (dni incsnz_fr "Skip if fr++ not zero"
614 "incsnz $fr"
615 (+ OP6_INCSNZ DIR_NOTTO_W fr)
618 ;; If fr is an Lreg, then we have to do 16-bit arithmetic.
634 (set fr (reg h-spr (ifield f-reg)))
636 (set fr (add fr 1)) ; Do 8 bit arithmetic.
638 (if (not (zflag fr))
643 (dni incsnzw_fr "Skip if W=fr+1 not zero"
645 "incsnz W,$fr"
646 (+ OP6_INCSNZ DIR_TO_W fr)
648 (set w (add fr 1))
654 (dni mulsw_fr "Multiply W,fr (signed)"
656 "muls W,$fr"
657 (+ OP6_MULS DIR_TO_W fr)
659 (set tmp (mul (ext SI w) (ext SI fr)))
665 (dni muluw_fr "Multiply W,fr (unsigned)"
667 "mulu W,$fr"
668 (+ OP6_MULU DIR_TO_W fr)
670 (set tmp (and #xFFFF (mul (zext USI w) (zext USI fr))))
676 (dni decsnz_fr "Skip if fr-- not zero"
678 "decsnz $fr"
679 (+ OP6_DECSNZ DIR_NOTTO_W fr)
682 ;; If fr is an Lreg, then we have to do 16-bit arithmetic.
698 (set fr (reg h-spr (ifield f-reg)))
701 (set fr (sub fr 1))
703 (if (not (zflag fr))
708 (dni decsnzw_fr "Skip if W=fr-1 not zero"
710 "decsnz W,$fr"
711 (+ OP6_DECSNZ DIR_TO_W fr)
713 (set w (sub fr 1))
719 (dni subcw_fr "Subract w/carry W,fr"
721 "subc W,$fr"
722 (+ OP6_SUBC DIR_TO_W fr)
724 (set newcbit (not (sub-cflag fr w (not cbit))))
725 (set dcbit (not (sub-dcflag fr w (not cbit))))
726 (set result (subc fr w (not cbit)))
733 (dni subcfr_w "Subtract w/carry fr,W"
735 "subc $fr,W"
736 (+ OP6_SUBC DIR_NOTTO_W fr)
738 (set newcbit (not (sub-cflag fr w (not cbit))))
739 (set dcbit (not (sub-dcflag fr w (not cbit))))
741 ;; If fr is an Lreg, then we have to do 16-bit arithmetic.
760 (set result (subc fr w (not cbit)))
766 (set fr result))
771 (dni pop_fr "Pop fr"
773 "pop $fr"
774 (+ OP6_POP (f-dir 1) fr)
776 (set fr (c-call QI "pop"))
782 (dni push_fr "Push fr"
784 "push $fr"
785 (+ OP6_POP (f-dir 0) fr)
787 (c-call "push" fr)
793 (dni csew_fr "Skip if equal W,fr"
795 "cse W,$fr"
796 (+ OP6_CSE (f-dir 1) fr)
797 (if (eq w fr)
802 (dni csnew_fr "Skip if not-equal W,fr"
804 "csne W,$fr"
805 (+ OP6_CSE (f-dir 0) fr)
806 (if (not (eq w fr))
811 ;;(dni csaw_fr "Skip if W above fr"
813 ;; "csa W,$fr"
814 ;; (+ OP6_CSAB (f-dir 1) fr)
815 ;; (if (gt w fr)
820 ;;(dni csbw_fr "Skip if W below fr"
822 ;; "csb W,$fr"
823 ;; (+ OP6_CSAB (f-dir 0) fr)
824 ;; (if (lt w fr)
829 (dni incsz_fr "Skip if fr++ zero"
831 "incsz $fr"
832 (+ OP6_INCSZ DIR_NOTTO_W fr)
835 ;; If fr is an Lreg, then we have to do 16-bit arithmetic.
851 (set fr (reg h-spr (ifield f-reg)))
854 (set fr (add fr 1))
856 (if (zflag fr)
861 (dni incszw_fr "Skip if W=fr+1 zero"
863 "incsz W,$fr"
864 (+ OP6_INCSZ DIR_TO_W fr)
866 (set w (add fr 1))
872 (dni swap_fr "Swap fr nibbles"
874 "swap $fr"
875 (+ OP6_SWAP DIR_NOTTO_W fr)
876 (set fr (or (and (sll fr 4) #xf0)
877 (and (srl fr 4) #x0f)))
881 (dni swapw_fr "Swap fr nibbles into W"
883 "swap W,$fr"
884 (+ OP6_SWAP DIR_TO_W fr)
885 (set w (or (and (sll fr 4) #xf0)
886 (and (srl fr 4) #x0f)))
890 (dni rl_fr "Rotate fr left with carry"
892 "rl $fr"
893 (+ OP6_RL DIR_NOTTO_W fr)
895 (set newc (and fr #x80))
896 (set newfr (or (sll fr 1) (if QI cbit 1 0)))
898 (set fr newfr))
902 (dni rlw_fr "Rotate fr left with carry into W"
904 "rl W,$fr"
905 (+ OP6_RL DIR_TO_W fr)
907 (set newc (and fr #x80))
908 (set newfr (or (sll fr 1) (if QI cbit 1 0)))
914 (dni rr_fr "Rotate fr right with carry"
916 "rr $fr"
917 (+ OP6_RR DIR_NOTTO_W fr)
919 (set newc (and fr #x01))
920 (set newfr (or (srl fr 1) (if QI cbit #x80 #x00)))
922 (set fr newfr))
926 (dni rrw_fr "Rotate fr right with carry into W"
928 "rr W,$fr"
929 (+ OP6_RR DIR_TO_W fr)
931 (set newc (and fr #x01))
932 (set newfr (or (srl fr 1) (if QI cbit #x80 #x00)))
938 (dni decsz_fr "Skip if fr-- zero"
940 "decsz $fr"
941 (+ OP6_DECSZ DIR_NOTTO_W fr)
944 ;; If fr is an Lreg, then we have to do 16-bit arithmetic.
960 (set fr (reg h-spr (ifield f-reg)))
963 (set fr (sub fr 1))
965 (if (zflag fr)
970 (dni decszw_fr "Skip if W=fr-1 zero"
972 "decsz W,$fr"
973 (+ OP6_DECSZ DIR_TO_W fr)
975 (set w (sub fr 1))
981 (dni inc_fr "Increment fr"
983 "inc $fr"
984 (+ OP6_INC DIR_NOTTO_W fr)
987 ;; If fr is an Lreg, then we have to do 16-bit arithmetic.
1003 (set fr (reg h-spr (ifield f-reg)))
1006 (set fr (add fr 1))
1008 (set zbit (zflag fr)))
1012 (dni incw_fr "Increment fr into w"
1014 "inc W,$fr"
1015 (+ OP6_INC DIR_TO_W fr)
1017 (set w (add fr 1))
1022 (dni not_fr "Invert fr"
1024 "not $fr"
1025 (+ OP6_NOT DIR_NOTTO_W fr)
1027 (set fr (inv fr))
1028 (set zbit (zflag fr)))
1032 (dni notw_fr "Invert fr into w"
1034 "not W,$fr"
1035 (+ OP6_NOT DIR_TO_W fr)
1037 (set w (inv fr))
1042 (dni test_fr "Test fr"
1044 "test $fr"
1045 (+ OP6_TEST DIR_NOTTO_W fr)
1047 (set zbit (zflag fr)))
1059 (dni movfr_w "Move/test w into fr"
1061 "mov $fr,W"
1062 (+ OP6_OTHER1 DIR_NOTTO_W fr)
1063 (set fr w)
1067 (dni movw_fr "Move/test fr into w"
1069 "mov W,$fr"
1070 (+ OP6_TEST DIR_TO_W fr)
1072 (set w fr)
1078 (dni addfr_w "Add fr,W"
1080 "add $fr,W"
1081 (+ OP6_ADD DIR_NOTTO_W fr)
1083 (set cbit (add-cflag w fr 0))
1084 (set dcbit (add-dcflag w fr 0))
1087 ;; If fr is an Lreg, then we have to do 16-bit arithmetic.
1102 (set result (addc w fr 0)) ;; else part
1105 (set fr result))
1109 (dni addw_fr "Add W,fr"
1111 "add W,$fr"
1112 (+ OP6_ADD DIR_TO_W fr)
1114 (set cbit (add-cflag w fr 0))
1115 (set dcbit (add-dcflag w fr 0))
1116 (set result (addc w fr 0))
1122 (dni xorfr_w "XOR fr,W"
1124 "xor $fr,W"
1125 (+ OP6_XOR DIR_NOTTO_W fr)
1127 (set fr (xor w fr))
1128 (set zbit (zflag fr)))
1132 (dni xorw_fr "XOR W,fr"
1134 "xor W,$fr"
1135 (+ OP6_XOR DIR_TO_W fr)
1137 (set w (xor fr w))
1142 (dni andfr_w "AND fr,W"
1144 "and $fr,W"
1145 (+ OP6_AND DIR_NOTTO_W fr)
1147 (set fr (and w fr))
1148 (set zbit (zflag fr)))
1152 (dni andw_fr "AND W,fr"
1154 "and W,$fr"
1155 (+ OP6_AND DIR_TO_W fr)
1157 (set w (and fr w))
1162 (dni orfr_w "OR fr,W"
1164 "or $fr,W"
1165 (+ OP6_OR DIR_NOTTO_W fr)
1167 (set fr (or w fr))
1168 (set zbit (zflag fr)))
1172 (dni orw_fr "OR W,fr"
1174 "or W,$fr"
1175 (+ OP6_OR DIR_TO_W fr)
1177 (set w (or fr w))
1182 (dni dec_fr "Decrement fr"
1184 "dec $fr"
1185 (+ OP6_DEC DIR_NOTTO_W fr)
1188 ;; If fr is an Lreg, then we have to do 16-bit arithmetic.
1204 (set fr (reg h-spr (ifield f-reg)))
1207 (set fr (sub fr 1))
1209 (set zbit (zflag fr)))
1213 (dni decw_fr "Decrement fr into w"
1215 "dec W,$fr"
1216 (+ OP6_DEC DIR_TO_W fr)
1218 (set w (sub fr 1))
1223 (dni subfr_w "Sub fr,W"
1225 "sub $fr,W"
1226 (+ OP6_SUB DIR_NOTTO_W fr)
1228 (set cbit (not (sub-cflag fr w 0)))
1229 (set dcbit (not (sub-dcflag fr w 0)))
1231 ;; If fr is an Lreg, then we have to do 16-bit arithmetic.
1250 (set result (subc fr w 0))
1253 (set fr result))
1257 (dni subw_fr "Sub W,fr"
1259 "sub W,$fr"
1260 (+ OP6_SUB DIR_TO_W fr)
1262 (set cbit (not (sub-cflag fr w 0)))
1263 (set dcbit (not (sub-dcflag fr w 0)))
1264 (set result (subc fr w 0))
1270 (dni clr_fr "Clear fr"
1272 "clr $fr"
1273 (+ OP6_OTHER2 (f-dir 1) fr)
1275 (set fr 0)
1276 (set zbit (zflag fr)))
1280 (dni cmpw_fr "CMP W,fr"
1282 "cmp W,$fr"
1283 (+ OP6_OTHER2 (f-dir 0) fr)
1285 (set cbit (not (sub-cflag fr w 0)))
1286 (set dcbit (not (sub-dcflag fr w 0)))
1287 (set zbit (zflag (sub w fr))))
1448 (emit sb (bitno 0) (fr #xB)) ; sb status.0
1454 (emit snb (bitno 0) (fr #xB)) ; snb status.0
1460 (emit sb (bitno 2) (fr #xB)) ; sb status.2
1466 (emit snb (bitno 2) (fr #xB)) ; snb status.2
1472 (emit snb (bitno 0) (fr 9)) ; snb pcl.0 | (pcl&1)<<12
1478 (emit sb (bitno 0) (fr 9)) ; sb pcl.0 | (pcl&1)<<12