Lines Matching refs:IS_A1

802 	  if (IS_DREG ($1) && !IS_A1 ($4) && IS_A1 ($5))
812 	  if (!IS_A1 ($4) && IS_A1 ($5))
915 	      && IS_A1 ($9) && !IS_A1 ($11))
922 		   && !IS_A1 ($9) && IS_A1 ($11))
999 	  $$ = DSP32ALU (16, IS_A1 ($1), 0, 0, &reg7, &reg7, 0, 0, IS_A1 ($3));
1166 	  $$ = DSP32ALU (14, IS_A1 ($1), 0, 0, &reg7, &reg7, 0, 0, IS_A1 ($3));
1191 	      $$ = DSP32ALU (8, 0, 0, 0, &reg7, &reg7, 1, 0, IS_A1 ($1));
1235 	      $$ = DSP32ALU (8, 0, 0, 0, &reg7, &reg7, IS_A1 ($1), 0, 3);
1246 	      $$ = DSP32ALU (9, 0, 0, 0, &$2, 0, 1, 0, IS_A1 ($1) << 1);
1299 	  $$ = DSP32ALU (8, 0, 0, 0, 0, 0, 0, 0, IS_A1 ($1));
1412 	  if (!IS_A1 ($1) && IS_A1 ($2))
1472 	  if (!IS_A1 ($1) && IS_A1 ($3))
1938 	      $$ = DSP32SHIFT (3, 0, &$5, 0, 0, IS_A1 ($1));
1963 	      $$ = DSP32SHIFTIMM (3, 0, imm5 ($4), 0, 0, IS_A1 ($1));
2117 	      $$ = DSP32SHIFTIMM (3, 0, -imm6 ($4), 0, 0, IS_A1 ($1));
2127 	      $$ = DSP32SHIFT (3, 0, &$5, 0, 1, IS_A1 ($1));
2171 	      $$ = DSP32SHIFTIMM (3, 0, -imm6 ($4), 0, 1, IS_A1 ($1));
2279 	      && IS_DREG ($9) && !IS_H ($1) && !IS_A1 ($7))
2292 	      && IS_DREG ($9) && !IS_H ($1) && !IS_A1 ($7))
2317 	      $$ = DSP32SHIFT (3, 0, &$5, 0, 2, IS_A1 ($1));
2339 	      $$ = DSP32SHIFTIMM (3, 0, imm6 ($5), 0, 2, IS_A1 ($1));
2349 	      $$ = DSP32SHIFTIMM (2, &$1, imm6 ($6), &$4, 3, IS_A1 ($1));
2360 	      $$ = DSP32SHIFT (6, &$1, 0, 0, IS_A1 ($4), 0);
2416 	  if (IS_DREG ($3) && IS_DREG ($5) && !IS_A1 ($7))
2427 	  if (!IS_A1 ($1) && !IS_A1 ($4) && IS_A1 ($6))
3645 	  $$ = bfin_gen_pseudodbg (3, IS_A1 ($2), 0);
4227 	  if (IS_A1 ($3) && IS_EVEN ($1))
4229 	  else if (!IS_A1 ($3) && !IS_EVEN ($1))
4234           $$.n = IS_A1 ($3);
4274 	  if (IS_A1 ($3) && !IS_H ($1))
4276 	  else if (!IS_A1 ($3) && IS_H ($1))
4281 	  $$.n = IS_A1 ($3);
4292 	  $$.n = IS_A1 ($1);
4299 	  $$.n = IS_A1 ($1);
4306 	  $$.n = IS_A1 ($1);