Lines Matching refs:IS_H
127 #define HL2(r1, r0) (IS_H (r1) << 1 | IS_H (r0))
754 h00 = IS_H ($1.s0);
755 h10 = IS_H ($1.s1);
765 h01 = IS_H ($1.s0);
766 h11 = IS_H ($1.s1);
789 IS_H ($1.s0), IS_H ($1.s1), IS_H ($4.s0), IS_H ($4.s1),
815 $$ = DSP32ALU (11, IS_H ($1), 0, &$1, ®7, ®7, 0, 0, 1);
823 $$ = DSP32ALU (9, IS_H ($3), 0, 0, &$3, 0, 0, 0, 0);
828 $$ = DSP32ALU (9, IS_H ($3), 0, 0, &$3, 0, 0, 0, 2);
1006 $$ = DSP32ALU (9, IS_H ($3), 0, 0, &$3, 0, 0, 0, 0);
1016 $$ = DSP32ALU (9, IS_H ($3), 0, 0, &$3, 0, 0, 0, 2);
1171 $$ = DSP32ALU (2 | $4.r0, IS_H ($1), 0, &$1, &$3, &$5,
1202 $$ = DSP32ALU (12, IS_H ($1), 0, &$1, &$3, 0, 0, 0, 3);
1213 $$ = DSP32ALU (5, IS_H ($1), 0, &$1, &$3, &$5, 0, 0, $4.r0);
1224 $$ = DSP32ALU (5, IS_H ($1), 0, &$1, &$3, &$5, 0, 1, $4.r0 | 2);
1254 if (!IS_H ($3))
1289 $$ = LDIMMHALF_R (&$1, IS_H ($1), 0, 0, $3);
1349 if (IS_H ($1))
1818 if (!IS_H ($1) && $4.MM)
1826 if (IS_H ($1))
1829 IS_H ($3.s0), IS_H ($3.s1), 0, 0,
1835 0, 0, IS_H ($3.s0), IS_H ($3.s1),
1858 IS_H ($3.s0), IS_H ($3.s1), 0, 0,
1865 0, 0, IS_H ($3.s0), IS_H ($3.s1),
1882 if ((!IS_H ($1) && $4.MM)
1883 || (!IS_H ($6) && $9.MM))
1889 if (IS_H ($1))
1891 IS_H ($3.s0), IS_H ($3.s1), IS_H ($8.s0), IS_H ($8.s1),
1895 IS_H ($8.s0), IS_H ($8.s1), IS_H ($3.s0), IS_H ($3.s1),
1920 IS_H ($8.s0), IS_H ($8.s1), IS_H ($3.s0), IS_H ($3.s1),
1924 IS_H ($3.s0), IS_H ($3.s1), IS_H ($8.s0), IS_H ($8.s1),
1935 if (IS_DREG ($5) && !IS_H ($5))
1946 if (IS_DREG ($6) && !IS_H ($6))
2025 if (IS_DREG ($1) && IS_DREG ($4) && IS_DREG ($6) && !IS_H ($6))
2279 && IS_DREG ($9) && !IS_H ($1) && !IS_A1 ($7))
2292 && IS_DREG ($9) && !IS_H ($1) && !IS_A1 ($7))
2303 if (IS_DREG ($1) && !IS_H ($1) && !REG_SAME ($7, $9))
2382 $$ = DSP32SHIFT (5, &$1, 0, &$4, 1 + IS_H ($4), 0);
3090 $$ = DSPLDST (&$3, 1 + IS_H ($7), &$7, $4.x0, 1);
3095 $$ = LDSTPMOD (&$3, &$7, &$3, 1 + IS_H ($7), 1);
3180 $$ = DSPLDST(&$5, 1 + IS_H ($1), &$1, $6.x0, 0);
3185 $$ = LDSTPMOD (&$5, &$1, &$5, 1 + IS_H ($1), 0);
3220 $$ = LDSTPMOD (&$5, &$1, &$7, 1 + IS_H ($1), 0);
3276 $$ = LDSTPMOD (&$3, &$8, &$5, 1 + IS_H ($8), 1);
3676 $$ = bfin_gen_pseudodbg_assert (IS_H ($3), &$3, uimm16 ($5));
4261 if ($4.n && !IS_H ($1))
4263 else if (!$4.n && IS_H ($1))
4274 if (IS_A1 ($3) && !IS_H ($1))
4276 else if (!IS_A1 ($3) && IS_H ($1))