2000 #define DREG_MASK(n) (0x101 << (n))  macro
2035     return DREG_MASK (reg);  in decode_LDSTpmod_0()
2041     return DREG_MASK (reg);  in decode_LDSTpmod_0()
2043     return DREG_MASK (reg);  in decode_LDSTpmod_0()
2100     return DREG_MASK (reg) | IREG_MASK (i);  in decode_dspLDST_0()
2106     return DREG_MASK (reg) | IREG_MASK (i);  in decode_dspLDST_0()
2112     return DREG_MASK (reg);  in decode_dspLDST_0()
2136     return DREG_MASK (reg) | IREG_MASK (i);  in decode_dspLDST_0()
2158     return DREG_MASK (reg);  in decode_LDST_0()
2162     return DREG_MASK (reg);  in decode_LDST_0()
2164     return DREG_MASK (reg);  in decode_LDST_0()
2166     return DREG_MASK (reg);  in decode_LDST_0()
2168     return DREG_MASK (reg);  in decode_LDST_0()
2170     return DREG_MASK (reg);  in decode_LDST_0()
2174     return DREG_MASK (reg);  in decode_LDST_0()
2176     return DREG_MASK (reg);  in decode_LDST_0()
2178     return DREG_MASK (reg);  in decode_LDST_0()
2180     return DREG_MASK (reg);  in decode_LDST_0()
2182     return DREG_MASK (reg);  in decode_LDST_0()
2186     return DREG_MASK (reg);  in decode_LDST_0()
2188     return DREG_MASK (reg);  in decode_LDST_0()
2190     return DREG_MASK (reg);  in decode_LDST_0()
2192     return DREG_MASK (reg);  in decode_LDST_0()
2232     return reg < 8 ? DREG_MASK (reg) : 0;  in decode_LDSTiiFP_0()
2249     return DREG_MASK (reg);  in decode_LDSTii_0()
2297 	    return DREG_MASK (dst + 1);  in decode_dsp32mac_0()
2308 	    return DREG_MASK (dst);  in decode_dsp32mac_0()
2341 	return DREG_MASK (dst | 1);  in decode_dsp32mult_0()
2349 	return DREG_MASK (dst);  in decode_dsp32mult_0()
2399     return DREG_MASK (dst0);  in decode_dsp32alu_0()
2405     return DREG_MASK (dst0);  in decode_dsp32alu_0()
2413     return DREG_MASK (dst0);  in decode_dsp32alu_0()
2425     return DREG_MASK (dst0);  in decode_dsp32alu_0()
2427     return DREG_MASK (dst0);  in decode_dsp32alu_0()
2430     return DREG_MASK (dst0);  in decode_dsp32alu_0()
2432     return DREG_MASK (dst0) | DREG_MASK (dst1);  in decode_dsp32alu_0()
2437     return DREG_MASK (dst0);  in decode_dsp32alu_0()
2439     return DREG_MASK (dst0) | DREG_MASK (dst1);  in decode_dsp32alu_0()
2447     return DREG_MASK (dst0);  in decode_dsp32alu_0()
2449     return DREG_MASK (dst0) | DREG_MASK (dst1);  in decode_dsp32alu_0()
2452     return DREG_MASK (dst0) | DREG_MASK (dst1);  in decode_dsp32alu_0()
2454     return DREG_MASK (dst0) | DREG_MASK (dst1);  in decode_dsp32alu_0()
2461     return DREG_MASK (dst0);  in decode_dsp32alu_0()
2464     return DREG_MASK (dst0);  in decode_dsp32alu_0()
2467     return DREG_MASK (dst0) | DREG_MASK (dst1);  in decode_dsp32alu_0()
2470     return DREG_MASK (dst0);  in decode_dsp32alu_0()
2472     return DREG_MASK (dst0);  in decode_dsp32alu_0()
2475     return DREG_MASK (dst0);  in decode_dsp32alu_0()
2477     return DREG_MASK (dst0) | DREG_MASK (dst1);  in decode_dsp32alu_0()
2479     return DREG_MASK (dst0) | DREG_MASK (dst1);  in decode_dsp32alu_0()
2514     return DREG_MASK (dst0);  in decode_dsp32shift_0()
2516     return DREG_MASK (dst0);  in decode_dsp32shift_0()
2518     return DREG_MASK (dst0);  in decode_dsp32shift_0()
2520     return DREG_MASK (dst0);  in decode_dsp32shift_0()
2522     return DREG_MASK (dst0);  in decode_dsp32shift_0()
2524     return DREG_MASK (dst0);  in decode_dsp32shift_0()
2546     return DREG_MASK (src0) | DREG_MASK (src1);  in decode_dsp32shift_0()
2557     return DREG_MASK (src0) | DREG_MASK (src1);  in decode_dsp32shift_0()
2568     return sop < 2 ? DREGL_MASK (dst0) : DREG_MASK (dst0);  in decode_dsp32shift_0()
2570     return DREG_MASK (dst0);  in decode_dsp32shift_0()
2580     return DREG_MASK (dst0);  in decode_dsp32shift_0()
2582     return DREG_MASK (dst0);  in decode_dsp32shift_0()
2584     return DREG_MASK (dst0);  in decode_dsp32shift_0()
2631     return DREG_MASK (dst0);  in decode_dsp32shiftimm_0()
2633     return DREG_MASK (dst0);  in decode_dsp32shiftimm_0()
2635     return DREG_MASK (dst0);  in decode_dsp32shiftimm_0()
2637     return DREG_MASK (dst0);  in decode_dsp32shiftimm_0()
2639     return DREG_MASK (dst0);  in decode_dsp32shiftimm_0()
2641     return DREG_MASK (dst0);  in decode_dsp32shiftimm_0()
2643     return DREG_MASK (dst0);  in decode_dsp32shiftimm_0()
2645     return DREG_MASK (dst0);  in decode_dsp32shiftimm_0()
2647     return DREG_MASK (dst0);  in decode_dsp32shiftimm_0()
2649     return DREG_MASK (dst0);  in decode_dsp32shiftimm_0()