Lines Matching refs:src1
1182 REG_T dst, REG_T src0, REG_T src1, int w0) in bfin_gen_dsp32mac() argument
1207 ASSIGN_R (src1); in bfin_gen_dsp32mac()
1215 REG_T dst, REG_T src0, REG_T src1, int w0) in bfin_gen_dsp32mult() argument
1238 ASSIGN_R (src1); in bfin_gen_dsp32mult()
1245 REG_T dst0, REG_T dst1, REG_T src0, REG_T src1) in bfin_gen_dsp32alu() argument
1257 ASSIGN_R (src1); in bfin_gen_dsp32alu()
1264 REG_T src1, int sop, int HLs) in bfin_gen_dsp32shift() argument
1274 ASSIGN_R (src1); in bfin_gen_dsp32shift()
1281 REG_T src1, int sop, int HLs) in bfin_gen_dsp32shiftimm() argument
1291 ASSIGN_R (src1); in bfin_gen_dsp32shiftimm()
1664 bfin_gen_comp3op (REG_T src0, REG_T src1, REG_T dst, int opc) in bfin_gen_comp3op() argument
1669 ASSIGN_R (src1); in bfin_gen_comp3op()
2497 int src1 = ((iw1 >> DSP32Shift_src1_bits) & DSP32Shift_src1_mask); in decode_dsp32shift_0() local
2546 return DREG_MASK (src0) | DREG_MASK (src1); in decode_dsp32shift_0()
2552 OUTS (outf, dregs (src1)); in decode_dsp32shift_0()
2557 return DREG_MASK (src0) | DREG_MASK (src1); in decode_dsp32shift_0()
2563 OUTS (outf, dregs (src1)); in decode_dsp32shift_0()