Lines Matching refs:operands
1826 build_jump_insn (struct m68hc11_opcode *opcode, operand operands[], in build_jump_insn() argument
1837 gas_assert (operands[0].reg1 == REG_NONE && operands[0].reg2 == REG_NONE); in build_jump_insn()
1841 n = operands[0].exp.X_add_number; in build_jump_insn()
1848 || (operands[0].exp.X_op == O_constant in build_jump_insn()
1868 fixup16 (&operands[0].exp, M6812_OP_JUMP_REL16, in build_jump_insn()
1881 fixup16 (&operands[0].exp, M6811_OP_IND16, M6811_OP_IND16); in build_jump_insn()
1886 if (operands[0].exp.X_op == O_constant) in build_jump_insn()
1915 fixup16 (&operands[0].exp, M6812_OP_JUMP_REL16, M6812_OP_JUMP_REL16); in build_jump_insn()
1929 fixup8 (&operands[0].exp, M6811_OP_JUMP_REL, M6811_OP_JUMP_REL); in build_jump_insn()
1941 operands[0].exp.X_add_symbol, (offsetT) n, in build_jump_insn()
1951 operands[0].exp.X_add_symbol, (offsetT) n, op); in build_jump_insn()
1960 operands[0].exp.X_add_symbol, (offsetT) n, op); in build_jump_insn()
1967 build_dbranch_insn (struct m68hc11_opcode *opcode, operand operands[], in build_dbranch_insn() argument
1978 gas_assert (operands[0].reg1 != REG_NONE); in build_dbranch_insn()
1985 n = operands[1].exp.X_add_number; in build_dbranch_insn()
1986 code = operands[0].reg1; in build_dbranch_insn()
1988 if (operands[0].reg1 == REG_NONE || operands[0].reg1 == REG_CCR in build_dbranch_insn()
1989 || operands[0].reg1 == REG_PC) in build_dbranch_insn()
2005 || (operands[1].exp.X_op == O_constant in build_dbranch_insn()
2013 fixup16 (&operands[0].exp, M6811_OP_IND16, M6811_OP_IND16); in build_dbranch_insn()
2018 if (operands[1].exp.X_op == O_constant) in build_dbranch_insn()
2040 fixup8 (&operands[0].exp, M6811_OP_JUMP_REL, M6811_OP_JUMP_REL); in build_dbranch_insn()
2050 operands[1].exp.X_add_symbol, (offsetT) n, f); in build_dbranch_insn()
2370 operand operands[], in build_insn_xg() argument
2379 if (!(operands[0].mode & (M6811_OP_LOW_ADDR | M6811_OP_HIGH_ADDR))) in build_insn_xg()
2381 operands[0].mode = 0; in build_insn_xg()
2388 fixup8_xg (&operands[0].exp, format, operands[0].mode); in build_insn_xg()
2400 operands[0].mode = M6811_OP_LOW_ADDR; in build_insn_xg()
2403 &operands[0].exp, FALSE, BFD_RELOC_M68HC12_LO8XG); in build_insn_xg()
2410 operands[0].mode = M6811_OP_HIGH_ADDR; in build_insn_xg()
2413 &operands[0].exp, FALSE, BFD_RELOC_M68HC12_HI8XG); in build_insn_xg()
2422 fixup8_xg (&operands[0].exp, format, M68XG_OP_REL9); in build_insn_xg()
2428 fixup8_xg (&operands[0].exp, format, M68XG_OP_REL10); in build_insn_xg()
2445 operand operands[], in build_insn() argument
2489 build_indexed_byte (&operands[0], format, 1); in build_insn()
2495 build_indexed_byte (&operands[1], format, 1); in build_insn()
2503 fixup8 (&operands[i].exp, in build_insn()
2505 operands[i].mode); in build_insn()
2511 fixup24 (&operands[i].exp, format & M6811_OP_IND16, in build_insn()
2512 operands[i].mode); in build_insn()
2517 fixup16 (&operands[i].exp, in build_insn()
2519 operands[i].mode); in build_insn()
2524 if ((format & M6811_OP_IX) && (operands[0].reg1 != REG_X)) in build_insn()
2526 if ((format & M6811_OP_IY) && (operands[0].reg1 != REG_Y)) in build_insn()
2529 fixup8 (&operands[0].exp, M6811_OP_IX, operands[0].mode); in build_insn()
2536 build_indexed_byte (&operands[i], format, move_insn); in build_insn()
2541 build_reg_mode (&operands[i], format); in build_insn()
2546 fixup8 (&operands[i].exp, M6811_OP_BITMASK, operands[i].mode); in build_insn()
2551 fixup8 (&operands[i].exp, M6811_OP_JUMP_REL, operands[i].mode); in build_insn()
2555 fixup16 (&operands[1].exp, M6811_OP_IND16, operands[1].mode); in build_insn()
2559 fixup8 (&operands[i].exp, M6812_OP_PAGE, operands[i].mode); in build_insn()
2569 find (struct m68hc11_opcode_def *opc, operand operands[], int nb_operands) in find() argument
2585 if (opcode->format == operands[nb_operands-1].mode) in find()
2617 int mode = operands[i].mode; in find()
2662 && (operands[i].reg2 == REG_NONE)) in find()
2667 && (operands[i].reg2 != REG_NONE)) in find()
2671 && (operands[i].reg2 != REG_NONE)) in find()
2684 if (format & M6811_OP_IX && operands[i].reg1 == REG_X) in find()
2686 if (format & M6811_OP_IY && operands[i].reg1 == REG_Y) in find()
2690 && (operands[i].reg1 == REG_X in find()
2691 || operands[i].reg1 == REG_Y in find()
2692 || operands[i].reg1 == REG_SP in find()
2693 || operands[i].reg1 == REG_PC)) in find()
2749 find_opcode (struct m68hc11_opcode_def *opc, operand operands[], in find_opcode() argument
2765 result = get_operand (&operands[i], i, opc->format); in find_opcode()
2773 && (operands[i].mode & M6811_OP_IND16)) in find_opcode()
2775 operands[i].mode = M6811_OP_IMM16; in find_opcode()
2782 opcode = find (opc, operands, i); in find_opcode()
2822 operand operands[M6811_MAX_OPERANDS]; in md_assemble() local
2873 build_insn_xg (opc->opcode, operands, 0); in md_assemble()
2882 operands[0].reg1 = register_name (); in md_assemble()
2883 if (operands[0].reg1 == REG_NONE) in md_assemble()
2896 operands[1].reg1 = register_name (); in md_assemble()
2897 if (operands[1].reg1 == REG_NONE) in md_assemble()
2909 if (operands[1].reg1 == REG_CCR) /* ,CCR */ in md_assemble()
2910 opc->opcode->opcode = 0x00f8 | ( operands[0].reg1 << 8); in md_assemble()
2911 else if (operands[0].reg1 == REG_CCR) /* CCR, */ in md_assemble()
2912 opc->opcode->opcode = 0x00f9 | ( operands[1].reg1 << 8); in md_assemble()
2913 else if (operands[1].reg1 == REG_PC) /* ,PC */ in md_assemble()
2914 opc->opcode->opcode = 0x00fa | ( operands[0].reg1 << 8); in md_assemble()
2923 build_insn_xg (&opcode_local, operands, 0); in md_assemble()
2934 operands[0].reg1 = register_name (); in md_assemble()
2935 if (operands[0].reg1 == REG_NONE) in md_assemble()
2940 operands[0].mode = M68XG_OP_R; in md_assemble()
2942 opcode = find (opc, operands, 1); in md_assemble()
2946 | (operands[0].reg1 << 8); in md_assemble()
2948 build_insn_xg (&opcode_local, operands, 1); in md_assemble()
2960 expression (&operands[0].exp); in md_assemble()
2961 if (operands[0].exp.X_op == O_illegal) in md_assemble()
2966 else if (operands[0].exp.X_op == O_absent) in md_assemble()
2972 if (check_range (operands[0].exp.X_add_number,M68XG_OP_IMM3)) in md_assemble()
2974 opcode_local.opcode |= (operands[0].exp.X_add_number); in md_assemble()
2975 operands[0].mode = M68XG_OP_IMM3; in md_assemble()
2977 opcode = find (opc, operands, 1); in md_assemble()
2982 |= (operands[0].exp.X_add_number) << 8; in md_assemble()
2984 build_insn_xg (&opcode_local, operands, 1); in md_assemble()
3011 operands[0].reg1 = register_name (); in md_assemble()
3012 if (operands[0].reg1 == REG_NONE) in md_assemble()
3017 opcode_local.opcode = 0x00f7 | (operands[0].reg1 << 8); in md_assemble()
3020 build_insn_xg (&opcode_local, operands, 0); in md_assemble()
3028 operands[0].reg1 = register_name (); in md_assemble()
3029 if (operands[0].reg1 == REG_NONE) in md_assemble()
3040 operands[0].mode = M68XG_OP_R; in md_assemble()
3042 opcode = find (opc, operands, 1); in md_assemble()
3050 | (operands[0].reg1 << 8) | (operands[0].reg1 << 2); in md_assemble()
3054 | (operands[0].reg1 << 5); in md_assemble()
3056 opcode_local.opcode |= (operands[0].reg1 << 8); in md_assemble()
3059 build_insn_xg (&opcode_local, operands, 0); in md_assemble()
3072 expression (&operands[0].exp); in md_assemble()
3073 if (operands[0].exp.X_op == O_illegal) in md_assemble()
3078 else if (operands[0].exp.X_op == O_absent) in md_assemble()
3084 build_insn_xg (&opcode_local, operands, 1); in md_assemble()
3106 operands[0].reg1 = register_name (); in md_assemble()
3107 if (operands[0].reg1 == REG_NONE) in md_assemble()
3136 operands[0].mode = M6811_OP_HIGH_ADDR; in md_assemble()
3141 operands[0].mode = M6811_OP_LOW_ADDR; in md_assemble()
3144 operands[0].mode = 0; in md_assemble()
3146 expression (&operands[0].exp); in md_assemble()
3147 if (operands[0].exp.X_op == O_illegal) in md_assemble()
3152 else if (operands[0].exp.X_op == O_absent) in md_assemble()
3162 operands[0].mode = M68XG_OP_R_IMM4; in md_assemble()
3164 opcode = find (opc, operands, 1); in md_assemble()
3167 | (operands[0].reg1 << 8); in md_assemble()
3169 if (operands[0].exp.X_op != O_constant) in md_assemble()
3174 (operands[0].exp.X_add_number,M68XG_OP_R_IMM4)) in md_assemble()
3176 |= (operands[0].exp.X_add_number << 4); in md_assemble()
3184 operands[0].mode = M68XG_OP_R_IMM16; in md_assemble()
3186 opcode = find (opc, operands, 1); in md_assemble()
3190 | (operands[0].reg1 << 8); in md_assemble()
3196 | (operands[0].reg1 << 8); in md_assemble()
3198 build_insn_xg (&opcode_local, operands, 1); in md_assemble()
3204 operands[1].reg1 = register_name (); in md_assemble()
3205 if (operands[1].reg1 == REG_NONE) in md_assemble()
3216 operands[0].mode = M68XG_OP_R_R; in md_assemble()
3218 opcode = find (opc, operands, 1); in md_assemble()
3230 | (operands[0].reg1 << 8) | (operands[1].reg1 << 2); in md_assemble()
3239 | (operands[0].reg1 << 5) | (operands[1].reg1 << 2); in md_assemble()
3244 | (operands[0].reg1 << 8) | (operands[1].reg1 << 5); in md_assemble()
3247 build_insn_xg (&opcode_local, operands, 1); in md_assemble()
3267 operands[2].reg1 = register_name (); in md_assemble()
3268 if (operands[2].reg1 == REG_NONE) in md_assemble()
3275 operands[0].mode = M68XG_OP_R_R_R; in md_assemble()
3277 opcode = find (opc, operands, 1); in md_assemble()
3281 | (operands[0].reg1 << 8) | (operands[1].reg1 << 5) in md_assemble()
3282 | (operands[2].reg1 << 2); in md_assemble()
3284 build_insn_xg (&opcode_local, operands, 1); in md_assemble()
3301 operands[1].reg1 = register_name (); in md_assemble()
3302 if (operands[1].reg1 == REG_NONE) in md_assemble()
3330 expression (&operands[0].exp); in md_assemble()
3331 if (operands[0].exp.X_op == O_illegal) in md_assemble()
3336 else if (operands[0].exp.X_op == O_absent) in md_assemble()
3355 operands[0].mode = M68XG_OP_R_R_OFFS5; in md_assemble()
3357 opcode = find (opc, operands, 1); in md_assemble()
3361 | (operands[0].reg1 << 8) | (operands[1].reg1 << 5); in md_assemble()
3362 if (operands[0].exp.X_op != O_constant) in md_assemble()
3369 if (check_range (operands[0].exp.X_add_number, in md_assemble()
3373 |= (operands[0].exp.X_add_number); in md_assemble()
3375 build_insn_xg (&opcode_local, operands, 1); in md_assemble()
3386 operands[0].mode = M68XG_OP_RD_RB_RI; in md_assemble()
3390 operands[0].mode = M68XG_OP_RD_RB_mRI; in md_assemble()
3393 operands[2].reg1 = register_name (); in md_assemble()
3394 if (operands[2].reg1 == REG_NONE) in md_assemble()
3407 operands[0].mode = M68XG_OP_RD_RB_RIp; in md_assemble()
3423 opcode = find (opc, operands, 1); in md_assemble()
3427 | (operands[0].reg1 << 8) | (operands[1].reg1 << 5) in md_assemble()
3428 | (operands[2].reg1 << 2); in md_assemble()
3430 build_insn_xg (&opcode_local, operands, 1); in md_assemble()
3543 opcode = find_opcode (opc, operands, &nb_operands); in md_assemble()
3593 if (operands[1].mode & (M6812_OP_IDX | M6812_OP_IDX_1 in md_assemble()
3598 if (operands[0].mode & (M6811_OP_IMM8 | M6811_OP_IMM16 in md_assemble()
3603 if (operands[1].mode & (M6811_OP_IND16)) in md_assemble()
3610 if (operands[0].mode & (M6811_OP_IMM8 | M6811_OP_IMM16)) in md_assemble()
3613 build_indexed_byte (&operands[1], operands[1].mode, 1); in md_assemble()
3615 fixup8 (&operands[0].exp, M6811_OP_IMM8, in md_assemble()
3616 operands[0].mode); in md_assemble()
3618 fixup16 (&operands[0].exp, M6811_OP_IMM16, in md_assemble()
3619 operands[0].mode); in md_assemble()
3623 else if (operands[0].mode & M6811_OP_IND16) in md_assemble()
3626 build_indexed_byte (&operands[1], operands[1].mode, 1); in md_assemble()
3627 fixup16 (&operands[0].exp, M6811_OP_IND16, operands[0].mode); in md_assemble()
3633 build_indexed_byte (&operands[0], operands[0].mode, 1); in md_assemble()
3634 build_indexed_byte (&operands[1], operands[1].mode, 1); in md_assemble()
3639 else if (operands[1].mode & M6811_OP_IND16) in md_assemble()
3642 if (operands[0].mode & (M6811_OP_IMM8 | M6811_OP_IMM16 in md_assemble()
3647 if (operands[1].mode & (M6811_OP_IND16)) in md_assemble()
3656 if (operands[0].mode & (M6811_OP_IMM8 | M6811_OP_IMM16)) in md_assemble()
3660 fixup8 (&operands[0].exp, M6811_OP_IMM8, operands[0].mode); in md_assemble()
3662 fixup16 (&operands[0].exp, M6811_OP_IMM16, operands[0].mode); in md_assemble()
3664 fixup16 (&operands[0].exp, M6811_OP_IND16, operands[0].mode); in md_assemble()
3667 else if (operands[0].mode & M6811_OP_IND16) in md_assemble()
3670 build_indexed_byte (&operands[1], operands[1].mode, 1); in md_assemble()
3671 fixup16 (&operands[0].exp, M6811_OP_IND16, operands[0].mode); in md_assemble()
3677 build_indexed_byte (&operands[0], operands[0].mode, 1); in md_assemble()
3678 fixup16 (&operands[1].exp, M6811_OP_IND16, operands[1].mode); in md_assemble()
3699 build_dbranch_insn (opcode, operands, nb_operands, branch_optimize); in md_assemble()
3707 build_jump_insn (opcode, operands, nb_operands, branch_optimize); in md_assemble()
3709 build_insn (opcode, operands, nb_operands); in md_assemble()