Lines Matching refs:mips_opts
109 #define AT mips_opts.at
291 static struct mips_set_options mips_opts = variable
312 #define ISA_SUPPORTS_MIPS16E (mips_opts.isa == ISA_MIPS32 \
313 || mips_opts.isa == ISA_MIPS32R2 \
314 || mips_opts.isa == ISA_MIPS32R3 \
315 || mips_opts.isa == ISA_MIPS32R5 \
316 || mips_opts.isa == ISA_MIPS64 \
317 || mips_opts.isa == ISA_MIPS64R2 \
318 || mips_opts.isa == ISA_MIPS64R3 \
319 || mips_opts.isa == ISA_MIPS64R5)
393 || (mips_opts.micromips \
408 || (mips_opts.ase & ASE_SMARTMIPS) \
409 || mips_opts.micromips \
456 (mips_opts.gp == 64 && !ISA_HAS_64BIT_REGS (mips_opts.isa) \
458 : mips_opts.gp)
461 (mips_opts.fp == 64 && !ISA_HAS_64BIT_FPRS (mips_opts.isa) \
463 : mips_opts.fp)
480 (HAVE_32BIT_ADDRESSES || !HAVE_64BIT_OBJECTS || mips_opts.sym32)
521 ((mips_opts.isa != ISA_MIPS1) && ((CPU) != CPU_R5900))
536 (mips_opts.isa == ISA_MIPS32 \
537 || mips_opts.isa == ISA_MIPS32R2 \
538 || mips_opts.isa == ISA_MIPS32R3 \
539 || mips_opts.isa == ISA_MIPS32R5 \
540 || mips_opts.isa == ISA_MIPS32R6 \
541 || mips_opts.isa == ISA_MIPS64 \
542 || mips_opts.isa == ISA_MIPS64R2 \
543 || mips_opts.isa == ISA_MIPS64R3 \
544 || mips_opts.isa == ISA_MIPS64R5 \
545 || mips_opts.isa == ISA_MIPS64R6 \
546 || mips_opts.arch == CPU_R4010 \
547 || mips_opts.arch == CPU_R5900 \
548 || mips_opts.arch == CPU_R10000 \
549 || mips_opts.arch == CPU_R12000 \
550 || mips_opts.arch == CPU_R14000 \
551 || mips_opts.arch == CPU_R16000 \
552 || mips_opts.arch == CPU_RM7000 \
553 || mips_opts.arch == CPU_VR5500 \
554 || mips_opts.micromips \
563 (mips_opts.isa != ISA_MIPS1 \
564 || mips_opts.arch == CPU_R3900 \
565 || mips_opts.arch == CPU_R5900 \
566 || mips_opts.micromips \
579 ((mips_opts.isa != ISA_MIPS1 \
580 && mips_opts.isa != ISA_MIPS2 \
581 && mips_opts.isa != ISA_MIPS3) \
582 || mips_opts.arch == CPU_R4300 \
583 || mips_opts.micromips \
593 (mips_opts.isa != ISA_MIPS1 \
594 || mips_opts.micromips \
605 ((mips_opts.mips16 | mips_opts.micromips) != 0)
810 #define NOP_INSN (mips_opts.mips16 \
812 : (mips_opts.micromips \
813 ? (mips_opts.insn32 \
819 #define NOP_INSN_SIZE ((mips_opts.mips16 \
820 || (mips_opts.micromips && !mips_opts.insn32)) \
1982 if (mips_opts.isa == ISA_MIPS32R2 || mips_opts.isa == ISA_MIPS64R2) in mips_isa_rev()
1985 if (mips_opts.isa == ISA_MIPS32R3 || mips_opts.isa == ISA_MIPS64R3) in mips_isa_rev()
1988 if (mips_opts.isa == ISA_MIPS32R5 || mips_opts.isa == ISA_MIPS64R5) in mips_isa_rev()
1991 if (mips_opts.isa == ISA_MIPS32R6 || mips_opts.isa == ISA_MIPS64R6) in mips_isa_rev()
1995 if (mips_opts.micromips) in mips_isa_rev()
1998 if (mips_opts.isa == ISA_MIPS32 || mips_opts.isa == ISA_MIPS64) in mips_isa_rev()
2028 if (ISA_HAS_64BIT_REGS (mips_opts.isa)) in mips_check_isa_supports_ase()
2029 min_rev = mips_opts.micromips ? ase->micromips64_rev : ase->mips64_rev; in mips_check_isa_supports_ase()
2031 min_rev = mips_opts.micromips ? ase->micromips32_rev : ase->mips32_rev; in mips_check_isa_supports_ase()
2036 base = mips_opts.micromips ? "microMIPS" : "MIPS"; in mips_check_isa_supports_ase()
2037 size = ISA_HAS_64BIT_REGS (mips_opts.isa) ? 64 : 32; in mips_check_isa_supports_ase()
2049 base = mips_opts.micromips ? "microMIPS" : "MIPS"; in mips_check_isa_supports_ase()
2050 size = ISA_HAS_64BIT_REGS (mips_opts.isa) ? 64 : 32; in mips_check_isa_supports_ase()
2056 && mips_opts.fp != 64 in mips_check_isa_supports_ase()
2075 if ((mips_opts.ase & mask) == mips_ases[i].flags) in mips_check_isa_supports_ases()
2134 if (mips_opts.micromips) in insn_length()
2136 else if (mips_opts.mips16) in insn_length()
2155 insn->fixed_p = (mips_opts.noreorder > 0); in create_insn()
2156 insn->noreorder_p = (mips_opts.noreorder > 0); in create_insn()
2221 if (si->tc_segment_info_data.mips16 != mips_opts.mips16) in mips_record_compressed_mode()
2222 si->tc_segment_info_data.mips16 = mips_opts.mips16; in mips_record_compressed_mode()
2223 if (si->tc_segment_info_data.micromips != mips_opts.micromips) in mips_record_compressed_mode()
2224 si->tc_segment_info_data.micromips = mips_opts.micromips; in mips_record_compressed_mode()
3239 int isa = mips_opts.isa; in is_opcode_valid()
3240 int ase = mips_opts.ase; in is_opcode_valid()
3244 if (ISA_HAS_64BIT_REGS (mips_opts.isa)) in is_opcode_valid()
3249 if (!opcode_is_member (mo, isa, ase, mips_opts.arch)) in is_opcode_valid()
3266 if (fp_d && (mips_opts.soft_float || mips_opts.single_float)) in is_opcode_valid()
3269 if (fp_s && mips_opts.soft_float) in is_opcode_valid()
3281 return opcode_is_member (mo, mips_opts.isa, 0, mips_opts.arch); in is_opcode_valid_16()
3290 if (!mips_opts.micromips) in is_size_valid()
3293 if (mips_opts.insn32) in is_size_valid()
3324 if (!mips_opts.micromips) in is_delay_slot_valid()
3883 if (ISA_IS_R6 (mips_opts.isa) && opts->single_float == 0) in mips_check_options()
3896 else if (ISA_IS_R6 (mips_opts.isa) in mips_check_options()
3901 mips_cpu_info_from_isa (mips_opts.isa)->name); in mips_check_options()
3954 else if (ISA_IS_R6 (mips_opts.isa)) in file_mips_check_options()
4010 mips_opts = file_mips_opts; in file_mips_check_options()
4039 if (mips_opts.mips16) in md_assemble()
4053 if (mips_opts.mips16) in md_assemble()
4295 if (mips_opts.mips16) in mips_compressed_mark_label()
4409 if (mips_opts.micromips in get_delay_slot_nop()
4567 mask |= 1 << EXTRACT_OPERAND (mips_opts.micromips, RT, *ip); in gpr_read_mask()
4568 mask |= 1 << EXTRACT_OPERAND (mips_opts.micromips, RS, *ip); in gpr_read_mask()
4599 mask |= 1 << EXTRACT_OPERAND (mips_opts.micromips, RD, *ip); in gpr_write_mask()
4651 bfd_boolean oddspreg = (ISA_HAS_ODD_SINGLE_FPR (mips_opts.isa, mips_opts.arch) in mips_oddfpreg_ok()
4653 && mips_opts.oddspreg; in mips_oddfpreg_ok()
4846 if ((mips_opts.ase & ASE_MDMX) in convert_reg_type()
5082 && !mips_opts.micromips in match_int_operand()
5312 || (mips_opts.arch == CPU_R5900 in match_perf_reg_operand()
5941 || ISA_HAS_MXHC1 (mips_opts.isa) in match_float_constant()
6170 if (!mips_opts.noreorder in reg_needs_delay()
6235 && !mips_opts.micromips in insns_between()
6242 if (mips_fix_24k && !mips_opts.micromips) in insns_between()
6257 if (mips_fix_rm7000 && !mips_opts.micromips) in insns_between()
6269 if (mips_fix_vr4120 && !mips_opts.micromips) in insns_between()
6606 if (mips_fix_vr4130 && !mips_opts.micromips) in nops_for_insn()
6613 if (mips_fix_24k && !mips_opts.micromips) in nops_for_insn()
6698 if (! mips_opts.at) in fix_loongson2f_jump()
6743 if (mips_opts.nomove) in can_swap_branch_p()
6767 if (mips_opts.mips16 && history[0].fixp[0]) in can_swap_branch_p()
6780 if (!mips_opts.mips16 in can_swap_branch_p()
6846 if (mips_opts.micromips in can_swap_branch_p()
6850 if (mips_opts.micromips in can_swap_branch_p()
6858 if (mips_opts.arch == CPU_R5900 in can_swap_branch_p()
6920 if (ISA_IS_R6 (mips_opts.isa) in get_append_method()
6925 if (mips_opts.noreorder) in get_append_method()
6935 if (mips_opts.mips16 in get_append_method()
7067 if (!mips_opts.micromips) in micromips_map_reloc()
7144 file_ase_mips16 |= mips_opts.mips16; in append_insn()
7145 file_ase_micromips |= mips_opts.micromips; in append_insn()
7150 if (mips_opts.micromips in append_insn()
7172 shift = mips_opts.micromips ? 1 : 2; in append_insn()
7197 shift = mips_opts.micromips ? 1 : 2; in append_insn()
7262 if (mips_relax.sequence != 2 && !mips_opts.noreorder) in append_insn()
7362 && !mips_opts.warn_about_macros in append_insn()
7363 && (mips_opts.at || mips_pic == NO_PIC) in append_insn()
7390 else if (mips_opts.micromips in append_insn()
7418 else if (mips_opts.mips16 && *reloc_type > BFD_RELOC_UNUSED) in append_insn()
7430 else if (mips_opts.mips16 && insn_length (ip) == 2) in append_insn()
7440 if (mips_opts.mips16 in append_insn()
7441 && mips_opts.noreorder in append_insn()
7470 if (mips_opts.mips16) in append_insn()
7602 gas_assert(mips_opts.mips16 || ISA_IS_R6 (mips_opts.isa)); in append_insn()
7603 if (mips_opts.mips16) in append_insn()
7621 if (mips_opts.mips16) in append_insn()
7693 if (! mips_opts.noreorder) in mips_emit_delays()
7711 if (mips_opts.noreorder == 0) in start_noreorder()
7749 mips_opts.noreorder++; in start_noreorder()
7758 mips_opts.noreorder--; in end_noreorder()
7759 if (mips_opts.noreorder == 0 && prev_nop_frag != NULL) in end_noreorder()
7841 operand = (mips_opts.micromips in match_insn()
8008 gas_assert (mips_opts.micromips); in match_insn()
8025 operand = (mips_opts.micromips in match_insn()
8239 mips_cpu_info_from_arch (mips_opts.arch)->name, in match_invalid_for_isa()
8240 mips_cpu_info_from_isa (mips_opts.isa)->name); in match_invalid_for_isa()
8316 if (mips_opts.insn32) in match_insns()
8376 mips_macro_warning.delay_slot_p = (mips_opts.noreorder in macro_start()
8445 if (mips_opts.warn_about_macros) in macro_end()
8501 #define BRK_FMT (brk_fmt[mips_opts.micromips][mips_opts.insn32])
8502 #define COP12_FMT (ISA_IS_R6 (mips_opts.isa) ? "E,+:(d)" \
8503 : cop12_fmt[mips_opts.micromips])
8504 #define JALR_FMT (jalr_fmt[mips_opts.micromips])
8505 #define LUI_FMT (lui_fmt[mips_opts.micromips])
8506 #define MEM12_FMT (mem12_fmt[mips_opts.micromips])
8507 #define LL_SC_FMT (ISA_IS_R6 (mips_opts.isa) ? "t,+j(b)" \
8508 : mem12_fmt[mips_opts.micromips])
8509 #define MFHL_FMT (mfhl_fmt[mips_opts.micromips][mips_opts.insn32])
8510 #define SHFT_FMT (shft_fmt[mips_opts.micromips])
8511 #define TRAP_FMT (trap_fmt[mips_opts.micromips])
8557 if (mips_opts.mips16) in macro_build()
8567 hash = mips_opts.micromips ? micromips_op_hash : op_hash; in macro_build()
8654 gas_assert (!mips_opts.micromips); in macro_build()
8675 operand = (mips_opts.micromips in macro_build()
8793 bfd_reloc_code_real_type jalr_reloc = jalr_relocs[mips_opts.micromips]; in macro_build_jalr()
8802 if (mips_opts.micromips) in macro_build_jalr()
8804 jalr = ((mips_opts.noreorder && !cprestore) || mips_opts.insn32 in macro_build_jalr()
8807 || mips_opts.insn32 in macro_build_jalr()
8825 gas_assert (! mips_opts.mips16); in macro_build_lui()
8876 if (!mips_opts.at) in macro_build_ldst_constoffset()
9271 if (*used_at == 0 && mips_opts.at) in load_address()
9460 if (!mips_opts.at && *used_at == 1) in load_address()
9471 if (mips_opts.micromips in move_register()
9472 && !mips_opts.insn32 in move_register()
9591 int noreorder = mips_opts.noreorder; in macro_build_branch_likely()
9594 gas_assert (mips_opts.micromips); in macro_build_branch_likely()
9664 br = mips_opts.micromips ? "bgez" : "bgezl"; in macro_build_branch_rs()
9668 gas_assert (mips_opts.micromips); in macro_build_branch_rs()
9669 br = mips_opts.insn32 ? "bgezal" : "bgezals"; in macro_build_branch_rs()
9677 br = mips_opts.micromips ? "bgtz" : "bgtzl"; in macro_build_branch_rs()
9684 br = mips_opts.micromips ? "blez" : "blezl"; in macro_build_branch_rs()
9691 br = mips_opts.micromips ? "bltz" : "bltzl"; in macro_build_branch_rs()
9695 gas_assert (mips_opts.micromips); in macro_build_branch_rs()
9696 br = mips_opts.insn32 ? "bltzal" : "bltzals"; in macro_build_branch_rs()
9703 if (mips_opts.micromips && brneg) in macro_build_branch_rs()
9728 br = mips_opts.micromips ? "beq" : "beql"; in macro_build_branch_rsrt()
9737 br = mips_opts.micromips ? "bne" : "bnel"; in macro_build_branch_rsrt()
9743 if (mips_opts.micromips && brneg) in macro_build_branch_rsrt()
9838 gas_assert (! mips_opts.mips16); in macro()
9873 if (mips_opts.micromips) in macro()
9883 if (mips_opts.micromips) in macro()
9901 if (!mips_opts.micromips) in macro()
9988 gas_assert (mips_opts.micromips); in macro()
10304 if (mips_opts.micromips) in macro()
10311 if (mips_opts.micromips) in macro()
10317 if (mips_opts.micromips) in macro()
10342 if (mips_opts.micromips) in macro()
10355 if (mips_opts.micromips) in macro()
10455 if (mips_opts.micromips) in macro()
10466 if (mips_opts.micromips) in macro()
10498 if (mips_opts.at && (op[0] == breg)) in macro()
10555 if (used_at == 0 && mips_opts.at) in macro()
11074 gas_assert (!mips_opts.micromips); in macro()
11079 gas_assert (!mips_opts.micromips); in macro()
11084 gas_assert (!mips_opts.micromips); in macro()
11089 gas_assert (!mips_opts.micromips); in macro()
11094 gas_assert (!mips_opts.micromips); in macro()
11116 gas_assert (mips_opts.micromips); in macro()
11117 if (mips_opts.insn32) in macro()
11133 if (mips_opts.micromips in macro()
11134 && !mips_opts.insn32 in macro()
11149 s = ((mips_opts.micromips in macro()
11150 && !mips_opts.insn32 in macro()
11151 && (!mips_opts.noreorder || cprestore)) in macro()
11153 if (mips_opts.micromips in macro()
11154 && !mips_opts.insn32 in macro()
11178 if (mips_opts.noreorder) in macro()
11192 gas_assert (mips_opts.micromips); in macro()
11193 if (mips_opts.insn32) in macro()
11322 if (mips_opts.noreorder) in macro()
11440 gas_assert (!mips_opts.micromips); in macro()
11455 offbits = (mips_opts.micromips ? 12 in macro()
11456 : ISA_IS_R6 (mips_opts.isa) ? 11 in macro()
11462 gas_assert (!mips_opts.micromips); in macro()
11471 offbits = (mips_opts.micromips ? 12 : 16); in macro()
11476 offbits = (mips_opts.micromips ? 12 : 16); in macro()
11487 offbits = (mips_opts.micromips ? 12 in macro()
11488 : ISA_IS_R6 (mips_opts.isa) ? 11 in macro()
11508 offbits = (mips_opts.micromips ? 12 : 16); in macro()
11513 offbits = (mips_opts.micromips ? 12 : 16); in macro()
11518 offbits = (mips_opts.micromips ? 12 in macro()
11519 : ISA_IS_R6 (mips_opts.isa) ? 9 in macro()
11525 offbits = (mips_opts.micromips ? 12 in macro()
11526 : ISA_IS_R6 (mips_opts.isa) ? 9 in macro()
11532 offbits = (mips_opts.micromips ? 12 : 16); in macro()
11535 gas_assert (mips_opts.micromips); in macro()
11542 gas_assert (mips_opts.micromips); in macro()
11549 gas_assert (mips_opts.micromips); in macro()
11555 gas_assert (mips_opts.micromips); in macro()
11582 gas_assert (!mips_opts.micromips); in macro()
11597 offbits = (mips_opts.micromips ? 12 in macro()
11598 : ISA_IS_R6 (mips_opts.isa) ? 11 in macro()
11604 gas_assert (!mips_opts.micromips); in macro()
11613 offbits = (mips_opts.micromips ? 12 : 16); in macro()
11618 offbits = (mips_opts.micromips ? 12 : 16); in macro()
11623 offbits = (mips_opts.micromips ? 12 in macro()
11624 : ISA_IS_R6 (mips_opts.isa) ? 9 in macro()
11630 offbits = (mips_opts.micromips ? 12 in macro()
11631 : ISA_IS_R6 (mips_opts.isa) ? 9 in macro()
11636 fmt = (mips_opts.micromips ? "k,~(b)" in macro()
11637 : ISA_IS_R6 (mips_opts.isa) ? "k,+j(b)" in macro()
11639 offbits = (mips_opts.micromips ? 12 in macro()
11640 : ISA_IS_R6 (mips_opts.isa) ? 9 in macro()
11650 fmt = (mips_opts.micromips ? "k,~(b)" in macro()
11651 : ISA_IS_R6 (mips_opts.isa) ? "k,+j(b)" in macro()
11653 offbits = (mips_opts.micromips ? 12 in macro()
11654 : ISA_IS_R6 (mips_opts.isa) ? 9 in macro()
11671 offbits = (mips_opts.micromips ? 12 in macro()
11672 : ISA_IS_R6 (mips_opts.isa) ? 11 in macro()
11684 gas_assert (!mips_opts.micromips); in macro()
11693 offbits = (mips_opts.micromips ? 12 : 16); in macro()
11698 offbits = (mips_opts.micromips ? 12 : 16); in macro()
11701 gas_assert (mips_opts.micromips); in macro()
11707 gas_assert (mips_opts.micromips); in macro()
11713 gas_assert (mips_opts.micromips); in macro()
11719 gas_assert (mips_opts.micromips); in macro()
11895 if (used_at == 0 && mips_opts.at) in macro()
12118 gas_assert (mips_opts.micromips); in macro()
12119 gas_assert (mips_opts.insn32); in macro()
12128 gas_assert (mips_opts.micromips); in macro()
12129 gas_assert (mips_opts.insn32); in macro()
12131 if (mips_opts.noreorder) in macro()
12257 if (ISA_HAS_MXHC1 (mips_opts.isa)) in macro()
12324 if (CPU_HAS_LDC1_SDC1 (mips_opts.arch)) in macro()
12333 gas_assert (!mips_opts.micromips); in macro()
12337 if (CPU_HAS_LDC1_SDC1 (mips_opts.arch)) in macro()
12644 gas_assert (!mips_opts.micromips); in macro()
12678 gas_assert (!mips_opts.micromips); in macro()
12689 gas_assert (mips_opts.micromips); in macro()
12690 gas_assert (mips_opts.insn32); in macro()
12700 if (mips_opts.arch == CPU_R5900) in macro()
12745 if (mips_opts.micromips) in macro()
12752 if (mips_opts.micromips) in macro()
12781 if (mips_opts.micromips) in macro()
12788 if (mips_opts.micromips) in macro()
12795 if (ISA_HAS_DROR (mips_opts.isa) || CPU_HAS_DROR (mips_opts.arch)) in macro()
12816 if (ISA_HAS_ROR (mips_opts.isa) || CPU_HAS_ROR (mips_opts.arch)) in macro()
12843 if (ISA_HAS_DROR (mips_opts.isa) || CPU_HAS_DROR (mips_opts.arch)) in macro()
12872 if (ISA_HAS_ROR (mips_opts.isa) || CPU_HAS_ROR (mips_opts.arch)) in macro()
12891 if (ISA_HAS_DROR (mips_opts.isa) || CPU_HAS_DROR (mips_opts.arch)) in macro()
12904 if (ISA_HAS_ROR (mips_opts.isa) || CPU_HAS_ROR (mips_opts.arch)) in macro()
12923 if (ISA_HAS_DROR (mips_opts.isa) || CPU_HAS_DROR (mips_opts.arch)) in macro()
12951 if (ISA_HAS_ROR (mips_opts.isa) || CPU_HAS_ROR (mips_opts.arch)) in macro()
12993 if (CPU_HAS_SEQ (mips_opts.arch) in macro()
13011 else if (CPU_HAS_SEQ (mips_opts.arch)) in macro()
13147 if (CPU_HAS_SEQ (mips_opts.arch) in macro()
13168 else if (CPU_HAS_SEQ (mips_opts.arch)) in macro()
13196 if (!mips_opts.micromips) in macro()
13249 gas_assert (!mips_opts.micromips); in macro()
13250 gas_assert (mips_opts.isa == ISA_MIPS1); in macro()
13287 offbits = (mips_opts.micromips ? 12 : 16); in macro()
13293 offbits = (mips_opts.micromips ? 12 : 16); in macro()
13305 offbits = (mips_opts.micromips ? 12 : 16); in macro()
13312 offbits = (mips_opts.micromips ? 12 : 16); in macro()
13429 if (!mips_opts.at && used_at) in macro()
13703 if (mips_opts.micromips) in mips_lookup_insn()
13747 if (mips_opts.micromips) in mips_ip()
13833 if (mips_opts.noautoextend && !forced_insn_length) in mips16_ip()
14032 if (mips_opts.mips16) in parse_relocation()
14693 mips_opts = file_mips_opts; in mips_after_parse_args()
14902 if (ISA_IS_R6 (mips_opts.isa) in mips_force_relocation()
15654 if (!reg_lookup (&s, RTYPE_NUM | RTYPE_GP, &mips_opts.at)) in parse_code_option()
15658 mips_opts.at = ATREG; in parse_code_option()
15660 mips_opts.at = ZERO; in parse_code_option()
15662 mips_opts.nomove = 0; in parse_code_option()
15664 mips_opts.nomove = 1; in parse_code_option()
15666 mips_opts.nobopt = 0; in parse_code_option()
15668 mips_opts.nobopt = 1; in parse_code_option()
15670 mips_opts.gp = 32; in parse_code_option()
15672 mips_opts.gp = 64; in parse_code_option()
15674 mips_opts.fp = 32; in parse_code_option()
15676 mips_opts.fp = 0; in parse_code_option()
15678 mips_opts.fp = 64; in parse_code_option()
15680 mips_opts.soft_float = 1; in parse_code_option()
15682 mips_opts.soft_float = 0; in parse_code_option()
15684 mips_opts.single_float = 1; in parse_code_option()
15686 mips_opts.single_float = 0; in parse_code_option()
15688 mips_opts.oddspreg = 0; in parse_code_option()
15690 mips_opts.oddspreg = 1; in parse_code_option()
15693 mips_opts.mips16 = 1; in parse_code_option()
15696 mips_opts.mips16 = 0; in parse_code_option()
15698 mips_opts.micromips = 1; in parse_code_option()
15700 mips_opts.micromips = 0; in parse_code_option()
15704 mips_set_ase (ase, &mips_opts, FALSE); in parse_code_option()
15706 mips_set_ase (ase, &mips_opts, TRUE); in parse_code_option()
15720 mips_opts.arch = p->cpu; in parse_code_option()
15721 mips_opts.isa = p->isa; in parse_code_option()
15733 mips_opts.arch = p->cpu; in parse_code_option()
15734 mips_opts.isa = p->isa; in parse_code_option()
15741 mips_opts.noautoextend = 0; in parse_code_option()
15743 mips_opts.noautoextend = 1; in parse_code_option()
15745 mips_opts.insn32 = TRUE; in parse_code_option()
15747 mips_opts.insn32 = FALSE; in parse_code_option()
15749 mips_opts.sym32 = TRUE; in parse_code_option()
15751 mips_opts.sym32 = FALSE; in parse_code_option()
15763 int prev_isa = mips_opts.isa; in s_mipsset()
15783 if (mips_opts.noreorder) in s_mipsset()
15788 if (!mips_opts.noreorder) in s_mipsset()
15792 mips_opts.warn_about_macros = 0; in s_mipsset()
15795 if (mips_opts.noreorder == 0) in s_mipsset()
15797 mips_opts.warn_about_macros = 1; in s_mipsset()
15800 mips_opts.gp = file_mips_opts.gp; in s_mipsset()
15802 mips_opts.fp = file_mips_opts.fp; in s_mipsset()
15805 mips_opts.isa = file_mips_opts.isa; in s_mipsset()
15806 mips_opts.arch = file_mips_opts.arch; in s_mipsset()
15807 mips_opts.gp = file_mips_opts.gp; in s_mipsset()
15808 mips_opts.fp = file_mips_opts.fp; in s_mipsset()
15816 s->options = mips_opts; in s_mipsset()
15830 if (s->options.noreorder && ! mips_opts.noreorder) in s_mipsset()
15832 else if (! s->options.noreorder && mips_opts.noreorder) in s_mipsset()
15835 mips_opts = s->options; in s_mipsset()
15845 if (mips_opts.isa != prev_isa) in s_mipsset()
15847 switch (mips_opts.isa) in s_mipsset()
15853 mips_opts.fp = 32; in s_mipsset()
15860 mips_opts.gp = 32; in s_mipsset()
15861 if (mips_opts.fp != 0) in s_mipsset()
15862 mips_opts.fp = 32; in s_mipsset()
15865 mips_opts.gp = 32; in s_mipsset()
15866 mips_opts.fp = 64; in s_mipsset()
15876 mips_opts.gp = 64; in s_mipsset()
15877 if (mips_opts.fp != 0) in s_mipsset()
15879 if (mips_opts.arch == CPU_R5900) in s_mipsset()
15880 mips_opts.fp = 32; in s_mipsset()
15882 mips_opts.fp = 64; in s_mipsset()
15891 mips_check_options (&mips_opts, FALSE); in s_mipsset()
15916 file_mips_opts = mips_opts; in s_module()
15977 if (mips_opts.mips16) in s_cpload()
15985 if (mips_opts.noreorder == 0) in s_cpload()
16056 if (mips_opts.mips16) in s_cpsetup()
16161 if (mips_opts.mips16) in s_cplocal()
16191 if (mips_opts.mips16) in s_cprestore()
16240 if (mips_opts.mips16) in s_cpreturn()
16501 file_ase_mips16 |= mips_opts.mips16; in s_insn()
16502 file_ase_micromips |= mips_opts.micromips; in s_insn()
16971 if (mips_opts.isa == ISA_MIPS1) in relaxed_branch_length()
17232 if ((HAVE_IN_PLACE_ADDENDS || ISA_IS_R6 (mips_opts.isa)) in mips_fix_adjustable()
17576 if (mips_opts.isa == ISA_MIPS1) in md_convert_frag()
18345 if (nop_opcode == NOP_OPCODE_MICROMIPS && !mips_opts.insn32) in mips_handle_align()