Lines Matching refs:code
21 @code{@value{AS}} supports the following additional command-line options
26 @table @code
28 @cindex @code{-wsigned_overflow} command line option, V850
35 @cindex @code{-wunsigned_overflow} command line option, V850
42 @cindex @code{-mv850} command line option, V850
44 Specifies that the assembled code should be marked as being targeted at
46 such code with code assembled for other processors.
48 @cindex @code{-mv850e} command line option, V850
50 Specifies that the assembled code should be marked as being targeted at
52 such code with code assembled for other processors.
54 @cindex @code{-mv850e1} command line option, V850
56 Specifies that the assembled code should be marked as being targeted at
58 such code with code assembled for other processors.
60 @cindex @code{-mv850any} command line option, V850
62 Specifies that the assembled code should be marked as being targeted at
65 binaries that contain target specific code, but which are also intended
67 routines used by the code produced by GCC for all versions of the v850
71 @cindex @code{-mv850e2} command line option, V850
73 Specifies that the assembled code should be marked as being targeted at
75 such code with code assembled for other processors.
77 @cindex @code{-mv850e2v3} command line option, V850
79 Specifies that the assembled code should be marked as being targeted at
81 such code with code assembled for other processors.
83 @cindex @code{-mv850e2v4} command line option, V850
87 @cindex @code{-mv850e3v5} command line option, V850
89 Specifies that the assembled code should be marked as being targeted at
91 such code with code assembled for other processors.
93 @cindex @code{-mrelax} command line option, V850
96 ops to be used in the assembler source code. These ops label sections
97 of code which are either a long function call or a long branch. The
98 assembler will then flag these sections of code and the linker will
101 @cindex @code{-mgcc-abi} command line option, V850
105 @cindex @code{-mrh850-abi} command line option, V850
110 @cindex @code{-m8byte-align} command line option, V850
113 alignment for variables defined in the source code.
115 @cindex @code{-m4byte-align} command line option, V850
118 alignment for variables defined in the source code. This is the
155 @code{@value{AS}} supports the following names for registers:
156 @table @code
157 @cindex @code{zero} register, V850
164 @cindex @code{sp} register, V850
167 @cindex @code{gp} register, V850
170 @cindex @code{tp} register, V850
221 @cindex @code{ep} register, V850
224 @cindex @code{lp} register, V850
227 @cindex @code{eipc} register, V850
230 @cindex @code{eipsw} register, V850
233 @cindex @code{fepc} register, V850
236 @cindex @code{fepsw} register, V850
239 @cindex @code{ecr} register, V850
242 @cindex @code{psw} register, V850
245 @cindex @code{ctpc} register, V850
248 @cindex @code{ctpsw} register, V850
251 @cindex @code{dbpc} register, V850
254 @cindex @code{dbpsw} register, V850
257 @cindex @code{ctbp} register, V850
274 @table @code
275 @cindex @code{offset} directive, V850
279 @cindex @code{section} directive, V850
285 @cindex @code{.v850} directive, V850
287 Specifies that the assembled code should be marked as being targeted at
289 such code with code assembled for other processors.
291 @cindex @code{.v850e} directive, V850
293 Specifies that the assembled code should be marked as being targeted at
295 such code with code assembled for other processors.
297 @cindex @code{.v850e1} directive, V850
299 Specifies that the assembled code should be marked as being targeted at
301 such code with code assembled for other processors.
303 @cindex @code{.v850e2} directive, V850
305 Specifies that the assembled code should be marked as being targeted at
307 such code with code assembled for other processors.
309 @cindex @code{.v850e2v3} directive, V850
311 Specifies that the assembled code should be marked as being targeted at
313 such code with code assembled for other processors.
315 @cindex @code{.v850e2v4} directive, V850
317 Specifies that the assembled code should be marked as being targeted at
319 such code with code assembled for other processors.
321 @cindex @code{.v850e3v5} directive, V850
323 Specifies that the assembled code should be marked as being targeted at
325 such code with code assembled for other processors.
334 @code{@value{AS}} implements all the standard V850 opcodes.
336 @code{@value{AS}} also implements the following pseudo ops:
338 @table @code
340 @cindex @code{hi0} pseudo-op, V850
352 @cindex @code{lo} pseudo-op, V850
363 @cindex @code{hi} pseudo-op, V850
368 instruction. For example the following code can be used to compute the
385 @cindex @code{hilo} pseudo-op, V850
396 @cindex @code{sdaoff} pseudo-op, V850
413 @cindex @code{tdaoff} pseudo-op, V850
430 @cindex @code{zdaoff} pseudo-op, V850
443 @cindex @code{ctoff} pseudo-op, V850
456 @cindex @code{longcall} pseudo-op, V850
457 @item .longcall @code{name}
459 to function @code{name}. The linker will attempt to shorten this call
460 sequence if @code{name} is within a 22bit offset of the call. Only
461 valid if the @code{-mrelax} command line switch has been enabled.
463 @cindex @code{longjump} pseudo-op, V850
464 @item .longjump @code{name}
466 to label @code{name}. The linker will attempt to shorten this code
467 sequence if @code{name} is within a 22bit offset of the jump. Only
468 valid if the @code{-mrelax} command line switch has been enabled.