Lines Matching refs:opc
6 * i386-opc.h (VexNDS): Removed.
16 * i386-opc.tbl: Replace VexNDS with VexVVVV=1, VexNDD with
35 * i386-opc.h (ByteOkIntel): Removed.
38 * i386-opc.tbl: Remove ByteOkIntel.
46 * i386-opc.h (Vex0F): Removed.
59 * i386-opc.tbl: Replace Vex0F with VexOpcode=0, Vex0F38 with
66 * i386-opc.h (VEX2SOURCES): Renamed to ...
74 * i386-opc.h (Vex2Sources): Removed.
82 * i386-opc.tbl: Replace Vex2Sources with VexSources=1 and
91 * i386-opc.h (VexW0): Removed.
98 * i386-opc.tbl: Replace VexW0 with VexW=1 and VexW1 with
134 * i386-opc.tbl: Add VexW0 to AVX instructions where the VEX.W bit
140 * i386-opc.h (VEX128): New.
182 * cgen-opc.c: Likewise.
187 * frv-opc.c: Likewise.
192 * ia64-opc.c: Likewise.
202 * or32-opc.c: Likewise.
220 * i386-opc.tbl: Add fxsave64 and fxrstor64.
233 * m68k-opc.c (m68k_opcodes): Allow the STLDSR instruction on the
246 * i386-opc.tbl: Add IsLockable to cmpxch16b.
272 * i386-opc.h (CpuCVT16): Removed.
274 (i386-opc.tbl): Remove CVT16 instructions.
298 * i386-opc.h (CpuXOP): Added.
304 * i386-opc.tbl: Add entries for XOP and CVT16 instructions.
387 * i386-opc.tbl: Remove IsLockable from add, adc, and, dec, inc,
395 * i386-opc.h (IsLockable): New.
398 * i386-opc.tbl: Add IsLockable to add, adc, and, btc, btr,
474 * opcodes/i386-opc.h (CpuLWP): New.
480 * opcodes/i386-opc.tbl (llwpcb): Added.
486 * rx-decode.opc (rx_decode_opcode) (mvtipl): Add.
528 * m32c-opc.h: Regenerate.
538 * rx-decode.opc (decode_opcode): Fix flags for MUL, SUNTIL, and SWHILE.
569 * i386-opc.h: Use enum instead of nested macros.
588 * m68k-opc.c (m68k_opcodes): Correct mask for macl and msacl.
629 * i386-opc.tbl: Drop Disp64 on jump and loop instructions.
635 * ppc-opc.c (PPC476): Define.
640 * ppc-opc.c (PPCA2): Use renamed mask PPC_OPCODE_A2.
657 * rx-decode.opc: New file.
662 * ppc-opc.c (powerpc_opcodes): Remove support for the the "lxsdux",
685 * i386-opc.h (Vex): Update comments.
690 * i386-opc.tbl: Replace "Vex|Vex256" with Vex=2.
701 * ppc-opc.c (powerpc_opcodes): Add eratilx, eratsx, eratsx.,
759 * mep-opc.c: Regenerate.
769 * z8k-opc.h: Regenerate.
773 * ppc-opc.c (powerpc_macros <extrdi>): Allow n+b of 64.
782 * z8k-opc.h: Regenerate.
799 * z8k-opc.h: Regenerate.
805 * tic80-opc.c (tic80_symbol_to_value, tic80_value_to_symbol):
844 * mep-opc.c: Regenerate.
859 * i386-opc.h (struct template): Rename struct template to
869 * tic54x-opc.c (tic54x_unknown_opcode, tic54x_optab):
905 (i386-opc.lo): Depend on $(srcdir)/i386-tbl.h.
910 (ia64-opc.lo): Depend on $(srcdir)/ia64-asmtab.c.
913 (s390-opc.tab): Adjust.
914 (z8kgen$(EXEEXT_FOR_BUILD), z8kgen.o, $(srcdir)/z8k-opc.h): New
916 (z8k-dis.lo): Depend on $(srcdir)/z8k-opc.h.
919 * z8k-opc.h (func): Regenerate.
925 i386-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-f.c, ia64-opc-i.c,
926 ia64-opc-m.c, ia64-opc-d.c, ia64-gen.c, ia64-asmtab.c removed, and
957 (m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo)
961 (s390-opc.lo): Depend on s390-opc.tab.
977 * Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to
985 * microblaze-opc.h: New MicroBlaze opcode definitions.
1008 * i386-opc.h (CpuL1OM): New.
1019 * i386-opc.h (Cpu8087, Cpu287, Cpu387, Cpu687, CpuFISTTP):
1023 * i386-opc.tbl: Qualify floating point instructions by their
1053 * fr30-desc.c, * fr30-desc.h, * fr30-opc.c, * fr30-opc.h,
1054 * frv-desc.c, * frv-desc.h, * frv-opc.c, * frv-opc.h,
1055 * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c, * ip2k-opc.h,
1056 * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c, * iq2000-opc.h,
1057 * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opc.h,
1058 * lm32-opinst.c, * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
1059 * m32c-opc.h, * m32r-desc.c, * m32r-desc.h, * m32r-opc.c,
1060 * m32r-opc.h, * m32r-opinst.c, * mt-desc.c, * mt-desc.h,
1061 * mt-opc.c, * mt-opc.h, * openrisc-desc.c, * openrisc-desc.h,
1062 * openrisc-opc.c, * openrisc-opc.h, * xc16x-desc.c, * xc16x-desc.h,
1063 * xc16x-opc.c, * xc16x-opc.h, * xstormy16-desc.c, * xstormy16-desc.h,
1064 * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
1080 * mep-opc.c: Regenerate.
1081 * mep-opc.h: Regenerate.
1085 * i386-opc.h (CpuFMA4): Add CpuFMA4.
1088 * i386-opc.tbl: Add FMA4 instructions.
1151 * mep-opc.c: Regenerate.
1154 * mep-opc.c: Regenerate.
1155 * mep-opc.h: Regenerate.
1173 * s390-opc.c (INSTR_RR_0R_OPT, INSTR_RX_0RRD_OPT, MASK_RR_0R_OPT,
1175 * s390-opc.txt (nopr, nop): Use new instruction format.
1215 * moxie-opc.c (moxie_form1_opc_info): Remove branch instructions.
1222 * moxie-opc.c: Recode some MOXIE_F1_4 opcodes as MOXIE_F1_M.
1256 * mep-opc.c: Regenerate.
1257 * mep-opc.h: Regenerate.
1286 * mep-opc.c: Regenerate.
1287 * mep-opc.h: Regenerate.
1291 * i386-opc.h (Cpusse5): Delete.
1294 * i386-opc.tbl: Remove SSE5 instructions.
1315 * mep-opc.c: Regenerate.
1324 * mep-opc.c: Regenerate.
1325 * mep-opc.h: Regenerate.
1331 * mep-opc.c: Regenerate.
1332 * mep-opc.h: Regenerate.
1336 * moxie-opc.c, moxie-dis.c: Created.
1345 * i386-opc.tbl (protb, protw, protd, protq): Set opcode
1357 * mep-opc.c: Regenerate.
1358 * mep-opc.h: Regenerate.
1362 * ppc-opc.c (powerpc_opcodes) <"tlbilxlpid", "tlbilxpid", "tlbilxva",
1374 * ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that
1381 * ppc-opc.c (powerpc_opcodes) <"dcbzl">: Merge the POWER4 and
1399 * cgen-opc.c: Include alloca-conf.h rather than alloca.h.
1402 * openrisc-opc.c: Regenerate.
1430 * ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that
1436 (HFILES): Move lm32-desc.h and lm32-opc.h from..
1448 * score-opc.h: Likewise.
1462 * ppc-opc.c (insert_xc6, extract_xc6): New static functions.
1517 * i386-opc.h (Vex_Imm4): Removed.
1521 * i386-opc.tbl: Remove Vex_Imm4 comments.
1532 * ppc-opc.c (powerpc_opcodes) <"lfdepx", "stfdepx">: Fix the first
1537 * mips-opc.c (mips_builtin_opcodes): Move the Octeon-specific
1542 * fr30-opc.c: Regenerate.
1543 * frv-opc.c: Regenerate.
1544 * ip2k-opc.c: Regenerate.
1545 * iq2000-opc.c: Regenerate.
1546 * lm32-opc.c: Regenerate.
1547 * m32c-opc.c: Regenerate.
1548 * m32r-opc.c: Regenerate.
1549 * mep-opc.c: Regenerate.
1550 * mt-opc.c: Regenerate.
1551 * xc16x-opc.c: Regenerate.
1552 * xstormy16-opc.c: Regenerate.
1558 * m68k-opc.c (m68k_opcodes): Add stldsr instruction.
1562 * ppc-opc.c: Update copyright year.
1577 * i386-opc.tbl: Add PCLMUL + AVX instructions.
1584 * mips-opc.c (XLR): Define.
1600 * mep-opc.c: Regenerate.
1601 * mep-opc.h: Regenerate.
1610 * mips-opc.c (suxc1): Add the flag of FP_D.
1633 * ppc-opc.c (powerpc_opcodes) <mtfsf, mtfsf.>: Deprecate the two
1649 * i386-opc.tbl: Add NoAVX to movnti, lfence and mfence.
1677 * i386-opc.h (CpuP4): Removed.
1686 * i386-opc.tbl: Update movnti, clflush, lfence, mfence, pause,
1698 * i386-opc.h (CpuRdtscp): New.
1702 * i386-opc.tbl: Replace CpuSledgehammer with CpuRdtscp.
1708 * ppc-opc.c (PPCNONE): Define.
1722 * i386-opc.tbl: Add 256bit vmovntdq, vmovntpd and vmovntps.
1783 * i386-opc.h (VexNDS): Add a comment for VEX NDS and VEX DDS.
1785 * i386-opc.tbl: Remove vpermil2pd/vpermil2ps and old FMA
1791 * or32-opc.c (or32_print_register, or32_print_immediate,