Lines Matching refs:OP_MASK
336 #define OP_MASK 0xFC000000 macro
340 #define BRA_MASK OP_MASK
345 #define FP_MASK (OP_MASK | 0xFFE0)
350 #define MEM_MASK OP_MASK
355 #define MFC_MASK (OP_MASK | 0xFFFF)
360 #define MBR_MASK (OP_MASK | 0xC000)
367 #define OPR_MASK (OP_MASK | 0x1FE0)
373 #define PCD_MASK OP_MASK
383 #define EV4HWMEM_MASK (OP_MASK | 0xF000)
387 #define EV5HWMEM_MASK (OP_MASK | 0xF800)
391 #define EV6HWMEM_MASK (OP_MASK | 0xF000)
395 #define EV6HWMBR_MASK (OP_MASK | 0xE000)
1055 { "hw_mfpr", OP(0x19), OP_MASK, EV5, { RA, RBA, EV5HWINDEX } },
1056 { "hw_mfpr", OP(0x19), OP_MASK, EV6, { RA, ZB, EV6HWINDEX } },
1314 { "hw_mtpr", OP(0x1D), OP_MASK, EV5, { RA, RBA, EV5HWINDEX } },
1315 { "hw_mtpr", OP(0x1D), OP_MASK, EV6, { ZA, RB, EV6HWINDEX } },