Lines Matching refs:sub

268 #define LSMW(sub)	(OP6 (LSMW) | N32_LSMW_ ## sub)  argument
269 #define JREG(sub) (OP6 (JREG) | N32_JREG_ ## sub) argument
272 #define BR2(sub) (OP6 (BR2) | (N32_BR2_ ## sub << 16)) argument
273 #define SIMD(sub) (OP6 (SIMD) | N32_SIMD_ ## sub) argument
274 #define ALU1(sub) (OP6 (ALU1) | N32_ALU1_ ## sub) argument
275 #define ALU2(sub) (OP6 (ALU2) | N32_ALU2_ ## sub) argument
276 #define MISC(sub) (OP6 (MISC) | N32_MISC_ ## sub) argument
277 #define MEM(sub) (OP6 (MEM) | N32_MEM_ ## sub) argument
278 #define FPU_RA_IMMBI(sub) (OP6 (sub) | __BIT (12)) argument
279 #define FS1(sub) (OP6 (COP) | N32_FPU_FS1 | (N32_FPU_FS1_ ## sub << 6)) argument
280 #define FS1_F2OP(sub) (OP6 (COP) | N32_FPU_FS1 | (N32_FPU_FS1_F2OP << 6) \ argument
281 | (N32_FPU_FS1_F2OP_ ## sub << 10))
282 #define FS2(sub) (OP6 (COP) | N32_FPU_FS2 | (N32_FPU_FS2_ ## sub << 6)) argument
283 #define FD1(sub) (OP6 (COP) | N32_FPU_FD1 | (N32_FPU_FD1_ ## sub << 6)) argument
284 #define FD1_F2OP(sub) (OP6 (COP) | N32_FPU_FD1 | (N32_FPU_FD1_F2OP << 6) \ argument
285 | (N32_FPU_FD1_F2OP_ ## sub << 10))
286 #define FD2(sub) (OP6 (COP) | N32_FPU_FD2 | (N32_FPU_FD2_ ## sub << 6)) argument
287 #define MFCP(sub) (OP6 (COP) | N32_FPU_MFCP | (N32_FPU_MFCP_ ## sub << 6)) argument
288 #define MFCP_XR(sub) (OP6 (COP) | N32_FPU_MFCP | (N32_FPU_MFCP_XR << 6) \ argument
289 | (N32_FPU_MFCP_XR_ ## sub << 10))
290 #define MTCP(sub) (OP6 (COP) | N32_FPU_MTCP | (N32_FPU_MTCP_ ## sub << 6)) argument
291 #define MTCP_XR(sub) (OP6 (COP) | N32_FPU_MTCP | (N32_FPU_MTCP_XR << 6) \ argument
292 | (N32_FPU_MTCP_XR_ ## sub << 10))
293 #define FPU_MEM(sub) (OP6 (COP) | N32_FPU_ ## sub) argument
294 #define FPU_MEMBI(sub) (OP6 (COP) | N32_FPU_ ## sub | 0x1 << 7) argument
295 #define AUDIO(sub) (OP6 (AEXT) | (N32_AEXT_ ## sub << 20)) argument