Lines Matching refs:COND
128 #define COND(c) rl78->op[1].condition = RL78_Condition_##c macro
843 ID(branch_cond_clear); SM(None, SADDR); SB(bit); DC(pc+IMMS(1)+4); COND(T); in rl78_decode_opcode()
863 ID(branch_cond_clear); DC(pc+IMMS(1)+3); SR(A); SB(bit); COND(T); in rl78_decode_opcode()
881 ID(branch_cond); SM(None, SADDR); SB(bit); DC(pc+IMMS(1)+4); COND(T); in rl78_decode_opcode()
901 ID(branch_cond); DC(pc+IMMS(1)+3); SR(A); SB(bit); COND(T); in rl78_decode_opcode()
919 ID(branch_cond); SM(None, SADDR); SB(bit); DC(pc+IMMS(1)+4); COND(F); in rl78_decode_opcode()
939 ID(branch_cond); DC(pc+IMMS(1)+3); SR(A); SB(bit); COND(F); in rl78_decode_opcode()
1129 ID(branch_cond_clear); SM(None, SFR); SB(bit); DC(pc+IMMS(1)+4); COND(T); in rl78_decode_opcode()
1147 ID(branch_cond_clear); DC(pc+IMMS(1)+3); SM(HL,0); SB(bit); COND(T); in rl78_decode_opcode()
1165 ID(branch_cond); SM(None, SFR); SB(bit); DC(pc+IMMS(1)+4); COND(T); in rl78_decode_opcode()
1183 ID(branch_cond); DC(pc+IMMS(1)+3); SM(HL,0); SB(bit); COND(T); in rl78_decode_opcode()
1201 ID(branch_cond); SM(None, SFR); SB(bit); DC(pc+IMMS(1)+4); COND(F); in rl78_decode_opcode()
1219 ID(branch_cond); DC(pc+IMMS(1)+3); SM(HL,0); SB(bit); COND(F); in rl78_decode_opcode()
2653 ID(branch_cond); DC(pc+IMMS(1)+3); SR(None); COND(H); in rl78_decode_opcode()
2668 ID(skip); COND(C); in rl78_decode_opcode()
2840 ID(branch_cond); DC(pc+IMMS(1)+3); SR(None); COND(NH); in rl78_decode_opcode()
2855 ID(skip); COND(NC); in rl78_decode_opcode()
2979 ID(skip); COND(H); in rl78_decode_opcode()
2994 ID(skip); COND(Z); in rl78_decode_opcode()
3124 ID(skip); COND(NH); in rl78_decode_opcode()
3139 ID(skip); COND(NZ); in rl78_decode_opcode()
5366 ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(C); in rl78_decode_opcode()
5381 ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(Z); in rl78_decode_opcode()
5396 ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(NC); in rl78_decode_opcode()
5411 ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(NZ); in rl78_decode_opcode()