1 //===-- LegalizeTypes.h - DAG Type Legalizer class definition ---*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file defines the DAGTypeLegalizer class. This is a private interface 11 // shared between the code that implements the SelectionDAG::LegalizeTypes 12 // method. 13 // 14 //===----------------------------------------------------------------------===// 15 16 #ifndef LLVM_LIB_CODEGEN_SELECTIONDAG_LEGALIZETYPES_H 17 #define LLVM_LIB_CODEGEN_SELECTIONDAG_LEGALIZETYPES_H 18 19 #include "llvm/ADT/DenseMap.h" 20 #include "llvm/ADT/DenseSet.h" 21 #include "llvm/CodeGen/SelectionDAG.h" 22 #include "llvm/Support/Compiler.h" 23 #include "llvm/Support/Debug.h" 24 #include "llvm/Target/TargetLowering.h" 25 26 namespace llvm { 27 28 //===----------------------------------------------------------------------===// 29 /// DAGTypeLegalizer - This takes an arbitrary SelectionDAG as input and hacks 30 /// on it until only value types the target machine can handle are left. This 31 /// involves promoting small sizes to large sizes or splitting up large values 32 /// into small values. 33 /// 34 class LLVM_LIBRARY_VISIBILITY DAGTypeLegalizer { 35 const TargetLowering &TLI; 36 SelectionDAG &DAG; 37 public: 38 // NodeIdFlags - This pass uses the NodeId on the SDNodes to hold information 39 // about the state of the node. The enum has all the values. 40 enum NodeIdFlags { 41 /// ReadyToProcess - All operands have been processed, so this node is ready 42 /// to be handled. 43 ReadyToProcess = 0, 44 45 /// NewNode - This is a new node, not before seen, that was created in the 46 /// process of legalizing some other node. 47 NewNode = -1, 48 49 /// Unanalyzed - This node's ID needs to be set to the number of its 50 /// unprocessed operands. 51 Unanalyzed = -2, 52 53 /// Processed - This is a node that has already been processed. 54 Processed = -3 55 56 // 1+ - This is a node which has this many unprocessed operands. 57 }; 58 private: 59 60 /// ValueTypeActions - This is a bitvector that contains two bits for each 61 /// simple value type, where the two bits correspond to the LegalizeAction 62 /// enum from TargetLowering. This can be queried with "getTypeAction(VT)". 63 TargetLowering::ValueTypeActionImpl ValueTypeActions; 64 65 /// getTypeAction - Return how we should legalize values of this type. getTypeAction(EVT VT)66 TargetLowering::LegalizeTypeAction getTypeAction(EVT VT) const { 67 return TLI.getTypeAction(*DAG.getContext(), VT); 68 } 69 70 /// isTypeLegal - Return true if this type is legal on this target. isTypeLegal(EVT VT)71 bool isTypeLegal(EVT VT) const { 72 return TLI.getTypeAction(*DAG.getContext(), VT) == TargetLowering::TypeLegal; 73 } 74 75 /// isSimpleLegalType - Return true if this is a simple legal type. isSimpleLegalType(EVT VT)76 bool isSimpleLegalType(EVT VT) const { 77 return VT.isSimple() && TLI.isTypeLegal(VT); 78 } 79 80 /// isLegalInHWReg - Return true if this type can be passed in registers. 81 /// For example, x86_64's f128, should to be legally in registers 82 /// and only some operations converted to library calls or integer 83 /// bitwise operations. isLegalInHWReg(EVT VT)84 bool isLegalInHWReg(EVT VT) const { 85 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 86 return VT == NVT && isSimpleLegalType(VT); 87 } 88 getSetCCResultType(EVT VT)89 EVT getSetCCResultType(EVT VT) const { 90 return TLI.getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT); 91 } 92 93 /// IgnoreNodeResults - Pretend all of this node's results are legal. IgnoreNodeResults(SDNode * N)94 bool IgnoreNodeResults(SDNode *N) const { 95 return N->getOpcode() == ISD::TargetConstant; 96 } 97 98 /// PromotedIntegers - For integer nodes that are below legal width, this map 99 /// indicates what promoted value to use. 100 SmallDenseMap<SDValue, SDValue, 8> PromotedIntegers; 101 102 /// ExpandedIntegers - For integer nodes that need to be expanded this map 103 /// indicates which operands are the expanded version of the input. 104 SmallDenseMap<SDValue, std::pair<SDValue, SDValue>, 8> ExpandedIntegers; 105 106 /// SoftenedFloats - For floating point nodes converted to integers of 107 /// the same size, this map indicates the converted value to use. 108 SmallDenseMap<SDValue, SDValue, 8> SoftenedFloats; 109 110 /// PromotedFloats - For floating point nodes that have a smaller precision 111 /// than the smallest supported precision, this map indicates what promoted 112 /// value to use. 113 SmallDenseMap<SDValue, SDValue, 8> PromotedFloats; 114 115 /// ExpandedFloats - For float nodes that need to be expanded this map 116 /// indicates which operands are the expanded version of the input. 117 SmallDenseMap<SDValue, std::pair<SDValue, SDValue>, 8> ExpandedFloats; 118 119 /// ScalarizedVectors - For nodes that are <1 x ty>, this map indicates the 120 /// scalar value of type 'ty' to use. 121 SmallDenseMap<SDValue, SDValue, 8> ScalarizedVectors; 122 123 /// SplitVectors - For nodes that need to be split this map indicates 124 /// which operands are the expanded version of the input. 125 SmallDenseMap<SDValue, std::pair<SDValue, SDValue>, 8> SplitVectors; 126 127 /// WidenedVectors - For vector nodes that need to be widened, indicates 128 /// the widened value to use. 129 SmallDenseMap<SDValue, SDValue, 8> WidenedVectors; 130 131 /// ReplacedValues - For values that have been replaced with another, 132 /// indicates the replacement value to use. 133 SmallDenseMap<SDValue, SDValue, 8> ReplacedValues; 134 135 /// Worklist - This defines a worklist of nodes to process. In order to be 136 /// pushed onto this worklist, all operands of a node must have already been 137 /// processed. 138 SmallVector<SDNode*, 128> Worklist; 139 140 public: DAGTypeLegalizer(SelectionDAG & dag)141 explicit DAGTypeLegalizer(SelectionDAG &dag) 142 : TLI(dag.getTargetLoweringInfo()), DAG(dag), 143 ValueTypeActions(TLI.getValueTypeActions()) { 144 static_assert(MVT::LAST_VALUETYPE <= MVT::MAX_ALLOWED_VALUETYPE, 145 "Too many value types for ValueTypeActions to hold!"); 146 } 147 148 /// run - This is the main entry point for the type legalizer. This does a 149 /// top-down traversal of the dag, legalizing types as it goes. Returns 150 /// "true" if it made any changes. 151 bool run(); 152 NoteDeletion(SDNode * Old,SDNode * New)153 void NoteDeletion(SDNode *Old, SDNode *New) { 154 ExpungeNode(Old); 155 ExpungeNode(New); 156 for (unsigned i = 0, e = Old->getNumValues(); i != e; ++i) 157 ReplacedValues[SDValue(Old, i)] = SDValue(New, i); 158 } 159 getDAG()160 SelectionDAG &getDAG() const { return DAG; } 161 162 private: 163 SDNode *AnalyzeNewNode(SDNode *N); 164 void AnalyzeNewValue(SDValue &Val); 165 void ExpungeNode(SDNode *N); 166 void PerformExpensiveChecks(); 167 void RemapValue(SDValue &N); 168 169 // Common routines. 170 SDValue BitConvertToInteger(SDValue Op); 171 SDValue BitConvertVectorToIntegerVector(SDValue Op); 172 SDValue CreateStackStoreLoad(SDValue Op, EVT DestVT); 173 bool CustomLowerNode(SDNode *N, EVT VT, bool LegalizeResult); 174 bool CustomWidenLowerNode(SDNode *N, EVT VT); 175 176 /// DisintegrateMERGE_VALUES - Replace each result of the given MERGE_VALUES 177 /// node with the corresponding input operand, except for the result 'ResNo', 178 /// for which the corresponding input operand is returned. 179 SDValue DisintegrateMERGE_VALUES(SDNode *N, unsigned ResNo); 180 181 SDValue GetVectorElementPointer(SDValue VecPtr, EVT EltVT, SDValue Index); 182 SDValue JoinIntegers(SDValue Lo, SDValue Hi); 183 SDValue LibCallify(RTLIB::Libcall LC, SDNode *N, bool isSigned); 184 185 std::pair<SDValue, SDValue> ExpandChainLibCall(RTLIB::Libcall LC, 186 SDNode *Node, bool isSigned); 187 std::pair<SDValue, SDValue> ExpandAtomic(SDNode *Node); 188 189 SDValue PromoteTargetBoolean(SDValue Bool, EVT ValVT); 190 191 /// Modify Bit Vector to match SetCC result type of ValVT. 192 /// The bit vector is widened with zeroes when WithZeroes is true. 193 SDValue WidenTargetBoolean(SDValue Bool, EVT ValVT, bool WithZeroes = false); 194 195 void ReplaceValueWith(SDValue From, SDValue To); 196 void SplitInteger(SDValue Op, SDValue &Lo, SDValue &Hi); 197 void SplitInteger(SDValue Op, EVT LoVT, EVT HiVT, 198 SDValue &Lo, SDValue &Hi); 199 200 //===--------------------------------------------------------------------===// 201 // Integer Promotion Support: LegalizeIntegerTypes.cpp 202 //===--------------------------------------------------------------------===// 203 204 /// GetPromotedInteger - Given a processed operand Op which was promoted to a 205 /// larger integer type, this returns the promoted value. The low bits of the 206 /// promoted value corresponding to the original type are exactly equal to Op. 207 /// The extra bits contain rubbish, so the promoted value may need to be zero- 208 /// or sign-extended from the original type before it is usable (the helpers 209 /// SExtPromotedInteger and ZExtPromotedInteger can do this for you). 210 /// For example, if Op is an i16 and was promoted to an i32, then this method 211 /// returns an i32, the lower 16 bits of which coincide with Op, and the upper 212 /// 16 bits of which contain rubbish. GetPromotedInteger(SDValue Op)213 SDValue GetPromotedInteger(SDValue Op) { 214 SDValue &PromotedOp = PromotedIntegers[Op]; 215 RemapValue(PromotedOp); 216 assert(PromotedOp.getNode() && "Operand wasn't promoted?"); 217 return PromotedOp; 218 } 219 void SetPromotedInteger(SDValue Op, SDValue Result); 220 221 /// SExtPromotedInteger - Get a promoted operand and sign extend it to the 222 /// final size. SExtPromotedInteger(SDValue Op)223 SDValue SExtPromotedInteger(SDValue Op) { 224 EVT OldVT = Op.getValueType(); 225 SDLoc dl(Op); 226 Op = GetPromotedInteger(Op); 227 return DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, Op.getValueType(), Op, 228 DAG.getValueType(OldVT)); 229 } 230 231 /// ZExtPromotedInteger - Get a promoted operand and zero extend it to the 232 /// final size. ZExtPromotedInteger(SDValue Op)233 SDValue ZExtPromotedInteger(SDValue Op) { 234 EVT OldVT = Op.getValueType(); 235 SDLoc dl(Op); 236 Op = GetPromotedInteger(Op); 237 return DAG.getZeroExtendInReg(Op, dl, OldVT.getScalarType()); 238 } 239 240 // Integer Result Promotion. 241 void PromoteIntegerResult(SDNode *N, unsigned ResNo); 242 SDValue PromoteIntRes_MERGE_VALUES(SDNode *N, unsigned ResNo); 243 SDValue PromoteIntRes_AssertSext(SDNode *N); 244 SDValue PromoteIntRes_AssertZext(SDNode *N); 245 SDValue PromoteIntRes_Atomic0(AtomicSDNode *N); 246 SDValue PromoteIntRes_Atomic1(AtomicSDNode *N); 247 SDValue PromoteIntRes_AtomicCmpSwap(AtomicSDNode *N, unsigned ResNo); 248 SDValue PromoteIntRes_EXTRACT_SUBVECTOR(SDNode *N); 249 SDValue PromoteIntRes_VECTOR_SHUFFLE(SDNode *N); 250 SDValue PromoteIntRes_BUILD_VECTOR(SDNode *N); 251 SDValue PromoteIntRes_SCALAR_TO_VECTOR(SDNode *N); 252 SDValue PromoteIntRes_INSERT_VECTOR_ELT(SDNode *N); 253 SDValue PromoteIntRes_CONCAT_VECTORS(SDNode *N); 254 SDValue PromoteIntRes_BITCAST(SDNode *N); 255 SDValue PromoteIntRes_BSWAP(SDNode *N); 256 SDValue PromoteIntRes_BITREVERSE(SDNode *N); 257 SDValue PromoteIntRes_BUILD_PAIR(SDNode *N); 258 SDValue PromoteIntRes_Constant(SDNode *N); 259 SDValue PromoteIntRes_CONVERT_RNDSAT(SDNode *N); 260 SDValue PromoteIntRes_CTLZ(SDNode *N); 261 SDValue PromoteIntRes_CTPOP(SDNode *N); 262 SDValue PromoteIntRes_CTTZ(SDNode *N); 263 SDValue PromoteIntRes_EXTRACT_VECTOR_ELT(SDNode *N); 264 SDValue PromoteIntRes_FP_TO_XINT(SDNode *N); 265 SDValue PromoteIntRes_FP_TO_FP16(SDNode *N); 266 SDValue PromoteIntRes_INT_EXTEND(SDNode *N); 267 SDValue PromoteIntRes_LOAD(LoadSDNode *N); 268 SDValue PromoteIntRes_MLOAD(MaskedLoadSDNode *N); 269 SDValue PromoteIntRes_MGATHER(MaskedGatherSDNode *N); 270 SDValue PromoteIntRes_Overflow(SDNode *N); 271 SDValue PromoteIntRes_SADDSUBO(SDNode *N, unsigned ResNo); 272 SDValue PromoteIntRes_SELECT(SDNode *N); 273 SDValue PromoteIntRes_VSELECT(SDNode *N); 274 SDValue PromoteIntRes_SELECT_CC(SDNode *N); 275 SDValue PromoteIntRes_SETCC(SDNode *N); 276 SDValue PromoteIntRes_SHL(SDNode *N); 277 SDValue PromoteIntRes_SimpleIntBinOp(SDNode *N); 278 SDValue PromoteIntRes_ZExtIntBinOp(SDNode *N); 279 SDValue PromoteIntRes_SExtIntBinOp(SDNode *N); 280 SDValue PromoteIntRes_SIGN_EXTEND_INREG(SDNode *N); 281 SDValue PromoteIntRes_SRA(SDNode *N); 282 SDValue PromoteIntRes_SRL(SDNode *N); 283 SDValue PromoteIntRes_TRUNCATE(SDNode *N); 284 SDValue PromoteIntRes_UADDSUBO(SDNode *N, unsigned ResNo); 285 SDValue PromoteIntRes_UNDEF(SDNode *N); 286 SDValue PromoteIntRes_VAARG(SDNode *N); 287 SDValue PromoteIntRes_XMULO(SDNode *N, unsigned ResNo); 288 289 // Integer Operand Promotion. 290 bool PromoteIntegerOperand(SDNode *N, unsigned OperandNo); 291 SDValue PromoteIntOp_ANY_EXTEND(SDNode *N); 292 SDValue PromoteIntOp_ATOMIC_STORE(AtomicSDNode *N); 293 SDValue PromoteIntOp_BITCAST(SDNode *N); 294 SDValue PromoteIntOp_BUILD_PAIR(SDNode *N); 295 SDValue PromoteIntOp_BR_CC(SDNode *N, unsigned OpNo); 296 SDValue PromoteIntOp_BRCOND(SDNode *N, unsigned OpNo); 297 SDValue PromoteIntOp_BUILD_VECTOR(SDNode *N); 298 SDValue PromoteIntOp_CONVERT_RNDSAT(SDNode *N); 299 SDValue PromoteIntOp_INSERT_VECTOR_ELT(SDNode *N, unsigned OpNo); 300 SDValue PromoteIntOp_EXTRACT_VECTOR_ELT(SDNode *N); 301 SDValue PromoteIntOp_EXTRACT_SUBVECTOR(SDNode *N); 302 SDValue PromoteIntOp_CONCAT_VECTORS(SDNode *N); 303 SDValue PromoteIntOp_SCALAR_TO_VECTOR(SDNode *N); 304 SDValue PromoteIntOp_SELECT(SDNode *N, unsigned OpNo); 305 SDValue PromoteIntOp_SELECT_CC(SDNode *N, unsigned OpNo); 306 SDValue PromoteIntOp_SETCC(SDNode *N, unsigned OpNo); 307 SDValue PromoteIntOp_Shift(SDNode *N); 308 SDValue PromoteIntOp_SIGN_EXTEND(SDNode *N); 309 SDValue PromoteIntOp_SINT_TO_FP(SDNode *N); 310 SDValue PromoteIntOp_STORE(StoreSDNode *N, unsigned OpNo); 311 SDValue PromoteIntOp_TRUNCATE(SDNode *N); 312 SDValue PromoteIntOp_UINT_TO_FP(SDNode *N); 313 SDValue PromoteIntOp_ZERO_EXTEND(SDNode *N); 314 SDValue PromoteIntOp_MSTORE(MaskedStoreSDNode *N, unsigned OpNo); 315 SDValue PromoteIntOp_MLOAD(MaskedLoadSDNode *N, unsigned OpNo); 316 SDValue PromoteIntOp_MSCATTER(MaskedScatterSDNode *N, unsigned OpNo); 317 SDValue PromoteIntOp_MGATHER(MaskedGatherSDNode *N, unsigned OpNo); 318 319 void PromoteSetCCOperands(SDValue &LHS,SDValue &RHS, ISD::CondCode Code); 320 321 //===--------------------------------------------------------------------===// 322 // Integer Expansion Support: LegalizeIntegerTypes.cpp 323 //===--------------------------------------------------------------------===// 324 325 /// GetExpandedInteger - Given a processed operand Op which was expanded into 326 /// two integers of half the size, this returns the two halves. The low bits 327 /// of Op are exactly equal to the bits of Lo; the high bits exactly equal Hi. 328 /// For example, if Op is an i64 which was expanded into two i32's, then this 329 /// method returns the two i32's, with Lo being equal to the lower 32 bits of 330 /// Op, and Hi being equal to the upper 32 bits. 331 void GetExpandedInteger(SDValue Op, SDValue &Lo, SDValue &Hi); 332 void SetExpandedInteger(SDValue Op, SDValue Lo, SDValue Hi); 333 334 // Integer Result Expansion. 335 void ExpandIntegerResult(SDNode *N, unsigned ResNo); 336 void ExpandIntRes_ANY_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi); 337 void ExpandIntRes_AssertSext (SDNode *N, SDValue &Lo, SDValue &Hi); 338 void ExpandIntRes_AssertZext (SDNode *N, SDValue &Lo, SDValue &Hi); 339 void ExpandIntRes_Constant (SDNode *N, SDValue &Lo, SDValue &Hi); 340 void ExpandIntRes_CTLZ (SDNode *N, SDValue &Lo, SDValue &Hi); 341 void ExpandIntRes_CTPOP (SDNode *N, SDValue &Lo, SDValue &Hi); 342 void ExpandIntRes_CTTZ (SDNode *N, SDValue &Lo, SDValue &Hi); 343 void ExpandIntRes_LOAD (LoadSDNode *N, SDValue &Lo, SDValue &Hi); 344 void ExpandIntRes_READCYCLECOUNTER (SDNode *N, SDValue &Lo, SDValue &Hi); 345 void ExpandIntRes_SIGN_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi); 346 void ExpandIntRes_SIGN_EXTEND_INREG (SDNode *N, SDValue &Lo, SDValue &Hi); 347 void ExpandIntRes_TRUNCATE (SDNode *N, SDValue &Lo, SDValue &Hi); 348 void ExpandIntRes_ZERO_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi); 349 void ExpandIntRes_FP_TO_SINT (SDNode *N, SDValue &Lo, SDValue &Hi); 350 void ExpandIntRes_FP_TO_UINT (SDNode *N, SDValue &Lo, SDValue &Hi); 351 352 void ExpandIntRes_Logical (SDNode *N, SDValue &Lo, SDValue &Hi); 353 void ExpandIntRes_ADDSUB (SDNode *N, SDValue &Lo, SDValue &Hi); 354 void ExpandIntRes_ADDSUBC (SDNode *N, SDValue &Lo, SDValue &Hi); 355 void ExpandIntRes_ADDSUBE (SDNode *N, SDValue &Lo, SDValue &Hi); 356 void ExpandIntRes_BITREVERSE (SDNode *N, SDValue &Lo, SDValue &Hi); 357 void ExpandIntRes_BSWAP (SDNode *N, SDValue &Lo, SDValue &Hi); 358 void ExpandIntRes_MUL (SDNode *N, SDValue &Lo, SDValue &Hi); 359 void ExpandIntRes_SDIV (SDNode *N, SDValue &Lo, SDValue &Hi); 360 void ExpandIntRes_SREM (SDNode *N, SDValue &Lo, SDValue &Hi); 361 void ExpandIntRes_UDIV (SDNode *N, SDValue &Lo, SDValue &Hi); 362 void ExpandIntRes_UREM (SDNode *N, SDValue &Lo, SDValue &Hi); 363 void ExpandIntRes_Shift (SDNode *N, SDValue &Lo, SDValue &Hi); 364 365 void ExpandIntRes_SADDSUBO (SDNode *N, SDValue &Lo, SDValue &Hi); 366 void ExpandIntRes_UADDSUBO (SDNode *N, SDValue &Lo, SDValue &Hi); 367 void ExpandIntRes_XMULO (SDNode *N, SDValue &Lo, SDValue &Hi); 368 369 void ExpandIntRes_ATOMIC_LOAD (SDNode *N, SDValue &Lo, SDValue &Hi); 370 371 void ExpandShiftByConstant(SDNode *N, const APInt &Amt, 372 SDValue &Lo, SDValue &Hi); 373 bool ExpandShiftWithKnownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi); 374 bool ExpandShiftWithUnknownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi); 375 376 // Integer Operand Expansion. 377 bool ExpandIntegerOperand(SDNode *N, unsigned OperandNo); 378 SDValue ExpandIntOp_BR_CC(SDNode *N); 379 SDValue ExpandIntOp_SELECT_CC(SDNode *N); 380 SDValue ExpandIntOp_SETCC(SDNode *N); 381 SDValue ExpandIntOp_SETCCE(SDNode *N); 382 SDValue ExpandIntOp_Shift(SDNode *N); 383 SDValue ExpandIntOp_SINT_TO_FP(SDNode *N); 384 SDValue ExpandIntOp_STORE(StoreSDNode *N, unsigned OpNo); 385 SDValue ExpandIntOp_TRUNCATE(SDNode *N); 386 SDValue ExpandIntOp_UINT_TO_FP(SDNode *N); 387 SDValue ExpandIntOp_RETURNADDR(SDNode *N); 388 SDValue ExpandIntOp_ATOMIC_STORE(SDNode *N); 389 390 void IntegerExpandSetCCOperands(SDValue &NewLHS, SDValue &NewRHS, 391 ISD::CondCode &CCCode, SDLoc dl); 392 393 //===--------------------------------------------------------------------===// 394 // Float to Integer Conversion Support: LegalizeFloatTypes.cpp 395 //===--------------------------------------------------------------------===// 396 397 /// GetSoftenedFloat - Given an operand Op of Float type, returns the integer 398 /// if the Op is not supported in target HW and converted to the integer. 399 /// The integer contains exactly the same bits as Op - only the type changed. 400 /// For example, if Op is an f32 which was softened to an i32, then this method 401 /// returns an i32, the bits of which coincide with those of Op. 402 /// If the Op can be efficiently supported in target HW or the operand must 403 /// stay in a register, the Op is not converted to an integer. 404 /// In that case, the given op is returned. GetSoftenedFloat(SDValue Op)405 SDValue GetSoftenedFloat(SDValue Op) { 406 SDValue &SoftenedOp = SoftenedFloats[Op]; 407 if (!SoftenedOp.getNode() && 408 isSimpleLegalType(Op.getValueType())) 409 return Op; 410 RemapValue(SoftenedOp); 411 assert(SoftenedOp.getNode() && "Operand wasn't converted to integer?"); 412 return SoftenedOp; 413 } 414 void SetSoftenedFloat(SDValue Op, SDValue Result); 415 416 // Call ReplaceValueWith(SDValue(N, ResNo), Res) if necessary. ReplaceSoftenFloatResult(SDNode * N,unsigned ResNo,SDValue & NewRes)417 void ReplaceSoftenFloatResult(SDNode *N, unsigned ResNo, SDValue &NewRes) { 418 // When the result type can be kept in HW registers, the converted 419 // NewRes node could have the same type. We can save the effort in 420 // cloning every user of N in SoftenFloatOperand or other legalization functions, 421 // by calling ReplaceValueWith here to update all users. 422 if (NewRes.getNode() != N && isLegalInHWReg(N->getValueType(ResNo))) 423 ReplaceValueWith(SDValue(N, ResNo), NewRes); 424 } 425 426 // Convert Float Results to Integer for Non-HW-supported Operations. 427 bool SoftenFloatResult(SDNode *N, unsigned ResNo); 428 SDValue SoftenFloatRes_MERGE_VALUES(SDNode *N, unsigned ResNo); 429 SDValue SoftenFloatRes_BITCAST(SDNode *N, unsigned ResNo); 430 SDValue SoftenFloatRes_BUILD_PAIR(SDNode *N); 431 SDValue SoftenFloatRes_ConstantFP(SDNode *N, unsigned ResNo); 432 SDValue SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N); 433 SDValue SoftenFloatRes_FABS(SDNode *N, unsigned ResNo); 434 SDValue SoftenFloatRes_FMINNUM(SDNode *N); 435 SDValue SoftenFloatRes_FMAXNUM(SDNode *N); 436 SDValue SoftenFloatRes_FADD(SDNode *N); 437 SDValue SoftenFloatRes_FCEIL(SDNode *N); 438 SDValue SoftenFloatRes_FCOPYSIGN(SDNode *N, unsigned ResNo); 439 SDValue SoftenFloatRes_FCOS(SDNode *N); 440 SDValue SoftenFloatRes_FDIV(SDNode *N); 441 SDValue SoftenFloatRes_FEXP(SDNode *N); 442 SDValue SoftenFloatRes_FEXP2(SDNode *N); 443 SDValue SoftenFloatRes_FFLOOR(SDNode *N); 444 SDValue SoftenFloatRes_FLOG(SDNode *N); 445 SDValue SoftenFloatRes_FLOG2(SDNode *N); 446 SDValue SoftenFloatRes_FLOG10(SDNode *N); 447 SDValue SoftenFloatRes_FMA(SDNode *N); 448 SDValue SoftenFloatRes_FMUL(SDNode *N); 449 SDValue SoftenFloatRes_FNEARBYINT(SDNode *N); 450 SDValue SoftenFloatRes_FNEG(SDNode *N, unsigned ResNo); 451 SDValue SoftenFloatRes_FP_EXTEND(SDNode *N); 452 SDValue SoftenFloatRes_FP16_TO_FP(SDNode *N); 453 SDValue SoftenFloatRes_FP_ROUND(SDNode *N); 454 SDValue SoftenFloatRes_FPOW(SDNode *N); 455 SDValue SoftenFloatRes_FPOWI(SDNode *N); 456 SDValue SoftenFloatRes_FREM(SDNode *N); 457 SDValue SoftenFloatRes_FRINT(SDNode *N); 458 SDValue SoftenFloatRes_FROUND(SDNode *N); 459 SDValue SoftenFloatRes_FSIN(SDNode *N); 460 SDValue SoftenFloatRes_FSQRT(SDNode *N); 461 SDValue SoftenFloatRes_FSUB(SDNode *N); 462 SDValue SoftenFloatRes_FTRUNC(SDNode *N); 463 SDValue SoftenFloatRes_LOAD(SDNode *N, unsigned ResNo); 464 SDValue SoftenFloatRes_SELECT(SDNode *N, unsigned ResNo); 465 SDValue SoftenFloatRes_SELECT_CC(SDNode *N, unsigned ResNo); 466 SDValue SoftenFloatRes_UNDEF(SDNode *N); 467 SDValue SoftenFloatRes_VAARG(SDNode *N); 468 SDValue SoftenFloatRes_XINT_TO_FP(SDNode *N); 469 470 // Return true if we can skip softening the given operand or SDNode because 471 // it was soften before by SoftenFloatResult and references to the operand 472 // were replaced by ReplaceValueWith. 473 bool CanSkipSoftenFloatOperand(SDNode *N, unsigned OpNo); 474 475 // Convert Float Operand to Integer for Non-HW-supported Operations. 476 bool SoftenFloatOperand(SDNode *N, unsigned OpNo); 477 SDValue SoftenFloatOp_BITCAST(SDNode *N); 478 SDValue SoftenFloatOp_BR_CC(SDNode *N); 479 SDValue SoftenFloatOp_FP_EXTEND(SDNode *N); 480 SDValue SoftenFloatOp_FP_ROUND(SDNode *N); 481 SDValue SoftenFloatOp_FP_TO_XINT(SDNode *N); 482 SDValue SoftenFloatOp_SELECT_CC(SDNode *N); 483 SDValue SoftenFloatOp_SETCC(SDNode *N); 484 SDValue SoftenFloatOp_STORE(SDNode *N, unsigned OpNo); 485 486 //===--------------------------------------------------------------------===// 487 // Float Expansion Support: LegalizeFloatTypes.cpp 488 //===--------------------------------------------------------------------===// 489 490 /// GetExpandedFloat - Given a processed operand Op which was expanded into 491 /// two floating point values of half the size, this returns the two halves. 492 /// The low bits of Op are exactly equal to the bits of Lo; the high bits 493 /// exactly equal Hi. For example, if Op is a ppcf128 which was expanded 494 /// into two f64's, then this method returns the two f64's, with Lo being 495 /// equal to the lower 64 bits of Op, and Hi to the upper 64 bits. 496 void GetExpandedFloat(SDValue Op, SDValue &Lo, SDValue &Hi); 497 void SetExpandedFloat(SDValue Op, SDValue Lo, SDValue Hi); 498 499 // Float Result Expansion. 500 void ExpandFloatResult(SDNode *N, unsigned ResNo); 501 void ExpandFloatRes_ConstantFP(SDNode *N, SDValue &Lo, SDValue &Hi); 502 void ExpandFloatRes_FABS (SDNode *N, SDValue &Lo, SDValue &Hi); 503 void ExpandFloatRes_FMINNUM (SDNode *N, SDValue &Lo, SDValue &Hi); 504 void ExpandFloatRes_FMAXNUM (SDNode *N, SDValue &Lo, SDValue &Hi); 505 void ExpandFloatRes_FADD (SDNode *N, SDValue &Lo, SDValue &Hi); 506 void ExpandFloatRes_FCEIL (SDNode *N, SDValue &Lo, SDValue &Hi); 507 void ExpandFloatRes_FCOPYSIGN (SDNode *N, SDValue &Lo, SDValue &Hi); 508 void ExpandFloatRes_FCOS (SDNode *N, SDValue &Lo, SDValue &Hi); 509 void ExpandFloatRes_FDIV (SDNode *N, SDValue &Lo, SDValue &Hi); 510 void ExpandFloatRes_FEXP (SDNode *N, SDValue &Lo, SDValue &Hi); 511 void ExpandFloatRes_FEXP2 (SDNode *N, SDValue &Lo, SDValue &Hi); 512 void ExpandFloatRes_FFLOOR (SDNode *N, SDValue &Lo, SDValue &Hi); 513 void ExpandFloatRes_FLOG (SDNode *N, SDValue &Lo, SDValue &Hi); 514 void ExpandFloatRes_FLOG2 (SDNode *N, SDValue &Lo, SDValue &Hi); 515 void ExpandFloatRes_FLOG10 (SDNode *N, SDValue &Lo, SDValue &Hi); 516 void ExpandFloatRes_FMA (SDNode *N, SDValue &Lo, SDValue &Hi); 517 void ExpandFloatRes_FMUL (SDNode *N, SDValue &Lo, SDValue &Hi); 518 void ExpandFloatRes_FNEARBYINT(SDNode *N, SDValue &Lo, SDValue &Hi); 519 void ExpandFloatRes_FNEG (SDNode *N, SDValue &Lo, SDValue &Hi); 520 void ExpandFloatRes_FP_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi); 521 void ExpandFloatRes_FPOW (SDNode *N, SDValue &Lo, SDValue &Hi); 522 void ExpandFloatRes_FPOWI (SDNode *N, SDValue &Lo, SDValue &Hi); 523 void ExpandFloatRes_FREM (SDNode *N, SDValue &Lo, SDValue &Hi); 524 void ExpandFloatRes_FRINT (SDNode *N, SDValue &Lo, SDValue &Hi); 525 void ExpandFloatRes_FROUND (SDNode *N, SDValue &Lo, SDValue &Hi); 526 void ExpandFloatRes_FSIN (SDNode *N, SDValue &Lo, SDValue &Hi); 527 void ExpandFloatRes_FSQRT (SDNode *N, SDValue &Lo, SDValue &Hi); 528 void ExpandFloatRes_FSUB (SDNode *N, SDValue &Lo, SDValue &Hi); 529 void ExpandFloatRes_FTRUNC (SDNode *N, SDValue &Lo, SDValue &Hi); 530 void ExpandFloatRes_LOAD (SDNode *N, SDValue &Lo, SDValue &Hi); 531 void ExpandFloatRes_XINT_TO_FP(SDNode *N, SDValue &Lo, SDValue &Hi); 532 533 // Float Operand Expansion. 534 bool ExpandFloatOperand(SDNode *N, unsigned OperandNo); 535 SDValue ExpandFloatOp_BR_CC(SDNode *N); 536 SDValue ExpandFloatOp_FCOPYSIGN(SDNode *N); 537 SDValue ExpandFloatOp_FP_ROUND(SDNode *N); 538 SDValue ExpandFloatOp_FP_TO_SINT(SDNode *N); 539 SDValue ExpandFloatOp_FP_TO_UINT(SDNode *N); 540 SDValue ExpandFloatOp_SELECT_CC(SDNode *N); 541 SDValue ExpandFloatOp_SETCC(SDNode *N); 542 SDValue ExpandFloatOp_STORE(SDNode *N, unsigned OpNo); 543 544 void FloatExpandSetCCOperands(SDValue &NewLHS, SDValue &NewRHS, 545 ISD::CondCode &CCCode, SDLoc dl); 546 547 548 //===--------------------------------------------------------------------===// 549 // Float promotion support: LegalizeFloatTypes.cpp 550 //===--------------------------------------------------------------------===// 551 GetPromotedFloat(SDValue Op)552 SDValue GetPromotedFloat(SDValue Op) { 553 SDValue &PromotedOp = PromotedFloats[Op]; 554 RemapValue(PromotedOp); 555 assert(PromotedOp.getNode() && "Operand wasn't promoted?"); 556 return PromotedOp; 557 } 558 void SetPromotedFloat(SDValue Op, SDValue Result); 559 560 void PromoteFloatResult(SDNode *N, unsigned ResNo); 561 SDValue PromoteFloatRes_BITCAST(SDNode *N); 562 SDValue PromoteFloatRes_BinOp(SDNode *N); 563 SDValue PromoteFloatRes_ConstantFP(SDNode *N); 564 SDValue PromoteFloatRes_EXTRACT_VECTOR_ELT(SDNode *N); 565 SDValue PromoteFloatRes_FCOPYSIGN(SDNode *N); 566 SDValue PromoteFloatRes_FMAD(SDNode *N); 567 SDValue PromoteFloatRes_FPOWI(SDNode *N); 568 SDValue PromoteFloatRes_FP_ROUND(SDNode *N); 569 SDValue PromoteFloatRes_LOAD(SDNode *N); 570 SDValue PromoteFloatRes_SELECT(SDNode *N); 571 SDValue PromoteFloatRes_SELECT_CC(SDNode *N); 572 SDValue PromoteFloatRes_UnaryOp(SDNode *N); 573 SDValue PromoteFloatRes_UNDEF(SDNode *N); 574 SDValue PromoteFloatRes_XINT_TO_FP(SDNode *N); 575 576 bool PromoteFloatOperand(SDNode *N, unsigned ResNo); 577 SDValue PromoteFloatOp_BITCAST(SDNode *N, unsigned OpNo); 578 SDValue PromoteFloatOp_FCOPYSIGN(SDNode *N, unsigned OpNo); 579 SDValue PromoteFloatOp_FP_EXTEND(SDNode *N, unsigned OpNo); 580 SDValue PromoteFloatOp_FP_TO_XINT(SDNode *N, unsigned OpNo); 581 SDValue PromoteFloatOp_STORE(SDNode *N, unsigned OpNo); 582 SDValue PromoteFloatOp_SELECT_CC(SDNode *N, unsigned OpNo); 583 SDValue PromoteFloatOp_SETCC(SDNode *N, unsigned OpNo); 584 585 //===--------------------------------------------------------------------===// 586 // Scalarization Support: LegalizeVectorTypes.cpp 587 //===--------------------------------------------------------------------===// 588 589 /// GetScalarizedVector - Given a processed one-element vector Op which was 590 /// scalarized to its element type, this returns the element. For example, 591 /// if Op is a v1i32, Op = < i32 val >, this method returns val, an i32. GetScalarizedVector(SDValue Op)592 SDValue GetScalarizedVector(SDValue Op) { 593 SDValue &ScalarizedOp = ScalarizedVectors[Op]; 594 RemapValue(ScalarizedOp); 595 assert(ScalarizedOp.getNode() && "Operand wasn't scalarized?"); 596 return ScalarizedOp; 597 } 598 void SetScalarizedVector(SDValue Op, SDValue Result); 599 600 // Vector Result Scalarization: <1 x ty> -> ty. 601 void ScalarizeVectorResult(SDNode *N, unsigned OpNo); 602 SDValue ScalarizeVecRes_MERGE_VALUES(SDNode *N, unsigned ResNo); 603 SDValue ScalarizeVecRes_BinOp(SDNode *N); 604 SDValue ScalarizeVecRes_TernaryOp(SDNode *N); 605 SDValue ScalarizeVecRes_UnaryOp(SDNode *N); 606 SDValue ScalarizeVecRes_InregOp(SDNode *N); 607 608 SDValue ScalarizeVecRes_BITCAST(SDNode *N); 609 SDValue ScalarizeVecRes_BUILD_VECTOR(SDNode *N); 610 SDValue ScalarizeVecRes_CONVERT_RNDSAT(SDNode *N); 611 SDValue ScalarizeVecRes_EXTRACT_SUBVECTOR(SDNode *N); 612 SDValue ScalarizeVecRes_FP_ROUND(SDNode *N); 613 SDValue ScalarizeVecRes_FPOWI(SDNode *N); 614 SDValue ScalarizeVecRes_INSERT_VECTOR_ELT(SDNode *N); 615 SDValue ScalarizeVecRes_LOAD(LoadSDNode *N); 616 SDValue ScalarizeVecRes_SCALAR_TO_VECTOR(SDNode *N); 617 SDValue ScalarizeVecRes_VSELECT(SDNode *N); 618 SDValue ScalarizeVecRes_SELECT(SDNode *N); 619 SDValue ScalarizeVecRes_SELECT_CC(SDNode *N); 620 SDValue ScalarizeVecRes_SETCC(SDNode *N); 621 SDValue ScalarizeVecRes_UNDEF(SDNode *N); 622 SDValue ScalarizeVecRes_VECTOR_SHUFFLE(SDNode *N); 623 SDValue ScalarizeVecRes_VSETCC(SDNode *N); 624 625 // Vector Operand Scalarization: <1 x ty> -> ty. 626 bool ScalarizeVectorOperand(SDNode *N, unsigned OpNo); 627 SDValue ScalarizeVecOp_BITCAST(SDNode *N); 628 SDValue ScalarizeVecOp_UnaryOp(SDNode *N); 629 SDValue ScalarizeVecOp_CONCAT_VECTORS(SDNode *N); 630 SDValue ScalarizeVecOp_EXTRACT_VECTOR_ELT(SDNode *N); 631 SDValue ScalarizeVecOp_VSELECT(SDNode *N); 632 SDValue ScalarizeVecOp_STORE(StoreSDNode *N, unsigned OpNo); 633 SDValue ScalarizeVecOp_FP_ROUND(SDNode *N, unsigned OpNo); 634 635 //===--------------------------------------------------------------------===// 636 // Vector Splitting Support: LegalizeVectorTypes.cpp 637 //===--------------------------------------------------------------------===// 638 639 /// GetSplitVector - Given a processed vector Op which was split into vectors 640 /// of half the size, this method returns the halves. The first elements of 641 /// Op coincide with the elements of Lo; the remaining elements of Op coincide 642 /// with the elements of Hi: Op is what you would get by concatenating Lo and 643 /// Hi. For example, if Op is a v8i32 that was split into two v4i32's, then 644 /// this method returns the two v4i32's, with Lo corresponding to the first 4 645 /// elements of Op, and Hi to the last 4 elements. 646 void GetSplitVector(SDValue Op, SDValue &Lo, SDValue &Hi); 647 void SetSplitVector(SDValue Op, SDValue Lo, SDValue Hi); 648 649 // Vector Result Splitting: <128 x ty> -> 2 x <64 x ty>. 650 void SplitVectorResult(SDNode *N, unsigned OpNo); 651 void SplitVecRes_BinOp(SDNode *N, SDValue &Lo, SDValue &Hi); 652 void SplitVecRes_TernaryOp(SDNode *N, SDValue &Lo, SDValue &Hi); 653 void SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo, SDValue &Hi); 654 void SplitVecRes_ExtendOp(SDNode *N, SDValue &Lo, SDValue &Hi); 655 void SplitVecRes_InregOp(SDNode *N, SDValue &Lo, SDValue &Hi); 656 657 void SplitVecRes_BITCAST(SDNode *N, SDValue &Lo, SDValue &Hi); 658 void SplitVecRes_BUILD_VECTOR(SDNode *N, SDValue &Lo, SDValue &Hi); 659 void SplitVecRes_CONCAT_VECTORS(SDNode *N, SDValue &Lo, SDValue &Hi); 660 void SplitVecRes_EXTRACT_SUBVECTOR(SDNode *N, SDValue &Lo, SDValue &Hi); 661 void SplitVecRes_INSERT_SUBVECTOR(SDNode *N, SDValue &Lo, SDValue &Hi); 662 void SplitVecRes_FPOWI(SDNode *N, SDValue &Lo, SDValue &Hi); 663 void SplitVecRes_FCOPYSIGN(SDNode *N, SDValue &Lo, SDValue &Hi); 664 void SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo, SDValue &Hi); 665 void SplitVecRes_LOAD(LoadSDNode *N, SDValue &Lo, SDValue &Hi); 666 void SplitVecRes_MLOAD(MaskedLoadSDNode *N, SDValue &Lo, SDValue &Hi); 667 void SplitVecRes_MGATHER(MaskedGatherSDNode *N, SDValue &Lo, SDValue &Hi); 668 void SplitVecRes_SCALAR_TO_VECTOR(SDNode *N, SDValue &Lo, SDValue &Hi); 669 void SplitVecRes_SETCC(SDNode *N, SDValue &Lo, SDValue &Hi); 670 void SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N, SDValue &Lo, 671 SDValue &Hi); 672 673 // Vector Operand Splitting: <128 x ty> -> 2 x <64 x ty>. 674 bool SplitVectorOperand(SDNode *N, unsigned OpNo); 675 SDValue SplitVecOp_VSELECT(SDNode *N, unsigned OpNo); 676 SDValue SplitVecOp_UnaryOp(SDNode *N); 677 SDValue SplitVecOp_TruncateHelper(SDNode *N); 678 679 SDValue SplitVecOp_BITCAST(SDNode *N); 680 SDValue SplitVecOp_EXTRACT_SUBVECTOR(SDNode *N); 681 SDValue SplitVecOp_EXTRACT_VECTOR_ELT(SDNode *N); 682 SDValue SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo); 683 SDValue SplitVecOp_MSTORE(MaskedStoreSDNode *N, unsigned OpNo); 684 SDValue SplitVecOp_MSCATTER(MaskedScatterSDNode *N, unsigned OpNo); 685 SDValue SplitVecOp_MGATHER(MaskedGatherSDNode *N, unsigned OpNo); 686 SDValue SplitVecOp_CONCAT_VECTORS(SDNode *N); 687 SDValue SplitVecOp_VSETCC(SDNode *N); 688 SDValue SplitVecOp_FP_ROUND(SDNode *N); 689 SDValue SplitVecOp_FCOPYSIGN(SDNode *N); 690 691 //===--------------------------------------------------------------------===// 692 // Vector Widening Support: LegalizeVectorTypes.cpp 693 //===--------------------------------------------------------------------===// 694 695 /// GetWidenedVector - Given a processed vector Op which was widened into a 696 /// larger vector, this method returns the larger vector. The elements of 697 /// the returned vector consist of the elements of Op followed by elements 698 /// containing rubbish. For example, if Op is a v2i32 that was widened to a 699 /// v4i32, then this method returns a v4i32 for which the first two elements 700 /// are the same as those of Op, while the last two elements contain rubbish. GetWidenedVector(SDValue Op)701 SDValue GetWidenedVector(SDValue Op) { 702 SDValue &WidenedOp = WidenedVectors[Op]; 703 RemapValue(WidenedOp); 704 assert(WidenedOp.getNode() && "Operand wasn't widened?"); 705 return WidenedOp; 706 } 707 void SetWidenedVector(SDValue Op, SDValue Result); 708 709 // Widen Vector Result Promotion. 710 void WidenVectorResult(SDNode *N, unsigned ResNo); 711 SDValue WidenVecRes_MERGE_VALUES(SDNode* N, unsigned ResNo); 712 SDValue WidenVecRes_BITCAST(SDNode* N); 713 SDValue WidenVecRes_BUILD_VECTOR(SDNode* N); 714 SDValue WidenVecRes_CONCAT_VECTORS(SDNode* N); 715 SDValue WidenVecRes_CONVERT_RNDSAT(SDNode* N); 716 SDValue WidenVecRes_EXTRACT_SUBVECTOR(SDNode* N); 717 SDValue WidenVecRes_INSERT_VECTOR_ELT(SDNode* N); 718 SDValue WidenVecRes_LOAD(SDNode* N); 719 SDValue WidenVecRes_MLOAD(MaskedLoadSDNode* N); 720 SDValue WidenVecRes_MGATHER(MaskedGatherSDNode* N); 721 SDValue WidenVecRes_SCALAR_TO_VECTOR(SDNode* N); 722 SDValue WidenVecRes_SELECT(SDNode* N); 723 SDValue WidenVecRes_SELECT_CC(SDNode* N); 724 SDValue WidenVecRes_SETCC(SDNode* N); 725 SDValue WidenVecRes_UNDEF(SDNode *N); 726 SDValue WidenVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N); 727 SDValue WidenVecRes_VSETCC(SDNode* N); 728 729 SDValue WidenVecRes_Ternary(SDNode *N); 730 SDValue WidenVecRes_Binary(SDNode *N); 731 SDValue WidenVecRes_BinaryCanTrap(SDNode *N); 732 SDValue WidenVecRes_Convert(SDNode *N); 733 SDValue WidenVecRes_FCOPYSIGN(SDNode *N); 734 SDValue WidenVecRes_POWI(SDNode *N); 735 SDValue WidenVecRes_Shift(SDNode *N); 736 SDValue WidenVecRes_Unary(SDNode *N); 737 SDValue WidenVecRes_InregOp(SDNode *N); 738 739 // Widen Vector Operand. 740 bool WidenVectorOperand(SDNode *N, unsigned OpNo); 741 SDValue WidenVecOp_BITCAST(SDNode *N); 742 SDValue WidenVecOp_CONCAT_VECTORS(SDNode *N); 743 SDValue WidenVecOp_EXTEND(SDNode *N); 744 SDValue WidenVecOp_EXTRACT_VECTOR_ELT(SDNode *N); 745 SDValue WidenVecOp_EXTRACT_SUBVECTOR(SDNode *N); 746 SDValue WidenVecOp_STORE(SDNode* N); 747 SDValue WidenVecOp_MSTORE(SDNode* N, unsigned OpNo); 748 SDValue WidenVecOp_MSCATTER(SDNode* N, unsigned OpNo); 749 SDValue WidenVecOp_SETCC(SDNode* N); 750 751 SDValue WidenVecOp_Convert(SDNode *N); 752 SDValue WidenVecOp_FCOPYSIGN(SDNode *N); 753 754 //===--------------------------------------------------------------------===// 755 // Vector Widening Utilities Support: LegalizeVectorTypes.cpp 756 //===--------------------------------------------------------------------===// 757 758 /// Helper GenWidenVectorLoads - Helper function to generate a set of 759 /// loads to load a vector with a resulting wider type. It takes 760 /// LdChain: list of chains for the load to be generated. 761 /// Ld: load to widen 762 SDValue GenWidenVectorLoads(SmallVectorImpl<SDValue> &LdChain, 763 LoadSDNode *LD); 764 765 /// GenWidenVectorExtLoads - Helper function to generate a set of extension 766 /// loads to load a ector with a resulting wider type. It takes 767 /// LdChain: list of chains for the load to be generated. 768 /// Ld: load to widen 769 /// ExtType: extension element type 770 SDValue GenWidenVectorExtLoads(SmallVectorImpl<SDValue> &LdChain, 771 LoadSDNode *LD, ISD::LoadExtType ExtType); 772 773 /// Helper genWidenVectorStores - Helper function to generate a set of 774 /// stores to store a widen vector into non-widen memory 775 /// StChain: list of chains for the stores we have generated 776 /// ST: store of a widen value 777 void GenWidenVectorStores(SmallVectorImpl<SDValue> &StChain, StoreSDNode *ST); 778 779 /// Helper genWidenVectorTruncStores - Helper function to generate a set of 780 /// stores to store a truncate widen vector into non-widen memory 781 /// StChain: list of chains for the stores we have generated 782 /// ST: store of a widen value 783 void GenWidenVectorTruncStores(SmallVectorImpl<SDValue> &StChain, 784 StoreSDNode *ST); 785 786 /// Modifies a vector input (widen or narrows) to a vector of NVT. The 787 /// input vector must have the same element type as NVT. 788 /// When FillWithZeroes is "on" the vector will be widened with 789 /// zeroes. 790 /// By default, the vector will be widened with undefined values. 791 SDValue ModifyToType(SDValue InOp, EVT NVT, bool FillWithZeroes = false); 792 793 //===--------------------------------------------------------------------===// 794 // Generic Splitting: LegalizeTypesGeneric.cpp 795 //===--------------------------------------------------------------------===// 796 797 // Legalization methods which only use that the illegal type is split into two 798 // not necessarily identical types. As such they can be used for splitting 799 // vectors and expanding integers and floats. 800 GetSplitOp(SDValue Op,SDValue & Lo,SDValue & Hi)801 void GetSplitOp(SDValue Op, SDValue &Lo, SDValue &Hi) { 802 if (Op.getValueType().isVector()) 803 GetSplitVector(Op, Lo, Hi); 804 else if (Op.getValueType().isInteger()) 805 GetExpandedInteger(Op, Lo, Hi); 806 else 807 GetExpandedFloat(Op, Lo, Hi); 808 } 809 810 /// GetPairElements - Use ISD::EXTRACT_ELEMENT nodes to extract the low and 811 /// high parts of the given value. 812 void GetPairElements(SDValue Pair, SDValue &Lo, SDValue &Hi); 813 814 // Generic Result Splitting. 815 void SplitRes_MERGE_VALUES(SDNode *N, unsigned ResNo, 816 SDValue &Lo, SDValue &Hi); 817 void SplitRes_SELECT (SDNode *N, SDValue &Lo, SDValue &Hi); 818 void SplitRes_SELECT_CC (SDNode *N, SDValue &Lo, SDValue &Hi); 819 void SplitRes_UNDEF (SDNode *N, SDValue &Lo, SDValue &Hi); 820 821 //===--------------------------------------------------------------------===// 822 // Generic Expansion: LegalizeTypesGeneric.cpp 823 //===--------------------------------------------------------------------===// 824 825 // Legalization methods which only use that the illegal type is split into two 826 // identical types of half the size, and that the Lo/Hi part is stored first 827 // in memory on little/big-endian machines, followed by the Hi/Lo part. As 828 // such they can be used for expanding integers and floats. 829 GetExpandedOp(SDValue Op,SDValue & Lo,SDValue & Hi)830 void GetExpandedOp(SDValue Op, SDValue &Lo, SDValue &Hi) { 831 if (Op.getValueType().isInteger()) 832 GetExpandedInteger(Op, Lo, Hi); 833 else 834 GetExpandedFloat(Op, Lo, Hi); 835 } 836 837 838 /// This function will split the integer \p Op into \p NumElements 839 /// operations of type \p EltVT and store them in \p Ops. 840 void IntegerToVector(SDValue Op, unsigned NumElements, 841 SmallVectorImpl<SDValue> &Ops, EVT EltVT); 842 843 // Generic Result Expansion. 844 void ExpandRes_MERGE_VALUES (SDNode *N, unsigned ResNo, 845 SDValue &Lo, SDValue &Hi); 846 void ExpandRes_BITCAST (SDNode *N, SDValue &Lo, SDValue &Hi); 847 void ExpandRes_BUILD_PAIR (SDNode *N, SDValue &Lo, SDValue &Hi); 848 void ExpandRes_EXTRACT_ELEMENT (SDNode *N, SDValue &Lo, SDValue &Hi); 849 void ExpandRes_EXTRACT_VECTOR_ELT(SDNode *N, SDValue &Lo, SDValue &Hi); 850 void ExpandRes_NormalLoad (SDNode *N, SDValue &Lo, SDValue &Hi); 851 void ExpandRes_VAARG (SDNode *N, SDValue &Lo, SDValue &Hi); 852 853 // Generic Operand Expansion. 854 SDValue ExpandOp_BITCAST (SDNode *N); 855 SDValue ExpandOp_BUILD_VECTOR (SDNode *N); 856 SDValue ExpandOp_EXTRACT_ELEMENT (SDNode *N); 857 SDValue ExpandOp_INSERT_VECTOR_ELT(SDNode *N); 858 SDValue ExpandOp_SCALAR_TO_VECTOR (SDNode *N); 859 SDValue ExpandOp_NormalStore (SDNode *N, unsigned OpNo); 860 }; 861 862 } // end namespace llvm. 863 864 #endif 865