1 //===-------- LegalizeFloatTypes.cpp - Legalization of float types --------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements float type expansion and softening for LegalizeTypes.
11 // Softening is the act of turning a computation in an illegal floating point
12 // type into a computation in an integer type of the same size; also known as
13 // "soft float". For example, turning f32 arithmetic into operations using i32.
14 // The resulting integer value is the same as what you would get by performing
15 // the floating point operation and bitcasting the result to the integer type.
16 // Expansion is the act of changing a computation in an illegal type to be a
17 // computation in two identical registers of a smaller type. For example,
18 // implementing ppcf128 arithmetic in two f64 registers.
19 //
20 //===----------------------------------------------------------------------===//
21
22 #include "LegalizeTypes.h"
23 #include "llvm/Support/ErrorHandling.h"
24 #include "llvm/Support/raw_ostream.h"
25 using namespace llvm;
26
27 #define DEBUG_TYPE "legalize-types"
28
29 /// GetFPLibCall - Return the right libcall for the given floating point type.
GetFPLibCall(EVT VT,RTLIB::Libcall Call_F32,RTLIB::Libcall Call_F64,RTLIB::Libcall Call_F80,RTLIB::Libcall Call_F128,RTLIB::Libcall Call_PPCF128)30 static RTLIB::Libcall GetFPLibCall(EVT VT,
31 RTLIB::Libcall Call_F32,
32 RTLIB::Libcall Call_F64,
33 RTLIB::Libcall Call_F80,
34 RTLIB::Libcall Call_F128,
35 RTLIB::Libcall Call_PPCF128) {
36 return
37 VT == MVT::f32 ? Call_F32 :
38 VT == MVT::f64 ? Call_F64 :
39 VT == MVT::f80 ? Call_F80 :
40 VT == MVT::f128 ? Call_F128 :
41 VT == MVT::ppcf128 ? Call_PPCF128 :
42 RTLIB::UNKNOWN_LIBCALL;
43 }
44
45 //===----------------------------------------------------------------------===//
46 // Convert Float Results to Integer for Non-HW-supported Operations.
47 //===----------------------------------------------------------------------===//
48
SoftenFloatResult(SDNode * N,unsigned ResNo)49 bool DAGTypeLegalizer::SoftenFloatResult(SDNode *N, unsigned ResNo) {
50 DEBUG(dbgs() << "Soften float result " << ResNo << ": "; N->dump(&DAG);
51 dbgs() << "\n");
52 SDValue R = SDValue();
53
54 switch (N->getOpcode()) {
55 default:
56 #ifndef NDEBUG
57 dbgs() << "SoftenFloatResult #" << ResNo << ": ";
58 N->dump(&DAG); dbgs() << "\n";
59 #endif
60 llvm_unreachable("Do not know how to soften the result of this operator!");
61
62 case ISD::Register:
63 case ISD::CopyFromReg:
64 case ISD::CopyToReg:
65 assert(isLegalInHWReg(N->getValueType(ResNo)) &&
66 "Unsupported SoftenFloatRes opcode!");
67 // Only when isLegalInHWReg, we can skip check of the operands.
68 R = SDValue(N, ResNo);
69 break;
70 case ISD::MERGE_VALUES:R = SoftenFloatRes_MERGE_VALUES(N, ResNo); break;
71 case ISD::BITCAST: R = SoftenFloatRes_BITCAST(N, ResNo); break;
72 case ISD::BUILD_PAIR: R = SoftenFloatRes_BUILD_PAIR(N); break;
73 case ISD::ConstantFP: R = SoftenFloatRes_ConstantFP(N, ResNo); break;
74 case ISD::EXTRACT_VECTOR_ELT:
75 R = SoftenFloatRes_EXTRACT_VECTOR_ELT(N); break;
76 case ISD::FABS: R = SoftenFloatRes_FABS(N, ResNo); break;
77 case ISD::FMINNUM: R = SoftenFloatRes_FMINNUM(N); break;
78 case ISD::FMAXNUM: R = SoftenFloatRes_FMAXNUM(N); break;
79 case ISD::FADD: R = SoftenFloatRes_FADD(N); break;
80 case ISD::FCEIL: R = SoftenFloatRes_FCEIL(N); break;
81 case ISD::FCOPYSIGN: R = SoftenFloatRes_FCOPYSIGN(N, ResNo); break;
82 case ISD::FCOS: R = SoftenFloatRes_FCOS(N); break;
83 case ISD::FDIV: R = SoftenFloatRes_FDIV(N); break;
84 case ISD::FEXP: R = SoftenFloatRes_FEXP(N); break;
85 case ISD::FEXP2: R = SoftenFloatRes_FEXP2(N); break;
86 case ISD::FFLOOR: R = SoftenFloatRes_FFLOOR(N); break;
87 case ISD::FLOG: R = SoftenFloatRes_FLOG(N); break;
88 case ISD::FLOG2: R = SoftenFloatRes_FLOG2(N); break;
89 case ISD::FLOG10: R = SoftenFloatRes_FLOG10(N); break;
90 case ISD::FMA: R = SoftenFloatRes_FMA(N); break;
91 case ISD::FMUL: R = SoftenFloatRes_FMUL(N); break;
92 case ISD::FNEARBYINT: R = SoftenFloatRes_FNEARBYINT(N); break;
93 case ISD::FNEG: R = SoftenFloatRes_FNEG(N, ResNo); break;
94 case ISD::FP_EXTEND: R = SoftenFloatRes_FP_EXTEND(N); break;
95 case ISD::FP_ROUND: R = SoftenFloatRes_FP_ROUND(N); break;
96 case ISD::FP16_TO_FP: R = SoftenFloatRes_FP16_TO_FP(N); break;
97 case ISD::FPOW: R = SoftenFloatRes_FPOW(N); break;
98 case ISD::FPOWI: R = SoftenFloatRes_FPOWI(N); break;
99 case ISD::FREM: R = SoftenFloatRes_FREM(N); break;
100 case ISD::FRINT: R = SoftenFloatRes_FRINT(N); break;
101 case ISD::FROUND: R = SoftenFloatRes_FROUND(N); break;
102 case ISD::FSIN: R = SoftenFloatRes_FSIN(N); break;
103 case ISD::FSQRT: R = SoftenFloatRes_FSQRT(N); break;
104 case ISD::FSUB: R = SoftenFloatRes_FSUB(N); break;
105 case ISD::FTRUNC: R = SoftenFloatRes_FTRUNC(N); break;
106 case ISD::LOAD: R = SoftenFloatRes_LOAD(N, ResNo); break;
107 case ISD::SELECT: R = SoftenFloatRes_SELECT(N, ResNo); break;
108 case ISD::SELECT_CC: R = SoftenFloatRes_SELECT_CC(N, ResNo); break;
109 case ISD::SINT_TO_FP:
110 case ISD::UINT_TO_FP: R = SoftenFloatRes_XINT_TO_FP(N); break;
111 case ISD::UNDEF: R = SoftenFloatRes_UNDEF(N); break;
112 case ISD::VAARG: R = SoftenFloatRes_VAARG(N); break;
113 }
114
115 // If R is null, the sub-method took care of registering the result.
116 if (R.getNode()) {
117 SetSoftenedFloat(SDValue(N, ResNo), R);
118 ReplaceSoftenFloatResult(N, ResNo, R);
119 }
120 // Return true only if the node is changed,
121 // assuming that the operands are also converted when necessary.
122 // Otherwise, return false to tell caller to scan operands.
123 return R.getNode() && R.getNode() != N;
124 }
125
SoftenFloatRes_BITCAST(SDNode * N,unsigned ResNo)126 SDValue DAGTypeLegalizer::SoftenFloatRes_BITCAST(SDNode *N, unsigned ResNo) {
127 if (isLegalInHWReg(N->getValueType(ResNo)))
128 return SDValue(N, ResNo);
129 return BitConvertToInteger(N->getOperand(0));
130 }
131
SoftenFloatRes_MERGE_VALUES(SDNode * N,unsigned ResNo)132 SDValue DAGTypeLegalizer::SoftenFloatRes_MERGE_VALUES(SDNode *N,
133 unsigned ResNo) {
134 SDValue Op = DisintegrateMERGE_VALUES(N, ResNo);
135 return BitConvertToInteger(Op);
136 }
137
SoftenFloatRes_BUILD_PAIR(SDNode * N)138 SDValue DAGTypeLegalizer::SoftenFloatRes_BUILD_PAIR(SDNode *N) {
139 // Convert the inputs to integers, and build a new pair out of them.
140 return DAG.getNode(ISD::BUILD_PAIR, SDLoc(N),
141 TLI.getTypeToTransformTo(*DAG.getContext(),
142 N->getValueType(0)),
143 BitConvertToInteger(N->getOperand(0)),
144 BitConvertToInteger(N->getOperand(1)));
145 }
146
SoftenFloatRes_ConstantFP(SDNode * N,unsigned ResNo)147 SDValue DAGTypeLegalizer::SoftenFloatRes_ConstantFP(SDNode *N, unsigned ResNo) {
148 // When LegalInHWReg, we can load better from the constant pool.
149 if (isLegalInHWReg(N->getValueType(ResNo)))
150 return SDValue(N, ResNo);
151 ConstantFPSDNode *CN = cast<ConstantFPSDNode>(N);
152 return DAG.getConstant(CN->getValueAPF().bitcastToAPInt(), SDLoc(CN),
153 TLI.getTypeToTransformTo(*DAG.getContext(),
154 CN->getValueType(0)));
155 }
156
SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode * N)157 SDValue DAGTypeLegalizer::SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N) {
158 SDValue NewOp = BitConvertVectorToIntegerVector(N->getOperand(0));
159 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(N),
160 NewOp.getValueType().getVectorElementType(),
161 NewOp, N->getOperand(1));
162 }
163
SoftenFloatRes_FABS(SDNode * N,unsigned ResNo)164 SDValue DAGTypeLegalizer::SoftenFloatRes_FABS(SDNode *N, unsigned ResNo) {
165 // When LegalInHWReg, FABS can be implemented as native bitwise operations.
166 if (isLegalInHWReg(N->getValueType(ResNo)))
167 return SDValue(N, ResNo);
168 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
169 unsigned Size = NVT.getSizeInBits();
170
171 // Mask = ~(1 << (Size-1))
172 APInt API = APInt::getAllOnesValue(Size);
173 API.clearBit(Size - 1);
174 SDValue Mask = DAG.getConstant(API, SDLoc(N), NVT);
175 SDValue Op = GetSoftenedFloat(N->getOperand(0));
176 return DAG.getNode(ISD::AND, SDLoc(N), NVT, Op, Mask);
177 }
178
SoftenFloatRes_FMINNUM(SDNode * N)179 SDValue DAGTypeLegalizer::SoftenFloatRes_FMINNUM(SDNode *N) {
180 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
181 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
182 GetSoftenedFloat(N->getOperand(1)) };
183 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
184 RTLIB::FMIN_F32,
185 RTLIB::FMIN_F64,
186 RTLIB::FMIN_F80,
187 RTLIB::FMIN_F128,
188 RTLIB::FMIN_PPCF128),
189 NVT, Ops, false, SDLoc(N)).first;
190 }
191
SoftenFloatRes_FMAXNUM(SDNode * N)192 SDValue DAGTypeLegalizer::SoftenFloatRes_FMAXNUM(SDNode *N) {
193 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
194 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
195 GetSoftenedFloat(N->getOperand(1)) };
196 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
197 RTLIB::FMAX_F32,
198 RTLIB::FMAX_F64,
199 RTLIB::FMAX_F80,
200 RTLIB::FMAX_F128,
201 RTLIB::FMAX_PPCF128),
202 NVT, Ops, false, SDLoc(N)).first;
203 }
204
SoftenFloatRes_FADD(SDNode * N)205 SDValue DAGTypeLegalizer::SoftenFloatRes_FADD(SDNode *N) {
206 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
207 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
208 GetSoftenedFloat(N->getOperand(1)) };
209 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
210 RTLIB::ADD_F32,
211 RTLIB::ADD_F64,
212 RTLIB::ADD_F80,
213 RTLIB::ADD_F128,
214 RTLIB::ADD_PPCF128),
215 NVT, Ops, false, SDLoc(N)).first;
216 }
217
SoftenFloatRes_FCEIL(SDNode * N)218 SDValue DAGTypeLegalizer::SoftenFloatRes_FCEIL(SDNode *N) {
219 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
220 SDValue Op = GetSoftenedFloat(N->getOperand(0));
221 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
222 RTLIB::CEIL_F32,
223 RTLIB::CEIL_F64,
224 RTLIB::CEIL_F80,
225 RTLIB::CEIL_F128,
226 RTLIB::CEIL_PPCF128),
227 NVT, Op, false, SDLoc(N)).first;
228 }
229
SoftenFloatRes_FCOPYSIGN(SDNode * N,unsigned ResNo)230 SDValue DAGTypeLegalizer::SoftenFloatRes_FCOPYSIGN(SDNode *N, unsigned ResNo) {
231 // When LegalInHWReg, FCOPYSIGN can be implemented as native bitwise operations.
232 if (isLegalInHWReg(N->getValueType(ResNo)))
233 return SDValue(N, ResNo);
234 SDValue LHS = GetSoftenedFloat(N->getOperand(0));
235 SDValue RHS = BitConvertToInteger(N->getOperand(1));
236 SDLoc dl(N);
237
238 EVT LVT = LHS.getValueType();
239 EVT RVT = RHS.getValueType();
240
241 unsigned LSize = LVT.getSizeInBits();
242 unsigned RSize = RVT.getSizeInBits();
243
244 // First get the sign bit of second operand.
245 SDValue SignBit = DAG.getNode(
246 ISD::SHL, dl, RVT, DAG.getConstant(1, dl, RVT),
247 DAG.getConstant(RSize - 1, dl,
248 TLI.getShiftAmountTy(RVT, DAG.getDataLayout())));
249 SignBit = DAG.getNode(ISD::AND, dl, RVT, RHS, SignBit);
250
251 // Shift right or sign-extend it if the two operands have different types.
252 int SizeDiff = RVT.getSizeInBits() - LVT.getSizeInBits();
253 if (SizeDiff > 0) {
254 SignBit =
255 DAG.getNode(ISD::SRL, dl, RVT, SignBit,
256 DAG.getConstant(SizeDiff, dl,
257 TLI.getShiftAmountTy(SignBit.getValueType(),
258 DAG.getDataLayout())));
259 SignBit = DAG.getNode(ISD::TRUNCATE, dl, LVT, SignBit);
260 } else if (SizeDiff < 0) {
261 SignBit = DAG.getNode(ISD::ANY_EXTEND, dl, LVT, SignBit);
262 SignBit =
263 DAG.getNode(ISD::SHL, dl, LVT, SignBit,
264 DAG.getConstant(-SizeDiff, dl,
265 TLI.getShiftAmountTy(SignBit.getValueType(),
266 DAG.getDataLayout())));
267 }
268
269 // Clear the sign bit of the first operand.
270 SDValue Mask = DAG.getNode(
271 ISD::SHL, dl, LVT, DAG.getConstant(1, dl, LVT),
272 DAG.getConstant(LSize - 1, dl,
273 TLI.getShiftAmountTy(LVT, DAG.getDataLayout())));
274 Mask = DAG.getNode(ISD::SUB, dl, LVT, Mask, DAG.getConstant(1, dl, LVT));
275 LHS = DAG.getNode(ISD::AND, dl, LVT, LHS, Mask);
276
277 // Or the value with the sign bit.
278 return DAG.getNode(ISD::OR, dl, LVT, LHS, SignBit);
279 }
280
SoftenFloatRes_FCOS(SDNode * N)281 SDValue DAGTypeLegalizer::SoftenFloatRes_FCOS(SDNode *N) {
282 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
283 SDValue Op = GetSoftenedFloat(N->getOperand(0));
284 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
285 RTLIB::COS_F32,
286 RTLIB::COS_F64,
287 RTLIB::COS_F80,
288 RTLIB::COS_F128,
289 RTLIB::COS_PPCF128),
290 NVT, Op, false, SDLoc(N)).first;
291 }
292
SoftenFloatRes_FDIV(SDNode * N)293 SDValue DAGTypeLegalizer::SoftenFloatRes_FDIV(SDNode *N) {
294 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
295 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
296 GetSoftenedFloat(N->getOperand(1)) };
297 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
298 RTLIB::DIV_F32,
299 RTLIB::DIV_F64,
300 RTLIB::DIV_F80,
301 RTLIB::DIV_F128,
302 RTLIB::DIV_PPCF128),
303 NVT, Ops, false, SDLoc(N)).first;
304 }
305
SoftenFloatRes_FEXP(SDNode * N)306 SDValue DAGTypeLegalizer::SoftenFloatRes_FEXP(SDNode *N) {
307 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
308 SDValue Op = GetSoftenedFloat(N->getOperand(0));
309 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
310 RTLIB::EXP_F32,
311 RTLIB::EXP_F64,
312 RTLIB::EXP_F80,
313 RTLIB::EXP_F128,
314 RTLIB::EXP_PPCF128),
315 NVT, Op, false, SDLoc(N)).first;
316 }
317
SoftenFloatRes_FEXP2(SDNode * N)318 SDValue DAGTypeLegalizer::SoftenFloatRes_FEXP2(SDNode *N) {
319 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
320 SDValue Op = GetSoftenedFloat(N->getOperand(0));
321 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
322 RTLIB::EXP2_F32,
323 RTLIB::EXP2_F64,
324 RTLIB::EXP2_F80,
325 RTLIB::EXP2_F128,
326 RTLIB::EXP2_PPCF128),
327 NVT, Op, false, SDLoc(N)).first;
328 }
329
SoftenFloatRes_FFLOOR(SDNode * N)330 SDValue DAGTypeLegalizer::SoftenFloatRes_FFLOOR(SDNode *N) {
331 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
332 SDValue Op = GetSoftenedFloat(N->getOperand(0));
333 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
334 RTLIB::FLOOR_F32,
335 RTLIB::FLOOR_F64,
336 RTLIB::FLOOR_F80,
337 RTLIB::FLOOR_F128,
338 RTLIB::FLOOR_PPCF128),
339 NVT, Op, false, SDLoc(N)).first;
340 }
341
SoftenFloatRes_FLOG(SDNode * N)342 SDValue DAGTypeLegalizer::SoftenFloatRes_FLOG(SDNode *N) {
343 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
344 SDValue Op = GetSoftenedFloat(N->getOperand(0));
345 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
346 RTLIB::LOG_F32,
347 RTLIB::LOG_F64,
348 RTLIB::LOG_F80,
349 RTLIB::LOG_F128,
350 RTLIB::LOG_PPCF128),
351 NVT, Op, false, SDLoc(N)).first;
352 }
353
SoftenFloatRes_FLOG2(SDNode * N)354 SDValue DAGTypeLegalizer::SoftenFloatRes_FLOG2(SDNode *N) {
355 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
356 SDValue Op = GetSoftenedFloat(N->getOperand(0));
357 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
358 RTLIB::LOG2_F32,
359 RTLIB::LOG2_F64,
360 RTLIB::LOG2_F80,
361 RTLIB::LOG2_F128,
362 RTLIB::LOG2_PPCF128),
363 NVT, Op, false, SDLoc(N)).first;
364 }
365
SoftenFloatRes_FLOG10(SDNode * N)366 SDValue DAGTypeLegalizer::SoftenFloatRes_FLOG10(SDNode *N) {
367 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
368 SDValue Op = GetSoftenedFloat(N->getOperand(0));
369 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
370 RTLIB::LOG10_F32,
371 RTLIB::LOG10_F64,
372 RTLIB::LOG10_F80,
373 RTLIB::LOG10_F128,
374 RTLIB::LOG10_PPCF128),
375 NVT, Op, false, SDLoc(N)).first;
376 }
377
SoftenFloatRes_FMA(SDNode * N)378 SDValue DAGTypeLegalizer::SoftenFloatRes_FMA(SDNode *N) {
379 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
380 SDValue Ops[3] = { GetSoftenedFloat(N->getOperand(0)),
381 GetSoftenedFloat(N->getOperand(1)),
382 GetSoftenedFloat(N->getOperand(2)) };
383 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
384 RTLIB::FMA_F32,
385 RTLIB::FMA_F64,
386 RTLIB::FMA_F80,
387 RTLIB::FMA_F128,
388 RTLIB::FMA_PPCF128),
389 NVT, Ops, false, SDLoc(N)).first;
390 }
391
SoftenFloatRes_FMUL(SDNode * N)392 SDValue DAGTypeLegalizer::SoftenFloatRes_FMUL(SDNode *N) {
393 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
394 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
395 GetSoftenedFloat(N->getOperand(1)) };
396 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
397 RTLIB::MUL_F32,
398 RTLIB::MUL_F64,
399 RTLIB::MUL_F80,
400 RTLIB::MUL_F128,
401 RTLIB::MUL_PPCF128),
402 NVT, Ops, false, SDLoc(N)).first;
403 }
404
SoftenFloatRes_FNEARBYINT(SDNode * N)405 SDValue DAGTypeLegalizer::SoftenFloatRes_FNEARBYINT(SDNode *N) {
406 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
407 SDValue Op = GetSoftenedFloat(N->getOperand(0));
408 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
409 RTLIB::NEARBYINT_F32,
410 RTLIB::NEARBYINT_F64,
411 RTLIB::NEARBYINT_F80,
412 RTLIB::NEARBYINT_F128,
413 RTLIB::NEARBYINT_PPCF128),
414 NVT, Op, false, SDLoc(N)).first;
415 }
416
SoftenFloatRes_FNEG(SDNode * N,unsigned ResNo)417 SDValue DAGTypeLegalizer::SoftenFloatRes_FNEG(SDNode *N, unsigned ResNo) {
418 // When LegalInHWReg, FNEG can be implemented as native bitwise operations.
419 if (isLegalInHWReg(N->getValueType(ResNo)))
420 return SDValue(N, ResNo);
421 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
422 SDLoc dl(N);
423 // Expand Y = FNEG(X) -> Y = SUB -0.0, X
424 SDValue Ops[2] = { DAG.getConstantFP(-0.0, dl, N->getValueType(0)),
425 GetSoftenedFloat(N->getOperand(0)) };
426 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
427 RTLIB::SUB_F32,
428 RTLIB::SUB_F64,
429 RTLIB::SUB_F80,
430 RTLIB::SUB_F128,
431 RTLIB::SUB_PPCF128),
432 NVT, Ops, false, dl).first;
433 }
434
SoftenFloatRes_FP_EXTEND(SDNode * N)435 SDValue DAGTypeLegalizer::SoftenFloatRes_FP_EXTEND(SDNode *N) {
436 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
437 SDValue Op = N->getOperand(0);
438
439 // There's only a libcall for f16 -> f32, so proceed in two stages. Also, it's
440 // entirely possible for both f16 and f32 to be legal, so use the fully
441 // hard-float FP_EXTEND rather than FP16_TO_FP.
442 if (Op.getValueType() == MVT::f16 && N->getValueType(0) != MVT::f32) {
443 Op = DAG.getNode(ISD::FP_EXTEND, SDLoc(N), MVT::f32, Op);
444 if (getTypeAction(MVT::f32) == TargetLowering::TypeSoftenFloat)
445 SoftenFloatResult(Op.getNode(), 0);
446 }
447
448 if (getTypeAction(Op.getValueType()) == TargetLowering::TypePromoteFloat) {
449 Op = GetPromotedFloat(Op);
450 // If the promotion did the FP_EXTEND to the destination type for us,
451 // there's nothing left to do here.
452 if (Op.getValueType() == N->getValueType(0)) {
453 return BitConvertToInteger(Op);
454 }
455 }
456
457 RTLIB::Libcall LC = RTLIB::getFPEXT(Op.getValueType(), N->getValueType(0));
458 if (getTypeAction(Op.getValueType()) == TargetLowering::TypeSoftenFloat)
459 Op = GetSoftenedFloat(Op);
460 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_EXTEND!");
461 return TLI.makeLibCall(DAG, LC, NVT, Op, false, SDLoc(N)).first;
462 }
463
464 // FIXME: Should we just use 'normal' FP_EXTEND / FP_TRUNC instead of special
465 // nodes?
SoftenFloatRes_FP16_TO_FP(SDNode * N)466 SDValue DAGTypeLegalizer::SoftenFloatRes_FP16_TO_FP(SDNode *N) {
467 EVT MidVT = TLI.getTypeToTransformTo(*DAG.getContext(), MVT::f32);
468 SDValue Op = N->getOperand(0);
469 SDValue Res32 = TLI.makeLibCall(DAG, RTLIB::FPEXT_F16_F32, MidVT, Op,
470 false, SDLoc(N)).first;
471 if (N->getValueType(0) == MVT::f32)
472 return Res32;
473
474 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
475 RTLIB::Libcall LC = RTLIB::getFPEXT(MVT::f32, N->getValueType(0));
476 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_EXTEND!");
477 return TLI.makeLibCall(DAG, LC, NVT, Res32, false, SDLoc(N)).first;
478 }
479
SoftenFloatRes_FP_ROUND(SDNode * N)480 SDValue DAGTypeLegalizer::SoftenFloatRes_FP_ROUND(SDNode *N) {
481 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
482 SDValue Op = N->getOperand(0);
483 if (N->getValueType(0) == MVT::f16) {
484 // Semi-soften first, to FP_TO_FP16, so that targets which support f16 as a
485 // storage-only type get a chance to select things.
486 return DAG.getNode(ISD::FP_TO_FP16, SDLoc(N), NVT, Op);
487 }
488
489 RTLIB::Libcall LC = RTLIB::getFPROUND(Op.getValueType(), N->getValueType(0));
490 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_ROUND!");
491 return TLI.makeLibCall(DAG, LC, NVT, Op, false, SDLoc(N)).first;
492 }
493
SoftenFloatRes_FPOW(SDNode * N)494 SDValue DAGTypeLegalizer::SoftenFloatRes_FPOW(SDNode *N) {
495 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
496 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
497 GetSoftenedFloat(N->getOperand(1)) };
498 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
499 RTLIB::POW_F32,
500 RTLIB::POW_F64,
501 RTLIB::POW_F80,
502 RTLIB::POW_F128,
503 RTLIB::POW_PPCF128),
504 NVT, Ops, false, SDLoc(N)).first;
505 }
506
SoftenFloatRes_FPOWI(SDNode * N)507 SDValue DAGTypeLegalizer::SoftenFloatRes_FPOWI(SDNode *N) {
508 assert(N->getOperand(1).getValueType() == MVT::i32 &&
509 "Unsupported power type!");
510 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
511 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)), N->getOperand(1) };
512 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
513 RTLIB::POWI_F32,
514 RTLIB::POWI_F64,
515 RTLIB::POWI_F80,
516 RTLIB::POWI_F128,
517 RTLIB::POWI_PPCF128),
518 NVT, Ops, false, SDLoc(N)).first;
519 }
520
SoftenFloatRes_FREM(SDNode * N)521 SDValue DAGTypeLegalizer::SoftenFloatRes_FREM(SDNode *N) {
522 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
523 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
524 GetSoftenedFloat(N->getOperand(1)) };
525 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
526 RTLIB::REM_F32,
527 RTLIB::REM_F64,
528 RTLIB::REM_F80,
529 RTLIB::REM_F128,
530 RTLIB::REM_PPCF128),
531 NVT, Ops, false, SDLoc(N)).first;
532 }
533
SoftenFloatRes_FRINT(SDNode * N)534 SDValue DAGTypeLegalizer::SoftenFloatRes_FRINT(SDNode *N) {
535 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
536 SDValue Op = GetSoftenedFloat(N->getOperand(0));
537 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
538 RTLIB::RINT_F32,
539 RTLIB::RINT_F64,
540 RTLIB::RINT_F80,
541 RTLIB::RINT_F128,
542 RTLIB::RINT_PPCF128),
543 NVT, Op, false, SDLoc(N)).first;
544 }
545
SoftenFloatRes_FROUND(SDNode * N)546 SDValue DAGTypeLegalizer::SoftenFloatRes_FROUND(SDNode *N) {
547 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
548 SDValue Op = GetSoftenedFloat(N->getOperand(0));
549 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
550 RTLIB::ROUND_F32,
551 RTLIB::ROUND_F64,
552 RTLIB::ROUND_F80,
553 RTLIB::ROUND_F128,
554 RTLIB::ROUND_PPCF128),
555 NVT, Op, false, SDLoc(N)).first;
556 }
557
SoftenFloatRes_FSIN(SDNode * N)558 SDValue DAGTypeLegalizer::SoftenFloatRes_FSIN(SDNode *N) {
559 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
560 SDValue Op = GetSoftenedFloat(N->getOperand(0));
561 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
562 RTLIB::SIN_F32,
563 RTLIB::SIN_F64,
564 RTLIB::SIN_F80,
565 RTLIB::SIN_F128,
566 RTLIB::SIN_PPCF128),
567 NVT, Op, false, SDLoc(N)).first;
568 }
569
SoftenFloatRes_FSQRT(SDNode * N)570 SDValue DAGTypeLegalizer::SoftenFloatRes_FSQRT(SDNode *N) {
571 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
572 SDValue Op = GetSoftenedFloat(N->getOperand(0));
573 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
574 RTLIB::SQRT_F32,
575 RTLIB::SQRT_F64,
576 RTLIB::SQRT_F80,
577 RTLIB::SQRT_F128,
578 RTLIB::SQRT_PPCF128),
579 NVT, Op, false, SDLoc(N)).first;
580 }
581
SoftenFloatRes_FSUB(SDNode * N)582 SDValue DAGTypeLegalizer::SoftenFloatRes_FSUB(SDNode *N) {
583 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
584 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
585 GetSoftenedFloat(N->getOperand(1)) };
586 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
587 RTLIB::SUB_F32,
588 RTLIB::SUB_F64,
589 RTLIB::SUB_F80,
590 RTLIB::SUB_F128,
591 RTLIB::SUB_PPCF128),
592 NVT, Ops, false, SDLoc(N)).first;
593 }
594
SoftenFloatRes_FTRUNC(SDNode * N)595 SDValue DAGTypeLegalizer::SoftenFloatRes_FTRUNC(SDNode *N) {
596 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
597 if (N->getValueType(0) == MVT::f16)
598 return DAG.getNode(ISD::FP_TO_FP16, SDLoc(N), NVT, N->getOperand(0));
599
600 SDValue Op = GetSoftenedFloat(N->getOperand(0));
601 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
602 RTLIB::TRUNC_F32,
603 RTLIB::TRUNC_F64,
604 RTLIB::TRUNC_F80,
605 RTLIB::TRUNC_F128,
606 RTLIB::TRUNC_PPCF128),
607 NVT, Op, false, SDLoc(N)).first;
608 }
609
SoftenFloatRes_LOAD(SDNode * N,unsigned ResNo)610 SDValue DAGTypeLegalizer::SoftenFloatRes_LOAD(SDNode *N, unsigned ResNo) {
611 bool LegalInHWReg = isLegalInHWReg(N->getValueType(ResNo));
612 LoadSDNode *L = cast<LoadSDNode>(N);
613 EVT VT = N->getValueType(0);
614 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
615 SDLoc dl(N);
616
617 SDValue NewL;
618 if (L->getExtensionType() == ISD::NON_EXTLOAD) {
619 NewL = DAG.getLoad(L->getAddressingMode(), L->getExtensionType(),
620 NVT, dl, L->getChain(), L->getBasePtr(), L->getOffset(),
621 L->getPointerInfo(), NVT, L->isVolatile(),
622 L->isNonTemporal(), false, L->getAlignment(),
623 L->getAAInfo());
624 // Legalized the chain result - switch anything that used the old chain to
625 // use the new one.
626 if (N != NewL.getValue(1).getNode())
627 ReplaceValueWith(SDValue(N, 1), NewL.getValue(1));
628 return NewL;
629 }
630
631 // Do a non-extending load followed by FP_EXTEND.
632 NewL = DAG.getLoad(L->getAddressingMode(), ISD::NON_EXTLOAD,
633 L->getMemoryVT(), dl, L->getChain(),
634 L->getBasePtr(), L->getOffset(), L->getPointerInfo(),
635 L->getMemoryVT(), L->isVolatile(),
636 L->isNonTemporal(), false, L->getAlignment(),
637 L->getAAInfo());
638 // Legalized the chain result - switch anything that used the old chain to
639 // use the new one.
640 ReplaceValueWith(SDValue(N, 1), NewL.getValue(1));
641 auto ExtendNode = DAG.getNode(ISD::FP_EXTEND, dl, VT, NewL);
642 if (LegalInHWReg)
643 return ExtendNode;
644 return BitConvertToInteger(ExtendNode);
645 }
646
SoftenFloatRes_SELECT(SDNode * N,unsigned ResNo)647 SDValue DAGTypeLegalizer::SoftenFloatRes_SELECT(SDNode *N, unsigned ResNo) {
648 if (isLegalInHWReg(N->getValueType(ResNo)))
649 return SDValue(N, ResNo);
650 SDValue LHS = GetSoftenedFloat(N->getOperand(1));
651 SDValue RHS = GetSoftenedFloat(N->getOperand(2));
652 return DAG.getSelect(SDLoc(N),
653 LHS.getValueType(), N->getOperand(0), LHS, RHS);
654 }
655
SoftenFloatRes_SELECT_CC(SDNode * N,unsigned ResNo)656 SDValue DAGTypeLegalizer::SoftenFloatRes_SELECT_CC(SDNode *N, unsigned ResNo) {
657 if (isLegalInHWReg(N->getValueType(ResNo)))
658 return SDValue(N, ResNo);
659 SDValue LHS = GetSoftenedFloat(N->getOperand(2));
660 SDValue RHS = GetSoftenedFloat(N->getOperand(3));
661 return DAG.getNode(ISD::SELECT_CC, SDLoc(N),
662 LHS.getValueType(), N->getOperand(0),
663 N->getOperand(1), LHS, RHS, N->getOperand(4));
664 }
665
SoftenFloatRes_UNDEF(SDNode * N)666 SDValue DAGTypeLegalizer::SoftenFloatRes_UNDEF(SDNode *N) {
667 return DAG.getUNDEF(TLI.getTypeToTransformTo(*DAG.getContext(),
668 N->getValueType(0)));
669 }
670
SoftenFloatRes_VAARG(SDNode * N)671 SDValue DAGTypeLegalizer::SoftenFloatRes_VAARG(SDNode *N) {
672 SDValue Chain = N->getOperand(0); // Get the chain.
673 SDValue Ptr = N->getOperand(1); // Get the pointer.
674 EVT VT = N->getValueType(0);
675 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
676 SDLoc dl(N);
677
678 SDValue NewVAARG;
679 NewVAARG = DAG.getVAArg(NVT, dl, Chain, Ptr, N->getOperand(2),
680 N->getConstantOperandVal(3));
681
682 // Legalized the chain result - switch anything that used the old chain to
683 // use the new one.
684 if (N != NewVAARG.getValue(1).getNode())
685 ReplaceValueWith(SDValue(N, 1), NewVAARG.getValue(1));
686 return NewVAARG;
687 }
688
SoftenFloatRes_XINT_TO_FP(SDNode * N)689 SDValue DAGTypeLegalizer::SoftenFloatRes_XINT_TO_FP(SDNode *N) {
690 bool Signed = N->getOpcode() == ISD::SINT_TO_FP;
691 EVT SVT = N->getOperand(0).getValueType();
692 EVT RVT = N->getValueType(0);
693 EVT NVT = EVT();
694 SDLoc dl(N);
695
696 // If the input is not legal, eg: i1 -> fp, then it needs to be promoted to
697 // a larger type, eg: i8 -> fp. Even if it is legal, no libcall may exactly
698 // match. Look for an appropriate libcall.
699 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
700 for (unsigned t = MVT::FIRST_INTEGER_VALUETYPE;
701 t <= MVT::LAST_INTEGER_VALUETYPE && LC == RTLIB::UNKNOWN_LIBCALL; ++t) {
702 NVT = (MVT::SimpleValueType)t;
703 // The source needs to big enough to hold the operand.
704 if (NVT.bitsGE(SVT))
705 LC = Signed ? RTLIB::getSINTTOFP(NVT, RVT):RTLIB::getUINTTOFP (NVT, RVT);
706 }
707 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported XINT_TO_FP!");
708
709 // Sign/zero extend the argument if the libcall takes a larger type.
710 SDValue Op = DAG.getNode(Signed ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, dl,
711 NVT, N->getOperand(0));
712 return TLI.makeLibCall(DAG, LC,
713 TLI.getTypeToTransformTo(*DAG.getContext(), RVT),
714 Op, Signed, dl).first;
715 }
716
717
718 //===----------------------------------------------------------------------===//
719 // Convert Float Operand to Integer for Non-HW-supported Operations.
720 //===----------------------------------------------------------------------===//
721
SoftenFloatOperand(SDNode * N,unsigned OpNo)722 bool DAGTypeLegalizer::SoftenFloatOperand(SDNode *N, unsigned OpNo) {
723 DEBUG(dbgs() << "Soften float operand " << OpNo << ": "; N->dump(&DAG);
724 dbgs() << "\n");
725 SDValue Res = SDValue();
726
727 switch (N->getOpcode()) {
728 default:
729 if (CanSkipSoftenFloatOperand(N, OpNo))
730 return false;
731 #ifndef NDEBUG
732 dbgs() << "SoftenFloatOperand Op #" << OpNo << ": ";
733 N->dump(&DAG); dbgs() << "\n";
734 #endif
735 llvm_unreachable("Do not know how to soften this operator's operand!");
736
737 case ISD::BITCAST: Res = SoftenFloatOp_BITCAST(N); break;
738 case ISD::BR_CC: Res = SoftenFloatOp_BR_CC(N); break;
739 case ISD::FP_EXTEND: Res = SoftenFloatOp_FP_EXTEND(N); break;
740 case ISD::FP_TO_FP16: // Same as FP_ROUND for softening purposes
741 case ISD::FP_ROUND: Res = SoftenFloatOp_FP_ROUND(N); break;
742 case ISD::FP_TO_SINT:
743 case ISD::FP_TO_UINT: Res = SoftenFloatOp_FP_TO_XINT(N); break;
744 case ISD::SELECT_CC: Res = SoftenFloatOp_SELECT_CC(N); break;
745 case ISD::SETCC: Res = SoftenFloatOp_SETCC(N); break;
746 case ISD::STORE:
747 Res = SoftenFloatOp_STORE(N, OpNo);
748 // Do not try to analyze or soften this node again if the value is
749 // or can be held in a register. In that case, Res.getNode() should
750 // be equal to N.
751 if (Res.getNode() == N &&
752 isLegalInHWReg(N->getOperand(OpNo).getValueType()))
753 return false;
754 // Otherwise, we need to reanalyze and lower the new Res nodes.
755 break;
756 }
757
758 // If the result is null, the sub-method took care of registering results etc.
759 if (!Res.getNode()) return false;
760
761 // If the result is N, the sub-method updated N in place. Tell the legalizer
762 // core about this to re-analyze.
763 if (Res.getNode() == N)
764 return true;
765
766 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
767 "Invalid operand expansion");
768
769 ReplaceValueWith(SDValue(N, 0), Res);
770 return false;
771 }
772
CanSkipSoftenFloatOperand(SDNode * N,unsigned OpNo)773 bool DAGTypeLegalizer::CanSkipSoftenFloatOperand(SDNode *N, unsigned OpNo) {
774 if (!isLegalInHWReg(N->getOperand(OpNo).getValueType()))
775 return false;
776 // When the operand type can be kept in registers, SoftenFloatResult
777 // will call ReplaceValueWith to replace all references and we can
778 // skip softening this operand.
779 switch (N->getOperand(OpNo).getOpcode()) {
780 case ISD::BITCAST:
781 case ISD::ConstantFP:
782 case ISD::CopyFromReg:
783 case ISD::CopyToReg:
784 case ISD::FABS:
785 case ISD::FCOPYSIGN:
786 case ISD::FNEG:
787 case ISD::Register:
788 case ISD::SELECT:
789 case ISD::SELECT_CC:
790 return true;
791 }
792 // For some opcodes, SoftenFloatResult handles all conversion of softening
793 // and replacing operands, so that there is no need to soften operands
794 // again, although such opcode could be scanned for other illegal operands.
795 switch (N->getOpcode()) {
796 case ISD::ConstantFP:
797 case ISD::CopyFromReg:
798 case ISD::CopyToReg:
799 case ISD::FABS:
800 case ISD::FCOPYSIGN:
801 case ISD::FNEG:
802 case ISD::Register:
803 return true;
804 }
805 return false;
806 }
807
SoftenFloatOp_BITCAST(SDNode * N)808 SDValue DAGTypeLegalizer::SoftenFloatOp_BITCAST(SDNode *N) {
809 return DAG.getNode(ISD::BITCAST, SDLoc(N), N->getValueType(0),
810 GetSoftenedFloat(N->getOperand(0)));
811 }
812
SoftenFloatOp_FP_EXTEND(SDNode * N)813 SDValue DAGTypeLegalizer::SoftenFloatOp_FP_EXTEND(SDNode *N) {
814 // If we get here, the result must be legal but the source illegal.
815 EVT SVT = N->getOperand(0).getValueType();
816 EVT RVT = N->getValueType(0);
817 SDValue Op = GetSoftenedFloat(N->getOperand(0));
818
819 if (SVT == MVT::f16)
820 return DAG.getNode(ISD::FP16_TO_FP, SDLoc(N), RVT, Op);
821
822 RTLIB::Libcall LC = RTLIB::getFPEXT(SVT, RVT);
823 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_EXTEND libcall");
824
825 return TLI.makeLibCall(DAG, LC, RVT, Op, false, SDLoc(N)).first;
826 }
827
828
SoftenFloatOp_FP_ROUND(SDNode * N)829 SDValue DAGTypeLegalizer::SoftenFloatOp_FP_ROUND(SDNode *N) {
830 // We actually deal with the partially-softened FP_TO_FP16 node too, which
831 // returns an i16 so doesn't meet the constraints necessary for FP_ROUND.
832 assert(N->getOpcode() == ISD::FP_ROUND || N->getOpcode() == ISD::FP_TO_FP16);
833
834 EVT SVT = N->getOperand(0).getValueType();
835 EVT RVT = N->getValueType(0);
836 EVT FloatRVT = N->getOpcode() == ISD::FP_TO_FP16 ? MVT::f16 : RVT;
837
838 RTLIB::Libcall LC = RTLIB::getFPROUND(SVT, FloatRVT);
839 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_ROUND libcall");
840
841 SDValue Op = GetSoftenedFloat(N->getOperand(0));
842 return TLI.makeLibCall(DAG, LC, RVT, Op, false, SDLoc(N)).first;
843 }
844
SoftenFloatOp_BR_CC(SDNode * N)845 SDValue DAGTypeLegalizer::SoftenFloatOp_BR_CC(SDNode *N) {
846 SDValue NewLHS = N->getOperand(2), NewRHS = N->getOperand(3);
847 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(1))->get();
848
849 EVT VT = NewLHS.getValueType();
850 NewLHS = GetSoftenedFloat(NewLHS);
851 NewRHS = GetSoftenedFloat(NewRHS);
852 TLI.softenSetCCOperands(DAG, VT, NewLHS, NewRHS, CCCode, SDLoc(N));
853
854 // If softenSetCCOperands returned a scalar, we need to compare the result
855 // against zero to select between true and false values.
856 if (!NewRHS.getNode()) {
857 NewRHS = DAG.getConstant(0, SDLoc(N), NewLHS.getValueType());
858 CCCode = ISD::SETNE;
859 }
860
861 // Update N to have the operands specified.
862 return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0),
863 DAG.getCondCode(CCCode), NewLHS, NewRHS,
864 N->getOperand(4)),
865 0);
866 }
867
SoftenFloatOp_FP_TO_XINT(SDNode * N)868 SDValue DAGTypeLegalizer::SoftenFloatOp_FP_TO_XINT(SDNode *N) {
869 bool Signed = N->getOpcode() == ISD::FP_TO_SINT;
870 EVT SVT = N->getOperand(0).getValueType();
871 EVT RVT = N->getValueType(0);
872 EVT NVT = EVT();
873 SDLoc dl(N);
874
875 // If the result is not legal, eg: fp -> i1, then it needs to be promoted to
876 // a larger type, eg: fp -> i32. Even if it is legal, no libcall may exactly
877 // match, eg. we don't have fp -> i8 conversions.
878 // Look for an appropriate libcall.
879 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
880 for (unsigned IntVT = MVT::FIRST_INTEGER_VALUETYPE;
881 IntVT <= MVT::LAST_INTEGER_VALUETYPE && LC == RTLIB::UNKNOWN_LIBCALL;
882 ++IntVT) {
883 NVT = (MVT::SimpleValueType)IntVT;
884 // The type needs to big enough to hold the result.
885 if (NVT.bitsGE(RVT))
886 LC = Signed ? RTLIB::getFPTOSINT(SVT, NVT):RTLIB::getFPTOUINT(SVT, NVT);
887 }
888 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_TO_XINT!");
889
890 SDValue Op = GetSoftenedFloat(N->getOperand(0));
891 SDValue Res = TLI.makeLibCall(DAG, LC, NVT, Op, false, dl).first;
892
893 // Truncate the result if the libcall returns a larger type.
894 return DAG.getNode(ISD::TRUNCATE, dl, RVT, Res);
895 }
896
SoftenFloatOp_SELECT_CC(SDNode * N)897 SDValue DAGTypeLegalizer::SoftenFloatOp_SELECT_CC(SDNode *N) {
898 SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
899 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(4))->get();
900
901 EVT VT = NewLHS.getValueType();
902 NewLHS = GetSoftenedFloat(NewLHS);
903 NewRHS = GetSoftenedFloat(NewRHS);
904 TLI.softenSetCCOperands(DAG, VT, NewLHS, NewRHS, CCCode, SDLoc(N));
905
906 // If softenSetCCOperands returned a scalar, we need to compare the result
907 // against zero to select between true and false values.
908 if (!NewRHS.getNode()) {
909 NewRHS = DAG.getConstant(0, SDLoc(N), NewLHS.getValueType());
910 CCCode = ISD::SETNE;
911 }
912
913 // Update N to have the operands specified.
914 return SDValue(DAG.UpdateNodeOperands(N, NewLHS, NewRHS,
915 N->getOperand(2), N->getOperand(3),
916 DAG.getCondCode(CCCode)),
917 0);
918 }
919
SoftenFloatOp_SETCC(SDNode * N)920 SDValue DAGTypeLegalizer::SoftenFloatOp_SETCC(SDNode *N) {
921 SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
922 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
923
924 EVT VT = NewLHS.getValueType();
925 NewLHS = GetSoftenedFloat(NewLHS);
926 NewRHS = GetSoftenedFloat(NewRHS);
927 TLI.softenSetCCOperands(DAG, VT, NewLHS, NewRHS, CCCode, SDLoc(N));
928
929 // If softenSetCCOperands returned a scalar, use it.
930 if (!NewRHS.getNode()) {
931 assert(NewLHS.getValueType() == N->getValueType(0) &&
932 "Unexpected setcc expansion!");
933 return NewLHS;
934 }
935
936 // Otherwise, update N to have the operands specified.
937 return SDValue(DAG.UpdateNodeOperands(N, NewLHS, NewRHS,
938 DAG.getCondCode(CCCode)),
939 0);
940 }
941
SoftenFloatOp_STORE(SDNode * N,unsigned OpNo)942 SDValue DAGTypeLegalizer::SoftenFloatOp_STORE(SDNode *N, unsigned OpNo) {
943 assert(ISD::isUNINDEXEDStore(N) && "Indexed store during type legalization!");
944 assert(OpNo == 1 && "Can only soften the stored value!");
945 StoreSDNode *ST = cast<StoreSDNode>(N);
946 SDValue Val = ST->getValue();
947 SDLoc dl(N);
948
949 if (ST->isTruncatingStore())
950 // Do an FP_ROUND followed by a non-truncating store.
951 Val = BitConvertToInteger(DAG.getNode(ISD::FP_ROUND, dl, ST->getMemoryVT(),
952 Val, DAG.getIntPtrConstant(0, dl)));
953 else
954 Val = GetSoftenedFloat(Val);
955
956 return DAG.getStore(ST->getChain(), dl, Val, ST->getBasePtr(),
957 ST->getMemOperand());
958 }
959
960
961 //===----------------------------------------------------------------------===//
962 // Float Result Expansion
963 //===----------------------------------------------------------------------===//
964
965 /// ExpandFloatResult - This method is called when the specified result of the
966 /// specified node is found to need expansion. At this point, the node may also
967 /// have invalid operands or may have other results that need promotion, we just
968 /// know that (at least) one result needs expansion.
ExpandFloatResult(SDNode * N,unsigned ResNo)969 void DAGTypeLegalizer::ExpandFloatResult(SDNode *N, unsigned ResNo) {
970 DEBUG(dbgs() << "Expand float result: "; N->dump(&DAG); dbgs() << "\n");
971 SDValue Lo, Hi;
972 Lo = Hi = SDValue();
973
974 // See if the target wants to custom expand this node.
975 if (CustomLowerNode(N, N->getValueType(ResNo), true))
976 return;
977
978 switch (N->getOpcode()) {
979 default:
980 #ifndef NDEBUG
981 dbgs() << "ExpandFloatResult #" << ResNo << ": ";
982 N->dump(&DAG); dbgs() << "\n";
983 #endif
984 llvm_unreachable("Do not know how to expand the result of this operator!");
985
986 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
987 case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break;
988 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
989
990 case ISD::MERGE_VALUES: ExpandRes_MERGE_VALUES(N, ResNo, Lo, Hi); break;
991 case ISD::BITCAST: ExpandRes_BITCAST(N, Lo, Hi); break;
992 case ISD::BUILD_PAIR: ExpandRes_BUILD_PAIR(N, Lo, Hi); break;
993 case ISD::EXTRACT_ELEMENT: ExpandRes_EXTRACT_ELEMENT(N, Lo, Hi); break;
994 case ISD::EXTRACT_VECTOR_ELT: ExpandRes_EXTRACT_VECTOR_ELT(N, Lo, Hi); break;
995 case ISD::VAARG: ExpandRes_VAARG(N, Lo, Hi); break;
996
997 case ISD::ConstantFP: ExpandFloatRes_ConstantFP(N, Lo, Hi); break;
998 case ISD::FABS: ExpandFloatRes_FABS(N, Lo, Hi); break;
999 case ISD::FMINNUM: ExpandFloatRes_FMINNUM(N, Lo, Hi); break;
1000 case ISD::FMAXNUM: ExpandFloatRes_FMAXNUM(N, Lo, Hi); break;
1001 case ISD::FADD: ExpandFloatRes_FADD(N, Lo, Hi); break;
1002 case ISD::FCEIL: ExpandFloatRes_FCEIL(N, Lo, Hi); break;
1003 case ISD::FCOPYSIGN: ExpandFloatRes_FCOPYSIGN(N, Lo, Hi); break;
1004 case ISD::FCOS: ExpandFloatRes_FCOS(N, Lo, Hi); break;
1005 case ISD::FDIV: ExpandFloatRes_FDIV(N, Lo, Hi); break;
1006 case ISD::FEXP: ExpandFloatRes_FEXP(N, Lo, Hi); break;
1007 case ISD::FEXP2: ExpandFloatRes_FEXP2(N, Lo, Hi); break;
1008 case ISD::FFLOOR: ExpandFloatRes_FFLOOR(N, Lo, Hi); break;
1009 case ISD::FLOG: ExpandFloatRes_FLOG(N, Lo, Hi); break;
1010 case ISD::FLOG2: ExpandFloatRes_FLOG2(N, Lo, Hi); break;
1011 case ISD::FLOG10: ExpandFloatRes_FLOG10(N, Lo, Hi); break;
1012 case ISD::FMA: ExpandFloatRes_FMA(N, Lo, Hi); break;
1013 case ISD::FMUL: ExpandFloatRes_FMUL(N, Lo, Hi); break;
1014 case ISD::FNEARBYINT: ExpandFloatRes_FNEARBYINT(N, Lo, Hi); break;
1015 case ISD::FNEG: ExpandFloatRes_FNEG(N, Lo, Hi); break;
1016 case ISD::FP_EXTEND: ExpandFloatRes_FP_EXTEND(N, Lo, Hi); break;
1017 case ISD::FPOW: ExpandFloatRes_FPOW(N, Lo, Hi); break;
1018 case ISD::FPOWI: ExpandFloatRes_FPOWI(N, Lo, Hi); break;
1019 case ISD::FRINT: ExpandFloatRes_FRINT(N, Lo, Hi); break;
1020 case ISD::FROUND: ExpandFloatRes_FROUND(N, Lo, Hi); break;
1021 case ISD::FSIN: ExpandFloatRes_FSIN(N, Lo, Hi); break;
1022 case ISD::FSQRT: ExpandFloatRes_FSQRT(N, Lo, Hi); break;
1023 case ISD::FSUB: ExpandFloatRes_FSUB(N, Lo, Hi); break;
1024 case ISD::FTRUNC: ExpandFloatRes_FTRUNC(N, Lo, Hi); break;
1025 case ISD::LOAD: ExpandFloatRes_LOAD(N, Lo, Hi); break;
1026 case ISD::SINT_TO_FP:
1027 case ISD::UINT_TO_FP: ExpandFloatRes_XINT_TO_FP(N, Lo, Hi); break;
1028 case ISD::FREM: ExpandFloatRes_FREM(N, Lo, Hi); break;
1029 }
1030
1031 // If Lo/Hi is null, the sub-method took care of registering results etc.
1032 if (Lo.getNode())
1033 SetExpandedFloat(SDValue(N, ResNo), Lo, Hi);
1034 }
1035
ExpandFloatRes_ConstantFP(SDNode * N,SDValue & Lo,SDValue & Hi)1036 void DAGTypeLegalizer::ExpandFloatRes_ConstantFP(SDNode *N, SDValue &Lo,
1037 SDValue &Hi) {
1038 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1039 assert(NVT.getSizeInBits() == integerPartWidth &&
1040 "Do not know how to expand this float constant!");
1041 APInt C = cast<ConstantFPSDNode>(N)->getValueAPF().bitcastToAPInt();
1042 SDLoc dl(N);
1043 Lo = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT),
1044 APInt(integerPartWidth, C.getRawData()[1])),
1045 dl, NVT);
1046 Hi = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT),
1047 APInt(integerPartWidth, C.getRawData()[0])),
1048 dl, NVT);
1049 }
1050
ExpandFloatRes_FABS(SDNode * N,SDValue & Lo,SDValue & Hi)1051 void DAGTypeLegalizer::ExpandFloatRes_FABS(SDNode *N, SDValue &Lo,
1052 SDValue &Hi) {
1053 assert(N->getValueType(0) == MVT::ppcf128 &&
1054 "Logic only correct for ppcf128!");
1055 SDLoc dl(N);
1056 SDValue Tmp;
1057 GetExpandedFloat(N->getOperand(0), Lo, Tmp);
1058 Hi = DAG.getNode(ISD::FABS, dl, Tmp.getValueType(), Tmp);
1059 // Lo = Hi==fabs(Hi) ? Lo : -Lo;
1060 Lo = DAG.getSelectCC(dl, Tmp, Hi, Lo,
1061 DAG.getNode(ISD::FNEG, dl, Lo.getValueType(), Lo),
1062 ISD::SETEQ);
1063 }
1064
ExpandFloatRes_FMINNUM(SDNode * N,SDValue & Lo,SDValue & Hi)1065 void DAGTypeLegalizer::ExpandFloatRes_FMINNUM(SDNode *N, SDValue &Lo,
1066 SDValue &Hi) {
1067 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1068 RTLIB::FMIN_F32, RTLIB::FMIN_F64,
1069 RTLIB::FMIN_F80, RTLIB::FMIN_F128,
1070 RTLIB::FMIN_PPCF128),
1071 N, false);
1072 GetPairElements(Call, Lo, Hi);
1073 }
1074
ExpandFloatRes_FMAXNUM(SDNode * N,SDValue & Lo,SDValue & Hi)1075 void DAGTypeLegalizer::ExpandFloatRes_FMAXNUM(SDNode *N, SDValue &Lo,
1076 SDValue &Hi) {
1077 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1078 RTLIB::FMAX_F32, RTLIB::FMAX_F64,
1079 RTLIB::FMAX_F80, RTLIB::FMAX_F128,
1080 RTLIB::FMAX_PPCF128),
1081 N, false);
1082 GetPairElements(Call, Lo, Hi);
1083 }
1084
ExpandFloatRes_FADD(SDNode * N,SDValue & Lo,SDValue & Hi)1085 void DAGTypeLegalizer::ExpandFloatRes_FADD(SDNode *N, SDValue &Lo,
1086 SDValue &Hi) {
1087 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1088 RTLIB::ADD_F32, RTLIB::ADD_F64,
1089 RTLIB::ADD_F80, RTLIB::ADD_F128,
1090 RTLIB::ADD_PPCF128),
1091 N, false);
1092 GetPairElements(Call, Lo, Hi);
1093 }
1094
ExpandFloatRes_FCEIL(SDNode * N,SDValue & Lo,SDValue & Hi)1095 void DAGTypeLegalizer::ExpandFloatRes_FCEIL(SDNode *N,
1096 SDValue &Lo, SDValue &Hi) {
1097 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1098 RTLIB::CEIL_F32, RTLIB::CEIL_F64,
1099 RTLIB::CEIL_F80, RTLIB::CEIL_F128,
1100 RTLIB::CEIL_PPCF128),
1101 N, false);
1102 GetPairElements(Call, Lo, Hi);
1103 }
1104
ExpandFloatRes_FCOPYSIGN(SDNode * N,SDValue & Lo,SDValue & Hi)1105 void DAGTypeLegalizer::ExpandFloatRes_FCOPYSIGN(SDNode *N,
1106 SDValue &Lo, SDValue &Hi) {
1107 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1108 RTLIB::COPYSIGN_F32,
1109 RTLIB::COPYSIGN_F64,
1110 RTLIB::COPYSIGN_F80,
1111 RTLIB::COPYSIGN_F128,
1112 RTLIB::COPYSIGN_PPCF128),
1113 N, false);
1114 GetPairElements(Call, Lo, Hi);
1115 }
1116
ExpandFloatRes_FCOS(SDNode * N,SDValue & Lo,SDValue & Hi)1117 void DAGTypeLegalizer::ExpandFloatRes_FCOS(SDNode *N,
1118 SDValue &Lo, SDValue &Hi) {
1119 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1120 RTLIB::COS_F32, RTLIB::COS_F64,
1121 RTLIB::COS_F80, RTLIB::COS_F128,
1122 RTLIB::COS_PPCF128),
1123 N, false);
1124 GetPairElements(Call, Lo, Hi);
1125 }
1126
ExpandFloatRes_FDIV(SDNode * N,SDValue & Lo,SDValue & Hi)1127 void DAGTypeLegalizer::ExpandFloatRes_FDIV(SDNode *N, SDValue &Lo,
1128 SDValue &Hi) {
1129 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
1130 SDValue Call = TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
1131 RTLIB::DIV_F32,
1132 RTLIB::DIV_F64,
1133 RTLIB::DIV_F80,
1134 RTLIB::DIV_F128,
1135 RTLIB::DIV_PPCF128),
1136 N->getValueType(0), Ops, false,
1137 SDLoc(N)).first;
1138 GetPairElements(Call, Lo, Hi);
1139 }
1140
ExpandFloatRes_FEXP(SDNode * N,SDValue & Lo,SDValue & Hi)1141 void DAGTypeLegalizer::ExpandFloatRes_FEXP(SDNode *N,
1142 SDValue &Lo, SDValue &Hi) {
1143 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1144 RTLIB::EXP_F32, RTLIB::EXP_F64,
1145 RTLIB::EXP_F80, RTLIB::EXP_F128,
1146 RTLIB::EXP_PPCF128),
1147 N, false);
1148 GetPairElements(Call, Lo, Hi);
1149 }
1150
ExpandFloatRes_FEXP2(SDNode * N,SDValue & Lo,SDValue & Hi)1151 void DAGTypeLegalizer::ExpandFloatRes_FEXP2(SDNode *N,
1152 SDValue &Lo, SDValue &Hi) {
1153 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1154 RTLIB::EXP2_F32, RTLIB::EXP2_F64,
1155 RTLIB::EXP2_F80, RTLIB::EXP2_F128,
1156 RTLIB::EXP2_PPCF128),
1157 N, false);
1158 GetPairElements(Call, Lo, Hi);
1159 }
1160
ExpandFloatRes_FFLOOR(SDNode * N,SDValue & Lo,SDValue & Hi)1161 void DAGTypeLegalizer::ExpandFloatRes_FFLOOR(SDNode *N,
1162 SDValue &Lo, SDValue &Hi) {
1163 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1164 RTLIB::FLOOR_F32, RTLIB::FLOOR_F64,
1165 RTLIB::FLOOR_F80, RTLIB::FLOOR_F128,
1166 RTLIB::FLOOR_PPCF128),
1167 N, false);
1168 GetPairElements(Call, Lo, Hi);
1169 }
1170
ExpandFloatRes_FLOG(SDNode * N,SDValue & Lo,SDValue & Hi)1171 void DAGTypeLegalizer::ExpandFloatRes_FLOG(SDNode *N,
1172 SDValue &Lo, SDValue &Hi) {
1173 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1174 RTLIB::LOG_F32, RTLIB::LOG_F64,
1175 RTLIB::LOG_F80, RTLIB::LOG_F128,
1176 RTLIB::LOG_PPCF128),
1177 N, false);
1178 GetPairElements(Call, Lo, Hi);
1179 }
1180
ExpandFloatRes_FLOG2(SDNode * N,SDValue & Lo,SDValue & Hi)1181 void DAGTypeLegalizer::ExpandFloatRes_FLOG2(SDNode *N,
1182 SDValue &Lo, SDValue &Hi) {
1183 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1184 RTLIB::LOG2_F32, RTLIB::LOG2_F64,
1185 RTLIB::LOG2_F80, RTLIB::LOG2_F128,
1186 RTLIB::LOG2_PPCF128),
1187 N, false);
1188 GetPairElements(Call, Lo, Hi);
1189 }
1190
ExpandFloatRes_FLOG10(SDNode * N,SDValue & Lo,SDValue & Hi)1191 void DAGTypeLegalizer::ExpandFloatRes_FLOG10(SDNode *N,
1192 SDValue &Lo, SDValue &Hi) {
1193 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1194 RTLIB::LOG10_F32, RTLIB::LOG10_F64,
1195 RTLIB::LOG10_F80, RTLIB::LOG10_F128,
1196 RTLIB::LOG10_PPCF128),
1197 N, false);
1198 GetPairElements(Call, Lo, Hi);
1199 }
1200
ExpandFloatRes_FMA(SDNode * N,SDValue & Lo,SDValue & Hi)1201 void DAGTypeLegalizer::ExpandFloatRes_FMA(SDNode *N, SDValue &Lo,
1202 SDValue &Hi) {
1203 SDValue Ops[3] = { N->getOperand(0), N->getOperand(1), N->getOperand(2) };
1204 SDValue Call = TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
1205 RTLIB::FMA_F32,
1206 RTLIB::FMA_F64,
1207 RTLIB::FMA_F80,
1208 RTLIB::FMA_F128,
1209 RTLIB::FMA_PPCF128),
1210 N->getValueType(0), Ops, false,
1211 SDLoc(N)).first;
1212 GetPairElements(Call, Lo, Hi);
1213 }
1214
ExpandFloatRes_FMUL(SDNode * N,SDValue & Lo,SDValue & Hi)1215 void DAGTypeLegalizer::ExpandFloatRes_FMUL(SDNode *N, SDValue &Lo,
1216 SDValue &Hi) {
1217 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
1218 SDValue Call = TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
1219 RTLIB::MUL_F32,
1220 RTLIB::MUL_F64,
1221 RTLIB::MUL_F80,
1222 RTLIB::MUL_F128,
1223 RTLIB::MUL_PPCF128),
1224 N->getValueType(0), Ops, false,
1225 SDLoc(N)).first;
1226 GetPairElements(Call, Lo, Hi);
1227 }
1228
ExpandFloatRes_FNEARBYINT(SDNode * N,SDValue & Lo,SDValue & Hi)1229 void DAGTypeLegalizer::ExpandFloatRes_FNEARBYINT(SDNode *N,
1230 SDValue &Lo, SDValue &Hi) {
1231 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1232 RTLIB::NEARBYINT_F32,
1233 RTLIB::NEARBYINT_F64,
1234 RTLIB::NEARBYINT_F80,
1235 RTLIB::NEARBYINT_F128,
1236 RTLIB::NEARBYINT_PPCF128),
1237 N, false);
1238 GetPairElements(Call, Lo, Hi);
1239 }
1240
ExpandFloatRes_FNEG(SDNode * N,SDValue & Lo,SDValue & Hi)1241 void DAGTypeLegalizer::ExpandFloatRes_FNEG(SDNode *N, SDValue &Lo,
1242 SDValue &Hi) {
1243 SDLoc dl(N);
1244 GetExpandedFloat(N->getOperand(0), Lo, Hi);
1245 Lo = DAG.getNode(ISD::FNEG, dl, Lo.getValueType(), Lo);
1246 Hi = DAG.getNode(ISD::FNEG, dl, Hi.getValueType(), Hi);
1247 }
1248
ExpandFloatRes_FP_EXTEND(SDNode * N,SDValue & Lo,SDValue & Hi)1249 void DAGTypeLegalizer::ExpandFloatRes_FP_EXTEND(SDNode *N, SDValue &Lo,
1250 SDValue &Hi) {
1251 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1252 SDLoc dl(N);
1253 Hi = DAG.getNode(ISD::FP_EXTEND, dl, NVT, N->getOperand(0));
1254 Lo = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT),
1255 APInt(NVT.getSizeInBits(), 0)), dl, NVT);
1256 }
1257
ExpandFloatRes_FPOW(SDNode * N,SDValue & Lo,SDValue & Hi)1258 void DAGTypeLegalizer::ExpandFloatRes_FPOW(SDNode *N,
1259 SDValue &Lo, SDValue &Hi) {
1260 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1261 RTLIB::POW_F32, RTLIB::POW_F64,
1262 RTLIB::POW_F80, RTLIB::POW_F128,
1263 RTLIB::POW_PPCF128),
1264 N, false);
1265 GetPairElements(Call, Lo, Hi);
1266 }
1267
ExpandFloatRes_FPOWI(SDNode * N,SDValue & Lo,SDValue & Hi)1268 void DAGTypeLegalizer::ExpandFloatRes_FPOWI(SDNode *N,
1269 SDValue &Lo, SDValue &Hi) {
1270 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1271 RTLIB::POWI_F32, RTLIB::POWI_F64,
1272 RTLIB::POWI_F80, RTLIB::POWI_F128,
1273 RTLIB::POWI_PPCF128),
1274 N, false);
1275 GetPairElements(Call, Lo, Hi);
1276 }
1277
ExpandFloatRes_FREM(SDNode * N,SDValue & Lo,SDValue & Hi)1278 void DAGTypeLegalizer::ExpandFloatRes_FREM(SDNode *N,
1279 SDValue &Lo, SDValue &Hi) {
1280 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1281 RTLIB::REM_F32, RTLIB::REM_F64,
1282 RTLIB::REM_F80, RTLIB::REM_F128,
1283 RTLIB::REM_PPCF128),
1284 N, false);
1285 GetPairElements(Call, Lo, Hi);
1286 }
1287
ExpandFloatRes_FRINT(SDNode * N,SDValue & Lo,SDValue & Hi)1288 void DAGTypeLegalizer::ExpandFloatRes_FRINT(SDNode *N,
1289 SDValue &Lo, SDValue &Hi) {
1290 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1291 RTLIB::RINT_F32, RTLIB::RINT_F64,
1292 RTLIB::RINT_F80, RTLIB::RINT_F128,
1293 RTLIB::RINT_PPCF128),
1294 N, false);
1295 GetPairElements(Call, Lo, Hi);
1296 }
1297
ExpandFloatRes_FROUND(SDNode * N,SDValue & Lo,SDValue & Hi)1298 void DAGTypeLegalizer::ExpandFloatRes_FROUND(SDNode *N,
1299 SDValue &Lo, SDValue &Hi) {
1300 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1301 RTLIB::ROUND_F32,
1302 RTLIB::ROUND_F64,
1303 RTLIB::ROUND_F80,
1304 RTLIB::ROUND_F128,
1305 RTLIB::ROUND_PPCF128),
1306 N, false);
1307 GetPairElements(Call, Lo, Hi);
1308 }
1309
ExpandFloatRes_FSIN(SDNode * N,SDValue & Lo,SDValue & Hi)1310 void DAGTypeLegalizer::ExpandFloatRes_FSIN(SDNode *N,
1311 SDValue &Lo, SDValue &Hi) {
1312 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1313 RTLIB::SIN_F32, RTLIB::SIN_F64,
1314 RTLIB::SIN_F80, RTLIB::SIN_F128,
1315 RTLIB::SIN_PPCF128),
1316 N, false);
1317 GetPairElements(Call, Lo, Hi);
1318 }
1319
ExpandFloatRes_FSQRT(SDNode * N,SDValue & Lo,SDValue & Hi)1320 void DAGTypeLegalizer::ExpandFloatRes_FSQRT(SDNode *N,
1321 SDValue &Lo, SDValue &Hi) {
1322 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1323 RTLIB::SQRT_F32, RTLIB::SQRT_F64,
1324 RTLIB::SQRT_F80, RTLIB::SQRT_F128,
1325 RTLIB::SQRT_PPCF128),
1326 N, false);
1327 GetPairElements(Call, Lo, Hi);
1328 }
1329
ExpandFloatRes_FSUB(SDNode * N,SDValue & Lo,SDValue & Hi)1330 void DAGTypeLegalizer::ExpandFloatRes_FSUB(SDNode *N, SDValue &Lo,
1331 SDValue &Hi) {
1332 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
1333 SDValue Call = TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
1334 RTLIB::SUB_F32,
1335 RTLIB::SUB_F64,
1336 RTLIB::SUB_F80,
1337 RTLIB::SUB_F128,
1338 RTLIB::SUB_PPCF128),
1339 N->getValueType(0), Ops, false,
1340 SDLoc(N)).first;
1341 GetPairElements(Call, Lo, Hi);
1342 }
1343
ExpandFloatRes_FTRUNC(SDNode * N,SDValue & Lo,SDValue & Hi)1344 void DAGTypeLegalizer::ExpandFloatRes_FTRUNC(SDNode *N,
1345 SDValue &Lo, SDValue &Hi) {
1346 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1347 RTLIB::TRUNC_F32, RTLIB::TRUNC_F64,
1348 RTLIB::TRUNC_F80, RTLIB::TRUNC_F128,
1349 RTLIB::TRUNC_PPCF128),
1350 N, false);
1351 GetPairElements(Call, Lo, Hi);
1352 }
1353
ExpandFloatRes_LOAD(SDNode * N,SDValue & Lo,SDValue & Hi)1354 void DAGTypeLegalizer::ExpandFloatRes_LOAD(SDNode *N, SDValue &Lo,
1355 SDValue &Hi) {
1356 if (ISD::isNormalLoad(N)) {
1357 ExpandRes_NormalLoad(N, Lo, Hi);
1358 return;
1359 }
1360
1361 assert(ISD::isUNINDEXEDLoad(N) && "Indexed load during type legalization!");
1362 LoadSDNode *LD = cast<LoadSDNode>(N);
1363 SDValue Chain = LD->getChain();
1364 SDValue Ptr = LD->getBasePtr();
1365 SDLoc dl(N);
1366
1367 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), LD->getValueType(0));
1368 assert(NVT.isByteSized() && "Expanded type not byte sized!");
1369 assert(LD->getMemoryVT().bitsLE(NVT) && "Float type not round?");
1370
1371 Hi = DAG.getExtLoad(LD->getExtensionType(), dl, NVT, Chain, Ptr,
1372 LD->getMemoryVT(), LD->getMemOperand());
1373
1374 // Remember the chain.
1375 Chain = Hi.getValue(1);
1376
1377 // The low part is zero.
1378 Lo = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT),
1379 APInt(NVT.getSizeInBits(), 0)), dl, NVT);
1380
1381 // Modified the chain - switch anything that used the old chain to use the
1382 // new one.
1383 ReplaceValueWith(SDValue(LD, 1), Chain);
1384 }
1385
ExpandFloatRes_XINT_TO_FP(SDNode * N,SDValue & Lo,SDValue & Hi)1386 void DAGTypeLegalizer::ExpandFloatRes_XINT_TO_FP(SDNode *N, SDValue &Lo,
1387 SDValue &Hi) {
1388 assert(N->getValueType(0) == MVT::ppcf128 && "Unsupported XINT_TO_FP!");
1389 EVT VT = N->getValueType(0);
1390 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1391 SDValue Src = N->getOperand(0);
1392 EVT SrcVT = Src.getValueType();
1393 bool isSigned = N->getOpcode() == ISD::SINT_TO_FP;
1394 SDLoc dl(N);
1395
1396 // First do an SINT_TO_FP, whether the original was signed or unsigned.
1397 // When promoting partial word types to i32 we must honor the signedness,
1398 // though.
1399 if (SrcVT.bitsLE(MVT::i32)) {
1400 // The integer can be represented exactly in an f64.
1401 Src = DAG.getNode(isSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, dl,
1402 MVT::i32, Src);
1403 Lo = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT),
1404 APInt(NVT.getSizeInBits(), 0)), dl, NVT);
1405 Hi = DAG.getNode(ISD::SINT_TO_FP, dl, NVT, Src);
1406 } else {
1407 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
1408 if (SrcVT.bitsLE(MVT::i64)) {
1409 Src = DAG.getNode(isSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, dl,
1410 MVT::i64, Src);
1411 LC = RTLIB::SINTTOFP_I64_PPCF128;
1412 } else if (SrcVT.bitsLE(MVT::i128)) {
1413 Src = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i128, Src);
1414 LC = RTLIB::SINTTOFP_I128_PPCF128;
1415 }
1416 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported XINT_TO_FP!");
1417
1418 Hi = TLI.makeLibCall(DAG, LC, VT, Src, true, dl).first;
1419 GetPairElements(Hi, Lo, Hi);
1420 }
1421
1422 if (isSigned)
1423 return;
1424
1425 // Unsigned - fix up the SINT_TO_FP value just calculated.
1426 Hi = DAG.getNode(ISD::BUILD_PAIR, dl, VT, Lo, Hi);
1427 SrcVT = Src.getValueType();
1428
1429 // x>=0 ? (ppcf128)(iN)x : (ppcf128)(iN)x + 2^N; N=32,64,128.
1430 static const uint64_t TwoE32[] = { 0x41f0000000000000LL, 0 };
1431 static const uint64_t TwoE64[] = { 0x43f0000000000000LL, 0 };
1432 static const uint64_t TwoE128[] = { 0x47f0000000000000LL, 0 };
1433 ArrayRef<uint64_t> Parts;
1434
1435 switch (SrcVT.getSimpleVT().SimpleTy) {
1436 default:
1437 llvm_unreachable("Unsupported UINT_TO_FP!");
1438 case MVT::i32:
1439 Parts = TwoE32;
1440 break;
1441 case MVT::i64:
1442 Parts = TwoE64;
1443 break;
1444 case MVT::i128:
1445 Parts = TwoE128;
1446 break;
1447 }
1448
1449 // TODO: Are there fast-math-flags to propagate to this FADD?
1450 Lo = DAG.getNode(ISD::FADD, dl, VT, Hi,
1451 DAG.getConstantFP(APFloat(APFloat::PPCDoubleDouble,
1452 APInt(128, Parts)),
1453 dl, MVT::ppcf128));
1454 Lo = DAG.getSelectCC(dl, Src, DAG.getConstant(0, dl, SrcVT),
1455 Lo, Hi, ISD::SETLT);
1456 GetPairElements(Lo, Lo, Hi);
1457 }
1458
1459
1460 //===----------------------------------------------------------------------===//
1461 // Float Operand Expansion
1462 //===----------------------------------------------------------------------===//
1463
1464 /// ExpandFloatOperand - This method is called when the specified operand of the
1465 /// specified node is found to need expansion. At this point, all of the result
1466 /// types of the node are known to be legal, but other operands of the node may
1467 /// need promotion or expansion as well as the specified one.
ExpandFloatOperand(SDNode * N,unsigned OpNo)1468 bool DAGTypeLegalizer::ExpandFloatOperand(SDNode *N, unsigned OpNo) {
1469 DEBUG(dbgs() << "Expand float operand: "; N->dump(&DAG); dbgs() << "\n");
1470 SDValue Res = SDValue();
1471
1472 // See if the target wants to custom expand this node.
1473 if (CustomLowerNode(N, N->getOperand(OpNo).getValueType(), false))
1474 return false;
1475
1476 switch (N->getOpcode()) {
1477 default:
1478 #ifndef NDEBUG
1479 dbgs() << "ExpandFloatOperand Op #" << OpNo << ": ";
1480 N->dump(&DAG); dbgs() << "\n";
1481 #endif
1482 llvm_unreachable("Do not know how to expand this operator's operand!");
1483
1484 case ISD::BITCAST: Res = ExpandOp_BITCAST(N); break;
1485 case ISD::BUILD_VECTOR: Res = ExpandOp_BUILD_VECTOR(N); break;
1486 case ISD::EXTRACT_ELEMENT: Res = ExpandOp_EXTRACT_ELEMENT(N); break;
1487
1488 case ISD::BR_CC: Res = ExpandFloatOp_BR_CC(N); break;
1489 case ISD::FCOPYSIGN: Res = ExpandFloatOp_FCOPYSIGN(N); break;
1490 case ISD::FP_ROUND: Res = ExpandFloatOp_FP_ROUND(N); break;
1491 case ISD::FP_TO_SINT: Res = ExpandFloatOp_FP_TO_SINT(N); break;
1492 case ISD::FP_TO_UINT: Res = ExpandFloatOp_FP_TO_UINT(N); break;
1493 case ISD::SELECT_CC: Res = ExpandFloatOp_SELECT_CC(N); break;
1494 case ISD::SETCC: Res = ExpandFloatOp_SETCC(N); break;
1495 case ISD::STORE: Res = ExpandFloatOp_STORE(cast<StoreSDNode>(N),
1496 OpNo); break;
1497 }
1498
1499 // If the result is null, the sub-method took care of registering results etc.
1500 if (!Res.getNode()) return false;
1501
1502 // If the result is N, the sub-method updated N in place. Tell the legalizer
1503 // core about this.
1504 if (Res.getNode() == N)
1505 return true;
1506
1507 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
1508 "Invalid operand expansion");
1509
1510 ReplaceValueWith(SDValue(N, 0), Res);
1511 return false;
1512 }
1513
1514 /// FloatExpandSetCCOperands - Expand the operands of a comparison. This code
1515 /// is shared among BR_CC, SELECT_CC, and SETCC handlers.
FloatExpandSetCCOperands(SDValue & NewLHS,SDValue & NewRHS,ISD::CondCode & CCCode,SDLoc dl)1516 void DAGTypeLegalizer::FloatExpandSetCCOperands(SDValue &NewLHS,
1517 SDValue &NewRHS,
1518 ISD::CondCode &CCCode,
1519 SDLoc dl) {
1520 SDValue LHSLo, LHSHi, RHSLo, RHSHi;
1521 GetExpandedFloat(NewLHS, LHSLo, LHSHi);
1522 GetExpandedFloat(NewRHS, RHSLo, RHSHi);
1523
1524 assert(NewLHS.getValueType() == MVT::ppcf128 && "Unsupported setcc type!");
1525
1526 // FIXME: This generated code sucks. We want to generate
1527 // FCMPU crN, hi1, hi2
1528 // BNE crN, L:
1529 // FCMPU crN, lo1, lo2
1530 // The following can be improved, but not that much.
1531 SDValue Tmp1, Tmp2, Tmp3;
1532 Tmp1 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()),
1533 LHSHi, RHSHi, ISD::SETOEQ);
1534 Tmp2 = DAG.getSetCC(dl, getSetCCResultType(LHSLo.getValueType()),
1535 LHSLo, RHSLo, CCCode);
1536 Tmp3 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2);
1537 Tmp1 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()),
1538 LHSHi, RHSHi, ISD::SETUNE);
1539 Tmp2 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()),
1540 LHSHi, RHSHi, CCCode);
1541 Tmp1 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2);
1542 NewLHS = DAG.getNode(ISD::OR, dl, Tmp1.getValueType(), Tmp1, Tmp3);
1543 NewRHS = SDValue(); // LHS is the result, not a compare.
1544 }
1545
ExpandFloatOp_BR_CC(SDNode * N)1546 SDValue DAGTypeLegalizer::ExpandFloatOp_BR_CC(SDNode *N) {
1547 SDValue NewLHS = N->getOperand(2), NewRHS = N->getOperand(3);
1548 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(1))->get();
1549 FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode, SDLoc(N));
1550
1551 // If ExpandSetCCOperands returned a scalar, we need to compare the result
1552 // against zero to select between true and false values.
1553 if (!NewRHS.getNode()) {
1554 NewRHS = DAG.getConstant(0, SDLoc(N), NewLHS.getValueType());
1555 CCCode = ISD::SETNE;
1556 }
1557
1558 // Update N to have the operands specified.
1559 return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0),
1560 DAG.getCondCode(CCCode), NewLHS, NewRHS,
1561 N->getOperand(4)), 0);
1562 }
1563
ExpandFloatOp_FCOPYSIGN(SDNode * N)1564 SDValue DAGTypeLegalizer::ExpandFloatOp_FCOPYSIGN(SDNode *N) {
1565 assert(N->getOperand(1).getValueType() == MVT::ppcf128 &&
1566 "Logic only correct for ppcf128!");
1567 SDValue Lo, Hi;
1568 GetExpandedFloat(N->getOperand(1), Lo, Hi);
1569 // The ppcf128 value is providing only the sign; take it from the
1570 // higher-order double (which must have the larger magnitude).
1571 return DAG.getNode(ISD::FCOPYSIGN, SDLoc(N),
1572 N->getValueType(0), N->getOperand(0), Hi);
1573 }
1574
ExpandFloatOp_FP_ROUND(SDNode * N)1575 SDValue DAGTypeLegalizer::ExpandFloatOp_FP_ROUND(SDNode *N) {
1576 assert(N->getOperand(0).getValueType() == MVT::ppcf128 &&
1577 "Logic only correct for ppcf128!");
1578 SDValue Lo, Hi;
1579 GetExpandedFloat(N->getOperand(0), Lo, Hi);
1580 // Round it the rest of the way (e.g. to f32) if needed.
1581 return DAG.getNode(ISD::FP_ROUND, SDLoc(N),
1582 N->getValueType(0), Hi, N->getOperand(1));
1583 }
1584
ExpandFloatOp_FP_TO_SINT(SDNode * N)1585 SDValue DAGTypeLegalizer::ExpandFloatOp_FP_TO_SINT(SDNode *N) {
1586 EVT RVT = N->getValueType(0);
1587 SDLoc dl(N);
1588
1589 // Expand ppcf128 to i32 by hand for the benefit of llvm-gcc bootstrap on
1590 // PPC (the libcall is not available). FIXME: Do this in a less hacky way.
1591 if (RVT == MVT::i32) {
1592 assert(N->getOperand(0).getValueType() == MVT::ppcf128 &&
1593 "Logic only correct for ppcf128!");
1594 SDValue Res = DAG.getNode(ISD::FP_ROUND_INREG, dl, MVT::ppcf128,
1595 N->getOperand(0), DAG.getValueType(MVT::f64));
1596 Res = DAG.getNode(ISD::FP_ROUND, dl, MVT::f64, Res,
1597 DAG.getIntPtrConstant(1, dl));
1598 return DAG.getNode(ISD::FP_TO_SINT, dl, MVT::i32, Res);
1599 }
1600
1601 RTLIB::Libcall LC = RTLIB::getFPTOSINT(N->getOperand(0).getValueType(), RVT);
1602 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_TO_SINT!");
1603 return TLI.makeLibCall(DAG, LC, RVT, N->getOperand(0), false, dl).first;
1604 }
1605
ExpandFloatOp_FP_TO_UINT(SDNode * N)1606 SDValue DAGTypeLegalizer::ExpandFloatOp_FP_TO_UINT(SDNode *N) {
1607 EVT RVT = N->getValueType(0);
1608 SDLoc dl(N);
1609
1610 // Expand ppcf128 to i32 by hand for the benefit of llvm-gcc bootstrap on
1611 // PPC (the libcall is not available). FIXME: Do this in a less hacky way.
1612 if (RVT == MVT::i32) {
1613 assert(N->getOperand(0).getValueType() == MVT::ppcf128 &&
1614 "Logic only correct for ppcf128!");
1615 const uint64_t TwoE31[] = {0x41e0000000000000LL, 0};
1616 APFloat APF = APFloat(APFloat::PPCDoubleDouble, APInt(128, TwoE31));
1617 SDValue Tmp = DAG.getConstantFP(APF, dl, MVT::ppcf128);
1618 // X>=2^31 ? (int)(X-2^31)+0x80000000 : (int)X
1619 // FIXME: generated code sucks.
1620 // TODO: Are there fast-math-flags to propagate to this FSUB?
1621 return DAG.getSelectCC(dl, N->getOperand(0), Tmp,
1622 DAG.getNode(ISD::ADD, dl, MVT::i32,
1623 DAG.getNode(ISD::FP_TO_SINT, dl, MVT::i32,
1624 DAG.getNode(ISD::FSUB, dl,
1625 MVT::ppcf128,
1626 N->getOperand(0),
1627 Tmp)),
1628 DAG.getConstant(0x80000000, dl,
1629 MVT::i32)),
1630 DAG.getNode(ISD::FP_TO_SINT, dl,
1631 MVT::i32, N->getOperand(0)),
1632 ISD::SETGE);
1633 }
1634
1635 RTLIB::Libcall LC = RTLIB::getFPTOUINT(N->getOperand(0).getValueType(), RVT);
1636 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_TO_UINT!");
1637 return TLI.makeLibCall(DAG, LC, N->getValueType(0), N->getOperand(0),
1638 false, dl).first;
1639 }
1640
ExpandFloatOp_SELECT_CC(SDNode * N)1641 SDValue DAGTypeLegalizer::ExpandFloatOp_SELECT_CC(SDNode *N) {
1642 SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
1643 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(4))->get();
1644 FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode, SDLoc(N));
1645
1646 // If ExpandSetCCOperands returned a scalar, we need to compare the result
1647 // against zero to select between true and false values.
1648 if (!NewRHS.getNode()) {
1649 NewRHS = DAG.getConstant(0, SDLoc(N), NewLHS.getValueType());
1650 CCCode = ISD::SETNE;
1651 }
1652
1653 // Update N to have the operands specified.
1654 return SDValue(DAG.UpdateNodeOperands(N, NewLHS, NewRHS,
1655 N->getOperand(2), N->getOperand(3),
1656 DAG.getCondCode(CCCode)), 0);
1657 }
1658
ExpandFloatOp_SETCC(SDNode * N)1659 SDValue DAGTypeLegalizer::ExpandFloatOp_SETCC(SDNode *N) {
1660 SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
1661 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
1662 FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode, SDLoc(N));
1663
1664 // If ExpandSetCCOperands returned a scalar, use it.
1665 if (!NewRHS.getNode()) {
1666 assert(NewLHS.getValueType() == N->getValueType(0) &&
1667 "Unexpected setcc expansion!");
1668 return NewLHS;
1669 }
1670
1671 // Otherwise, update N to have the operands specified.
1672 return SDValue(DAG.UpdateNodeOperands(N, NewLHS, NewRHS,
1673 DAG.getCondCode(CCCode)), 0);
1674 }
1675
ExpandFloatOp_STORE(SDNode * N,unsigned OpNo)1676 SDValue DAGTypeLegalizer::ExpandFloatOp_STORE(SDNode *N, unsigned OpNo) {
1677 if (ISD::isNormalStore(N))
1678 return ExpandOp_NormalStore(N, OpNo);
1679
1680 assert(ISD::isUNINDEXEDStore(N) && "Indexed store during type legalization!");
1681 assert(OpNo == 1 && "Can only expand the stored value so far");
1682 StoreSDNode *ST = cast<StoreSDNode>(N);
1683
1684 SDValue Chain = ST->getChain();
1685 SDValue Ptr = ST->getBasePtr();
1686
1687 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(),
1688 ST->getValue().getValueType());
1689 assert(NVT.isByteSized() && "Expanded type not byte sized!");
1690 assert(ST->getMemoryVT().bitsLE(NVT) && "Float type not round?");
1691 (void)NVT;
1692
1693 SDValue Lo, Hi;
1694 GetExpandedOp(ST->getValue(), Lo, Hi);
1695
1696 return DAG.getTruncStore(Chain, SDLoc(N), Hi, Ptr,
1697 ST->getMemoryVT(), ST->getMemOperand());
1698 }
1699
1700 //===----------------------------------------------------------------------===//
1701 // Float Operand Promotion
1702 //===----------------------------------------------------------------------===//
1703 //
1704
GetPromotionOpcode(EVT OpVT,EVT RetVT)1705 static ISD::NodeType GetPromotionOpcode(EVT OpVT, EVT RetVT) {
1706 if (OpVT == MVT::f16) {
1707 return ISD::FP16_TO_FP;
1708 } else if (RetVT == MVT::f16) {
1709 return ISD::FP_TO_FP16;
1710 }
1711
1712 report_fatal_error("Attempt at an invalid promotion-related conversion");
1713 }
1714
PromoteFloatOperand(SDNode * N,unsigned OpNo)1715 bool DAGTypeLegalizer::PromoteFloatOperand(SDNode *N, unsigned OpNo) {
1716 SDValue R = SDValue();
1717
1718 // Nodes that use a promotion-requiring floating point operand, but doesn't
1719 // produce a promotion-requiring floating point result, need to be legalized
1720 // to use the promoted float operand. Nodes that produce at least one
1721 // promotion-requiring floating point result have their operands legalized as
1722 // a part of PromoteFloatResult.
1723 switch (N->getOpcode()) {
1724 default:
1725 llvm_unreachable("Do not know how to promote this operator's operand!");
1726
1727 case ISD::BITCAST: R = PromoteFloatOp_BITCAST(N, OpNo); break;
1728 case ISD::FCOPYSIGN: R = PromoteFloatOp_FCOPYSIGN(N, OpNo); break;
1729 case ISD::FP_TO_SINT:
1730 case ISD::FP_TO_UINT: R = PromoteFloatOp_FP_TO_XINT(N, OpNo); break;
1731 case ISD::FP_EXTEND: R = PromoteFloatOp_FP_EXTEND(N, OpNo); break;
1732 case ISD::SELECT_CC: R = PromoteFloatOp_SELECT_CC(N, OpNo); break;
1733 case ISD::SETCC: R = PromoteFloatOp_SETCC(N, OpNo); break;
1734 case ISD::STORE: R = PromoteFloatOp_STORE(N, OpNo); break;
1735 }
1736
1737 if (R.getNode())
1738 ReplaceValueWith(SDValue(N, 0), R);
1739 return false;
1740 }
1741
PromoteFloatOp_BITCAST(SDNode * N,unsigned OpNo)1742 SDValue DAGTypeLegalizer::PromoteFloatOp_BITCAST(SDNode *N, unsigned OpNo) {
1743 SDValue Op = N->getOperand(0);
1744 EVT OpVT = Op->getValueType(0);
1745
1746 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), OpVT.getSizeInBits());
1747 assert (IVT == N->getValueType(0) && "Bitcast to type of different size");
1748
1749 SDValue Promoted = GetPromotedFloat(N->getOperand(0));
1750 EVT PromotedVT = Promoted->getValueType(0);
1751
1752 // Convert the promoted float value to the desired IVT.
1753 return DAG.getNode(GetPromotionOpcode(PromotedVT, OpVT), SDLoc(N), IVT,
1754 Promoted);
1755 }
1756
1757 // Promote Operand 1 of FCOPYSIGN. Operand 0 ought to be handled by
1758 // PromoteFloatRes_FCOPYSIGN.
PromoteFloatOp_FCOPYSIGN(SDNode * N,unsigned OpNo)1759 SDValue DAGTypeLegalizer::PromoteFloatOp_FCOPYSIGN(SDNode *N, unsigned OpNo) {
1760 assert (OpNo == 1 && "Only Operand 1 must need promotion here");
1761 SDValue Op1 = GetPromotedFloat(N->getOperand(1));
1762
1763 return DAG.getNode(N->getOpcode(), SDLoc(N), N->getValueType(0),
1764 N->getOperand(0), Op1);
1765 }
1766
1767 // Convert the promoted float value to the desired integer type
PromoteFloatOp_FP_TO_XINT(SDNode * N,unsigned OpNo)1768 SDValue DAGTypeLegalizer::PromoteFloatOp_FP_TO_XINT(SDNode *N, unsigned OpNo) {
1769 SDValue Op = GetPromotedFloat(N->getOperand(0));
1770 return DAG.getNode(N->getOpcode(), SDLoc(N), N->getValueType(0), Op);
1771 }
1772
PromoteFloatOp_FP_EXTEND(SDNode * N,unsigned OpNo)1773 SDValue DAGTypeLegalizer::PromoteFloatOp_FP_EXTEND(SDNode *N, unsigned OpNo) {
1774 SDValue Op = GetPromotedFloat(N->getOperand(0));
1775 EVT VT = N->getValueType(0);
1776
1777 // Desired VT is same as promoted type. Use promoted float directly.
1778 if (VT == Op->getValueType(0))
1779 return Op;
1780
1781 // Else, extend the promoted float value to the desired VT.
1782 return DAG.getNode(ISD::FP_EXTEND, SDLoc(N), VT, Op);
1783 }
1784
1785 // Promote the float operands used for comparison. The true- and false-
1786 // operands have the same type as the result and are promoted, if needed, by
1787 // PromoteFloatRes_SELECT_CC
PromoteFloatOp_SELECT_CC(SDNode * N,unsigned OpNo)1788 SDValue DAGTypeLegalizer::PromoteFloatOp_SELECT_CC(SDNode *N, unsigned OpNo) {
1789 SDValue LHS = GetPromotedFloat(N->getOperand(0));
1790 SDValue RHS = GetPromotedFloat(N->getOperand(1));
1791
1792 return DAG.getNode(ISD::SELECT_CC, SDLoc(N), N->getValueType(0),
1793 LHS, RHS, N->getOperand(2), N->getOperand(3),
1794 N->getOperand(4));
1795 }
1796
1797 // Construct a SETCC that compares the promoted values and sets the conditional
1798 // code.
PromoteFloatOp_SETCC(SDNode * N,unsigned OpNo)1799 SDValue DAGTypeLegalizer::PromoteFloatOp_SETCC(SDNode *N, unsigned OpNo) {
1800 EVT VT = N->getValueType(0);
1801 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1802 SDValue Op0 = GetPromotedFloat(N->getOperand(0));
1803 SDValue Op1 = GetPromotedFloat(N->getOperand(1));
1804 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
1805
1806 return DAG.getSetCC(SDLoc(N), NVT, Op0, Op1, CCCode);
1807
1808 }
1809
1810 // Lower the promoted Float down to the integer value of same size and construct
1811 // a STORE of the integer value.
PromoteFloatOp_STORE(SDNode * N,unsigned OpNo)1812 SDValue DAGTypeLegalizer::PromoteFloatOp_STORE(SDNode *N, unsigned OpNo) {
1813 StoreSDNode *ST = cast<StoreSDNode>(N);
1814 SDValue Val = ST->getValue();
1815 SDLoc DL(N);
1816
1817 SDValue Promoted = GetPromotedFloat(Val);
1818 EVT VT = ST->getOperand(1)->getValueType(0);
1819 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits());
1820
1821 SDValue NewVal;
1822 NewVal = DAG.getNode(GetPromotionOpcode(Promoted.getValueType(), VT), DL,
1823 IVT, Promoted);
1824
1825 return DAG.getStore(ST->getChain(), DL, NewVal, ST->getBasePtr(),
1826 ST->getMemOperand());
1827 }
1828
1829 //===----------------------------------------------------------------------===//
1830 // Float Result Promotion
1831 //===----------------------------------------------------------------------===//
1832
PromoteFloatResult(SDNode * N,unsigned ResNo)1833 void DAGTypeLegalizer::PromoteFloatResult(SDNode *N, unsigned ResNo) {
1834 SDValue R = SDValue();
1835
1836 switch (N->getOpcode()) {
1837 // These opcodes cannot appear if promotion of FP16 is done in the backend
1838 // instead of Clang
1839 case ISD::FP16_TO_FP:
1840 case ISD::FP_TO_FP16:
1841 default:
1842 llvm_unreachable("Do not know how to promote this operator's result!");
1843
1844 case ISD::BITCAST: R = PromoteFloatRes_BITCAST(N); break;
1845 case ISD::ConstantFP: R = PromoteFloatRes_ConstantFP(N); break;
1846 case ISD::EXTRACT_VECTOR_ELT:
1847 R = PromoteFloatRes_EXTRACT_VECTOR_ELT(N); break;
1848 case ISD::FCOPYSIGN: R = PromoteFloatRes_FCOPYSIGN(N); break;
1849
1850 // Unary FP Operations
1851 case ISD::FABS:
1852 case ISD::FCEIL:
1853 case ISD::FCOS:
1854 case ISD::FEXP:
1855 case ISD::FEXP2:
1856 case ISD::FFLOOR:
1857 case ISD::FLOG:
1858 case ISD::FLOG2:
1859 case ISD::FLOG10:
1860 case ISD::FNEARBYINT:
1861 case ISD::FNEG:
1862 case ISD::FRINT:
1863 case ISD::FROUND:
1864 case ISD::FSIN:
1865 case ISD::FSQRT:
1866 case ISD::FTRUNC: R = PromoteFloatRes_UnaryOp(N); break;
1867
1868 // Binary FP Operations
1869 case ISD::FADD:
1870 case ISD::FDIV:
1871 case ISD::FMAXNAN:
1872 case ISD::FMINNAN:
1873 case ISD::FMAXNUM:
1874 case ISD::FMINNUM:
1875 case ISD::FMUL:
1876 case ISD::FPOW:
1877 case ISD::FREM:
1878 case ISD::FSUB: R = PromoteFloatRes_BinOp(N); break;
1879
1880 case ISD::FMA: // FMA is same as FMAD
1881 case ISD::FMAD: R = PromoteFloatRes_FMAD(N); break;
1882
1883 case ISD::FPOWI: R = PromoteFloatRes_FPOWI(N); break;
1884
1885 case ISD::FP_ROUND: R = PromoteFloatRes_FP_ROUND(N); break;
1886 case ISD::LOAD: R = PromoteFloatRes_LOAD(N); break;
1887 case ISD::SELECT: R = PromoteFloatRes_SELECT(N); break;
1888 case ISD::SELECT_CC: R = PromoteFloatRes_SELECT_CC(N); break;
1889
1890 case ISD::SINT_TO_FP:
1891 case ISD::UINT_TO_FP: R = PromoteFloatRes_XINT_TO_FP(N); break;
1892 case ISD::UNDEF: R = PromoteFloatRes_UNDEF(N); break;
1893
1894 }
1895
1896 if (R.getNode())
1897 SetPromotedFloat(SDValue(N, ResNo), R);
1898 }
1899
1900 // Bitcast from i16 to f16: convert the i16 to a f32 value instead.
1901 // At this point, it is not possible to determine if the bitcast value is
1902 // eventually stored to memory or promoted to f32 or promoted to a floating
1903 // point at a higher precision. Some of these cases are handled by FP_EXTEND,
1904 // STORE promotion handlers.
PromoteFloatRes_BITCAST(SDNode * N)1905 SDValue DAGTypeLegalizer::PromoteFloatRes_BITCAST(SDNode *N) {
1906 EVT VT = N->getValueType(0);
1907 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1908 return DAG.getNode(GetPromotionOpcode(VT, NVT), SDLoc(N), NVT,
1909 N->getOperand(0));
1910 }
1911
PromoteFloatRes_ConstantFP(SDNode * N)1912 SDValue DAGTypeLegalizer::PromoteFloatRes_ConstantFP(SDNode *N) {
1913 ConstantFPSDNode *CFPNode = cast<ConstantFPSDNode>(N);
1914 EVT VT = N->getValueType(0);
1915 SDLoc DL(N);
1916
1917 // Get the (bit-cast) APInt of the APFloat and build an integer constant
1918 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits());
1919 SDValue C = DAG.getConstant(CFPNode->getValueAPF().bitcastToAPInt(), DL,
1920 IVT);
1921
1922 // Convert the Constant to the desired FP type
1923 // FIXME We might be able to do the conversion during compilation and get rid
1924 // of it from the object code
1925 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1926 return DAG.getNode(GetPromotionOpcode(VT, NVT), DL, NVT, C);
1927 }
1928
1929 // If the Index operand is a constant, try to redirect the extract operation to
1930 // the correct legalized vector. If not, bit-convert the input vector to
1931 // equivalent integer vector. Extract the element as an (bit-cast) integer
1932 // value and convert it to the promoted type.
PromoteFloatRes_EXTRACT_VECTOR_ELT(SDNode * N)1933 SDValue DAGTypeLegalizer::PromoteFloatRes_EXTRACT_VECTOR_ELT(SDNode *N) {
1934 SDLoc DL(N);
1935
1936 // If the index is constant, try to extract the value from the legalized
1937 // vector type.
1938 if (isa<ConstantSDNode>(N->getOperand(1))) {
1939 SDValue Vec = N->getOperand(0);
1940 SDValue Idx = N->getOperand(1);
1941 EVT VecVT = Vec->getValueType(0);
1942 EVT EltVT = VecVT.getVectorElementType();
1943
1944 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1945
1946 switch (getTypeAction(VecVT)) {
1947 default: break;
1948 case TargetLowering::TypeScalarizeVector: {
1949 SDValue Res = GetScalarizedVector(N->getOperand(0));
1950 ReplaceValueWith(SDValue(N, 0), Res);
1951 return SDValue();
1952 }
1953 case TargetLowering::TypeWidenVector: {
1954 Vec = GetWidenedVector(Vec);
1955 SDValue Res = DAG.getNode(N->getOpcode(), DL, EltVT, Vec, Idx);
1956 ReplaceValueWith(SDValue(N, 0), Res);
1957 return SDValue();
1958 }
1959 case TargetLowering::TypeSplitVector: {
1960 SDValue Lo, Hi;
1961 GetSplitVector(Vec, Lo, Hi);
1962
1963 uint64_t LoElts = Lo.getValueType().getVectorNumElements();
1964 SDValue Res;
1965 if (IdxVal < LoElts)
1966 Res = DAG.getNode(N->getOpcode(), DL, EltVT, Lo, Idx);
1967 else
1968 Res = DAG.getNode(N->getOpcode(), DL, EltVT, Hi,
1969 DAG.getConstant(IdxVal - LoElts, DL,
1970 Idx.getValueType()));
1971 ReplaceValueWith(SDValue(N, 0), Res);
1972 return SDValue();
1973 }
1974
1975 }
1976 }
1977
1978 // Bit-convert the input vector to the equivalent integer vector
1979 SDValue NewOp = BitConvertVectorToIntegerVector(N->getOperand(0));
1980 EVT IVT = NewOp.getValueType().getVectorElementType();
1981
1982 // Extract the element as an (bit-cast) integer value
1983 SDValue NewVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, IVT,
1984 NewOp, N->getOperand(1));
1985
1986 // Convert the element to the desired FP type
1987 EVT VT = N->getValueType(0);
1988 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1989 return DAG.getNode(GetPromotionOpcode(VT, NVT), SDLoc(N), NVT, NewVal);
1990 }
1991
1992 // FCOPYSIGN(X, Y) returns the value of X with the sign of Y. If the result
1993 // needs promotion, so does the argument X. Note that Y, if needed, will be
1994 // handled during operand promotion.
PromoteFloatRes_FCOPYSIGN(SDNode * N)1995 SDValue DAGTypeLegalizer::PromoteFloatRes_FCOPYSIGN(SDNode *N) {
1996 EVT VT = N->getValueType(0);
1997 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1998 SDValue Op0 = GetPromotedFloat(N->getOperand(0));
1999
2000 SDValue Op1 = N->getOperand(1);
2001
2002 return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op0, Op1);
2003 }
2004
2005 // Unary operation where the result and the operand have PromoteFloat type
2006 // action. Construct a new SDNode with the promoted float value of the old
2007 // operand.
PromoteFloatRes_UnaryOp(SDNode * N)2008 SDValue DAGTypeLegalizer::PromoteFloatRes_UnaryOp(SDNode *N) {
2009 EVT VT = N->getValueType(0);
2010 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2011 SDValue Op = GetPromotedFloat(N->getOperand(0));
2012
2013 return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op);
2014 }
2015
2016 // Binary operations where the result and both operands have PromoteFloat type
2017 // action. Construct a new SDNode with the promoted float values of the old
2018 // operands.
PromoteFloatRes_BinOp(SDNode * N)2019 SDValue DAGTypeLegalizer::PromoteFloatRes_BinOp(SDNode *N) {
2020 EVT VT = N->getValueType(0);
2021 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2022 SDValue Op0 = GetPromotedFloat(N->getOperand(0));
2023 SDValue Op1 = GetPromotedFloat(N->getOperand(1));
2024 return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op0, Op1, N->getFlags());
2025 }
2026
PromoteFloatRes_FMAD(SDNode * N)2027 SDValue DAGTypeLegalizer::PromoteFloatRes_FMAD(SDNode *N) {
2028 EVT VT = N->getValueType(0);
2029 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2030 SDValue Op0 = GetPromotedFloat(N->getOperand(0));
2031 SDValue Op1 = GetPromotedFloat(N->getOperand(1));
2032 SDValue Op2 = GetPromotedFloat(N->getOperand(2));
2033
2034 return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op0, Op1, Op2);
2035 }
2036
2037 // Promote the Float (first) operand and retain the Integer (second) operand
PromoteFloatRes_FPOWI(SDNode * N)2038 SDValue DAGTypeLegalizer::PromoteFloatRes_FPOWI(SDNode *N) {
2039 EVT VT = N->getValueType(0);
2040 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2041 SDValue Op0 = GetPromotedFloat(N->getOperand(0));
2042 SDValue Op1 = N->getOperand(1);
2043
2044 return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op0, Op1);
2045 }
2046
2047 // Explicit operation to reduce precision. Reduce the value to half precision
2048 // and promote it back to the legal type.
PromoteFloatRes_FP_ROUND(SDNode * N)2049 SDValue DAGTypeLegalizer::PromoteFloatRes_FP_ROUND(SDNode *N) {
2050 SDLoc DL(N);
2051
2052 SDValue Op = N->getOperand(0);
2053 EVT VT = N->getValueType(0);
2054 EVT OpVT = Op->getValueType(0);
2055 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2056 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits());
2057
2058 // Round promoted float to desired precision
2059 SDValue Round = DAG.getNode(GetPromotionOpcode(OpVT, VT), DL, IVT, Op);
2060 // Promote it back to the legal output type
2061 return DAG.getNode(GetPromotionOpcode(VT, NVT), DL, NVT, Round);
2062 }
2063
PromoteFloatRes_LOAD(SDNode * N)2064 SDValue DAGTypeLegalizer::PromoteFloatRes_LOAD(SDNode *N) {
2065 LoadSDNode *L = cast<LoadSDNode>(N);
2066 EVT VT = N->getValueType(0);
2067
2068 // Load the value as an integer value with the same number of bits
2069 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits());
2070 SDValue newL = DAG.getLoad(L->getAddressingMode(), L->getExtensionType(),
2071 IVT, SDLoc(N), L->getChain(), L->getBasePtr(),
2072 L->getOffset(), L->getPointerInfo(), IVT, L->isVolatile(),
2073 L->isNonTemporal(), false, L->getAlignment(),
2074 L->getAAInfo());
2075 // Legalize the chain result by replacing uses of the old value chain with the
2076 // new one
2077 ReplaceValueWith(SDValue(N, 1), newL.getValue(1));
2078
2079 // Convert the integer value to the desired FP type
2080 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2081 return DAG.getNode(GetPromotionOpcode(VT, NVT), SDLoc(N), NVT, newL);
2082 }
2083
2084 // Construct a new SELECT node with the promoted true- and false- values.
PromoteFloatRes_SELECT(SDNode * N)2085 SDValue DAGTypeLegalizer::PromoteFloatRes_SELECT(SDNode *N) {
2086 SDValue TrueVal = GetPromotedFloat(N->getOperand(1));
2087 SDValue FalseVal = GetPromotedFloat(N->getOperand(2));
2088
2089 return DAG.getNode(ISD::SELECT, SDLoc(N), TrueVal->getValueType(0),
2090 N->getOperand(0), TrueVal, FalseVal);
2091 }
2092
2093 // Construct a new SELECT_CC node with the promoted true- and false- values.
2094 // The operands used for comparison are promoted by PromoteFloatOp_SELECT_CC.
PromoteFloatRes_SELECT_CC(SDNode * N)2095 SDValue DAGTypeLegalizer::PromoteFloatRes_SELECT_CC(SDNode *N) {
2096 SDValue TrueVal = GetPromotedFloat(N->getOperand(2));
2097 SDValue FalseVal = GetPromotedFloat(N->getOperand(3));
2098
2099 return DAG.getNode(ISD::SELECT_CC, SDLoc(N), N->getValueType(0),
2100 N->getOperand(0), N->getOperand(1), TrueVal, FalseVal,
2101 N->getOperand(4));
2102 }
2103
2104 // Construct a SDNode that transforms the SINT or UINT operand to the promoted
2105 // float type.
PromoteFloatRes_XINT_TO_FP(SDNode * N)2106 SDValue DAGTypeLegalizer::PromoteFloatRes_XINT_TO_FP(SDNode *N) {
2107 EVT VT = N->getValueType(0);
2108 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2109 return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, N->getOperand(0));
2110 }
2111
PromoteFloatRes_UNDEF(SDNode * N)2112 SDValue DAGTypeLegalizer::PromoteFloatRes_UNDEF(SDNode *N) {
2113 return DAG.getUNDEF(TLI.getTypeToTransformTo(*DAG.getContext(),
2114 N->getValueType(0)));
2115 }
2116
2117