Searched defs:FirstReg (Results 1 – 9 of 9) sorted by relevance
| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| D | AArch64InstPrinter.cpp | 1255 if (unsigned FirstReg = MRI.getSubReg(Reg, AArch64::dsub0)) in printVectorList() local
1257 else if (unsigned FirstReg = MRI.getSubReg(Reg, AArch64::qsub0)) in printVectorList() local
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | FunctionLoweringInfo.cpp | 364 unsigned FirstReg = 0; in CreateRegs() local
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| /external/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 1216 unsigned FirstReg = FirstRegs[NumRegs - 1]; in addVectorList64Operands() local
1229 unsigned FirstReg = FirstRegs[NumRegs - 1]; in addVectorList128Operands() local
3014 int64_t FirstReg = tryMatchVectorRegister(Kind, true); in parseVectorList() local
4554 int FirstReg = tryParseRegister(); in tryParseGPRSeqPair() local
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| /external/llvm/lib/CodeGen/ |
| D | AggressiveAntiDepBreaker.cpp | 487 unsigned FirstReg = 0; in ScanInstruction() local
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| /external/llvm/lib/Target/ARM/ |
| D | ARMLoadStoreOptimizer.cpp | 2009 unsigned &FirstReg, in CanFormLdStDWord()
2169 unsigned FirstReg = 0, SecondReg = 0; in RescheduleOps() local
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| D | ARMBaseInstrInfo.cpp | 2069 unsigned FirstReg = MI->getOperand(RegListIdx).getReg(); in tryFoldSPUpdateIntoPushPop() local
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 765 unsigned FirstReg = SwapOps ? FalseReg : TrueReg, in insertSelect() local
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| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 3645 const Argument *FuncArg, unsigned FirstReg, unsigned LastReg, in copyByValRegs()
3694 MachineFrameInfo *MFI, SelectionDAG &DAG, SDValue Arg, unsigned FirstReg, in passByValArg()
3844 unsigned FirstReg = 0; in HandleByVal() local
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| /external/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 3588 unsigned FirstReg = Reg; in parseVectorList() local
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