| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeTypesGeneric.cpp | 36 SDValue &Lo, SDValue &Hi) { in ExpandRes_MERGE_VALUES()
41 void DAGTypeLegalizer::ExpandRes_BITCAST(SDNode *N, SDValue &Lo, SDValue &Hi) { in ExpandRes_BITCAST()
197 SDValue &Hi) { in ExpandRes_BUILD_PAIR()
204 SDValue &Hi) { in ExpandRes_EXTRACT_ELEMENT()
216 SDValue &Hi) { in ExpandRes_EXTRACT_VECTOR_ELT()
256 SDValue &Hi) { in ExpandRes_NormalLoad()
300 void DAGTypeLegalizer::ExpandRes_VAARG(SDNode *N, SDValue &Lo, SDValue &Hi) { in ExpandRes_VAARG()
397 SDValue Lo, Hi; in ExpandOp_BUILD_VECTOR() local
415 SDValue Lo, Hi; in ExpandOp_EXTRACT_ELEMENT() local
439 SDValue Lo, Hi; in ExpandOp_INSERT_VECTOR_ELT() local
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| D | LegalizeFloatTypes.cpp | 971 SDValue Lo, Hi; in ExpandFloatResult() local
1037 SDValue &Hi) { in ExpandFloatRes_ConstantFP()
1052 SDValue &Hi) { in ExpandFloatRes_FABS()
1066 SDValue &Hi) { in ExpandFloatRes_FMINNUM()
1076 SDValue &Hi) { in ExpandFloatRes_FMAXNUM()
1086 SDValue &Hi) { in ExpandFloatRes_FADD()
1096 SDValue &Lo, SDValue &Hi) { in ExpandFloatRes_FCEIL()
1106 SDValue &Lo, SDValue &Hi) { in ExpandFloatRes_FCOPYSIGN()
1118 SDValue &Lo, SDValue &Hi) { in ExpandFloatRes_FCOS()
1128 SDValue &Hi) { in ExpandFloatRes_FDIV()
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| D | LegalizeIntegerTypes.cpp | 281 SDValue Lo, Hi; in PromoteIntRes_BITCAST() local
783 SDValue Hi = DAG.getNode(ISD::SRL, DL, Mul.getValueType(), Mul, in PromoteIntRes_XMULO() local
1032 SDValue Hi = GetPromotedInteger(N->getOperand(1)); in PromoteIntOp_BUILD_PAIR() local
1280 SDValue Lo, Hi; in ExpandIntegerResult() local
1413 SDValue &Lo, SDValue &Hi) { in ExpandShiftByConstant()
1511 ExpandShiftWithKnownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi) { in ExpandShiftWithKnownAmountBit()
1599 ExpandShiftWithUnknownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi) { in ExpandShiftWithUnknownAmountBit()
1676 SDValue &Lo, SDValue &Hi) { in ExpandIntRes_ADDSUB()
1770 SDValue &Lo, SDValue &Hi) { in ExpandIntRes_ADDSUBC()
1796 SDValue &Lo, SDValue &Hi) { in ExpandIntRes_ADDSUBE()
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| D | LegalizeTypes.cpp | 810 SDValue &Hi) { in GetExpandedInteger()
820 SDValue Hi) { in SetExpandedInteger()
837 SDValue &Hi) { in GetExpandedFloat()
847 SDValue Hi) { in SetExpandedFloat()
864 SDValue &Hi) { in GetSplitVector()
874 SDValue Hi) { in SetSplitVector()
1016 SDValue &Lo, SDValue &Hi) { in GetPairElements()
1042 SDValue DAGTypeLegalizer::JoinIntegers(SDValue Lo, SDValue Hi) { in JoinIntegers()
1151 SDValue &Lo, SDValue &Hi) { in SplitInteger()
1165 SDValue &Lo, SDValue &Hi) { in SplitInteger()
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| D | LegalizeVectorTypes.cpp | 576 SDValue Lo, Hi; in SplitVectorResult() local
704 SDValue &Hi) { in SplitVecRes_BinOp()
718 SDValue &Hi) { in SplitVecRes_TernaryOp()
734 SDValue &Hi) { in SplitVecRes_BITCAST()
791 SDValue &Hi) { in SplitVecRes_BUILD_VECTOR()
804 SDValue &Hi) { in SplitVecRes_CONCAT_VECTORS()
825 SDValue &Hi) { in SplitVecRes_EXTRACT_SUBVECTOR()
841 SDValue &Hi) { in SplitVecRes_INSERT_SUBVECTOR()
878 SDValue &Hi) { in SplitVecRes_FPOWI()
886 SDValue &Hi) { in SplitVecRes_FCOPYSIGN()
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| D | LegalizeTypes.h | 801 void GetSplitOp(SDValue Op, SDValue &Lo, SDValue &Hi) { in GetSplitOp()
830 void GetExpandedOp(SDValue Op, SDValue &Lo, SDValue &Hi) { in GetExpandedOp()
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| D | LegalizeDAG.cpp | 416 SDValue Hi = DAG.getNode(ISD::SRL, dl, VT, Val, ShiftAmount); in ExpandUnalignedStore() local
552 SDValue Lo, Hi; in ExpandUnalignedLoad() local
708 SDValue Hi = DAG.getConstant(IntVal.lshr(32).trunc(32), dl, MVT::i32); in OptimizeFloatStore() local
811 SDValue Lo, Hi; in LegalizeStoreOps() local
1019 SDValue Lo, Hi, Ch; in LegalizeLoadOps() local
2535 SDValue Hi = StackSlot; in ExpandLegalINT_TO_FP() local
2602 SDValue Hi = DAG.getNode(ISD::SRL, dl, MVT::i64, Op0, in ExpandLegalINT_TO_FP() local
3524 SDValue Lo, Hi; in ExpandNode() local
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| /external/llvm/lib/IR/ |
| D | MDBuilder.cpp | 66 MDNode *MDBuilder::createRange(const APInt &Lo, const APInt &Hi) { in createRange()
73 MDNode *MDBuilder::createRange(Constant *Lo, Constant *Hi) { in createRange()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.h | 42 Hi, enumerator
340 SDValue Hi = in getAddrGlobalLargeGOT() local
356 SDValue Hi = getTargetNode(N, Ty, DAG, MipsII::MO_ABS_HI); in getAddrNonPIC() local
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| D | Mips16ISelDAGToDAG.cpp | 49 SDNode *Lo = nullptr, *Hi = nullptr; in selectMULT() local
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| D | MipsSEISelLowering.cpp | 1228 SDValue Hi = DAG.getLoad(MVT::i32, DL, Lo.getValue(1), Ptr, in lowerLOAD() local
1253 SDValue Hi = DAG.getNode(MipsISD::ExtractElementF64, DL, MVT::i32, in lowerSTORE() local
1281 SDValue Lo, Hi; in lowerMulDiv() local
1306 SDValue Hi = DAG.getNode(MipsISD::MFHI, DL, MVT::i32, Op); in extractLOHI() local
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.h | 36 Hi, Lo, // Hi/Lo operations, typically on a global address. enumerator
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| D | SparcISelLowering.cpp | 1894 SDValue Hi = DAG.getNode(SPISD::Hi, DL, VT, withTargetFlags(Op, HiTF, DAG)); in makeHiLoPair() local
1940 SDValue Hi = makeHiLoPair(Op, SparcMCExpr::VK_Sparc_HH, in makeAddress() local
2027 SDValue Hi = DAG.getNode(SPISD::Hi, DL, PtrVT, in LowerGlobalTLSAddress() local
2061 SDValue Hi = DAG.getNode(SPISD::Hi, DL, PtrVT, in LowerGlobalTLSAddress() local
2847 SDValue Hi = DAG.getNode(hiOpc, dl, VTs, Src1Hi, Src2Hi, Lo.getValue(1)); in LowerADDC_ADDE_SUBC_SUBE() local
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 577 SDValue Hi = DAG.getNode(XCoreISD::MACCS, dl, in LowerSMUL_LOHI() local
594 SDValue Hi = DAG.getNode(XCoreISD::LMUL, dl, in LowerUMUL_LOHI() local
691 SDValue Hi = DAG.getNode(XCoreISD::MACCU, dl, in TryExpandADDWithMul() local
699 SDValue Hi = DAG.getNode(XCoreISD::MACCS, dl, in TryExpandADDWithMul() local
710 SDValue Hi = DAG.getNode(XCoreISD::MACCU, dl, in TryExpandADDWithMul() local
758 SDValue Hi = DAG.getNode(Opcode, dl, DAG.getVTList(MVT::i32, MVT::i32), in ExpandADDSUB() local
1805 SDValue Hi = DAG.getNode(XCoreISD::LMUL, dl, in PerformDAGCombine() local
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIFrameLowering.cpp | 181 unsigned Hi = TRI->getSubReg(PreloadedPrivateBufferReg, AMDGPU::sub2_sub3); in emitPrologue() local
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| D | AMDGPUISelLowering.cpp | 1222 SDValue Lo, Hi; in SplitVectorLoad() local
1366 SDValue Lo, Hi; in SplitVectorStore() local
1941 static SDValue extractF64Exponent(SDValue Hi, SDLoc SL, SelectionDAG &DAG) { in extractF64Exponent()
1968 SDValue Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, VecSrc, One); in LowerFTRUNC() local
2083 SDValue Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, BC, One); in LowerFROUND64() local
2171 SDValue Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, BC, in LowerINT_TO_FP64() local
2203 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, S0, in LowerUINT_TO_FP() local
2241 SDValue Hi = DAG.getNode(Signed ? ISD::FP_TO_SINT : ISD::FP_TO_UINT, SL, in LowerFP64_TO_INT() local
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| D | R600ISelLowering.cpp | 992 SDValue Hi = Op.getOperand(1); in LowerSHLParts() local
1028 SDValue Hi = Op.getOperand(1); in LowerSRXParts() local
1067 SDValue Hi = Op.getOperand(1); in LowerUADDSUBO() local
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| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsELFObjectWriter.cpp | 286 static void setMatch(MipsRelocationEntry &Hi, MipsRelocationEntry &Lo) { in setMatch()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.h | 72 Hi, Lo, enumerator
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 1709 SDValue Hi = DAG.getNode(Opc, dl, VT, ShOpHi, ShAmt); in LowerShiftRightParts() local
1739 SDValue Hi = DAG.getNode(Opc, dl, VT, ShOpHi, ShAmt); in LowerShiftRightParts() local
1771 SDValue Hi = DAG.getNode(NVPTXISD::FUN_SHFL_CLAMP, dl, VT, ShOpLo, ShOpHi, in LowerShiftLeftParts() local
1802 SDValue Hi = DAG.getNode(ISD::SELECT, dl, VT, Cmp, TrueVal, FalseVal); in LowerShiftLeftParts() local
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonSplitDouble.cpp | 300 static inline int32_t profitImm(unsigned Lo, unsigned Hi) { in profitImm()
338 unsigned Hi = D >> 32; in profit() local
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| /external/llvm/lib/MC/ |
| D | MCObjectStreamer.cpp | 57 void MCObjectStreamer::emitAbsoluteSymbolDiff(const MCSymbol *Hi, in emitAbsoluteSymbolDiff()
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| /external/valgrind/VEX/priv/ |
| D | host_mips_isel.c | 3048 HReg Hi, Lo; in iselFltExpr_wrk() local
3248 HReg Hi, Lo; in iselFltExpr_wrk() local
3281 HReg Hi, Lo; in iselFltExpr_wrk() local
3470 HReg Hi, Lo; in iselDblExpr_wrk() local
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| /external/llvm/include/llvm/Support/ |
| D | GCOV.h | 198 uint32_t Lo, Hi; in readInt64() local
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 3324 SDValue Hi = DAG.getTargetConstantPool(GV, PtrVT, 0, 0, AArch64II::MO_PAGE); in LowerGlobalAddress() local
3352 SDValue Hi = DAG.getTargetGlobalAddress(GV, DL, PtrVT, 0, in LowerGlobalAddress() local
4102 SDValue Hi = in LowerJumpTable() local
4139 SDValue Hi = in LowerConstantPool() local
4166 SDValue Hi = DAG.getTargetBlockAddress(BA, PtrVT, 0, AArch64II::MO_PAGE); in LowerBlockAddress() local
4442 SDValue Hi = DAG.getNode(AArch64ISD::CSEL, dl, VT, HiForBigShift, in LowerShiftRightParts() local
4487 SDValue Hi = DAG.getNode(AArch64ISD::CSEL, dl, VT, HiForBigShift, in LowerShiftLeftParts() local
8512 SDValue Lo, Hi; in performExtendCombine() local
9829 SDValue Lo, Hi; in ReplaceReductionResults() local
9941 Value *Hi = Builder.CreateExtractValue(LoHi, 1, "hi"); in emitLoadLinked() local
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