1 /* Opcode decoder for the TI MSP430 2 Copyright (C) 2012-2014 Free Software Foundation, Inc. 3 Written by DJ Delorie <dj@redhat.com> 4 5 This file is part of GDB, the GNU Debugger. 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 3 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program; if not, write to the Free Software 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 20 02110-1301, USA. */ 21 22 typedef enum 23 { 24 MSO_unknown, 25 /* Double-operand instructions - all repeat .REPEATS times. */ 26 MSO_mov, /* dest = src */ 27 MSO_add, /* dest += src */ 28 MSO_addc, /* dest += src + carry */ 29 MSO_subc, /* dest -= (src-1) + carry */ 30 MSO_sub, /* dest -= src */ 31 MSO_cmp, /* dest - src -> status */ 32 MSO_dadd, /* dest += src (as BCD) */ 33 MSO_bit, /* dest & src -> status */ 34 MSO_bic, /* dest &= ~src (bit clear) */ 35 MSO_bis, /* dest |= src (bit set, OR) */ 36 MSO_xor, /* dest ^= src */ 37 MSO_and, /* dest &= src */ 38 39 /* Single-operand instructions. */ 40 MSO_rrc, /* Rotate through carry, dest >>= .REPEATS. */ 41 MSO_swpb, /* Swap lower bytes of operand. */ 42 MSO_rra, /* Signed shift dest >>= .REPEATS. */ 43 MSO_sxt, /* Sign extend lower byte. */ 44 MSO_push, /* Push .REPEATS registers (or other op) starting at SRC going towards R0. */ 45 MSO_pop, /* Pop .REPEATS registers starting at DEST going towards R15. */ 46 MSO_call, 47 MSO_reti, 48 49 /* Jumps. */ 50 MSO_jmp, /* PC = SRC if .COND true. */ 51 52 /* Extended single-operand instructions. */ 53 MSO_rru, /* Unsigned shift right, dest >>= .REPEATS. */ 54 55 } MSP430_Opcode_ID; 56 57 typedef enum 58 { 59 MSP430_Operand_None, 60 MSP430_Operand_Immediate, 61 MSP430_Operand_Register, 62 MSP430_Operand_Indirect, 63 MSP430_Operand_Indirect_Postinc 64 } MSP430_Operand_Type; 65 66 typedef enum 67 { 68 MSR_0 = 0, 69 MSR_PC = 0, 70 MSR_SP = 1, 71 MSR_SR = 2, 72 MSR_CG = 3, 73 MSR_None = 16, 74 } MSP430_Register; 75 76 typedef struct 77 { 78 MSP430_Operand_Type type; 79 int addend; 80 MSP430_Register reg : 8; 81 MSP430_Register reg2 : 8; 82 unsigned char bit_number : 4; 83 unsigned char condition : 3; 84 } MSP430_Opcode_Operand; 85 86 typedef enum 87 { 88 MSP430_Byte = 0, 89 MSP430_Word, 90 MSP430_Addr 91 } MSP430_Size; 92 93 /* These numerically match the bit encoding. */ 94 typedef enum 95 { 96 MSC_nz = 0, 97 MSC_z, 98 MSC_nc, 99 MSC_c, 100 MSC_n, 101 MSC_ge, 102 MSC_l, 103 MSC_true, 104 } MSP430_Condition; 105 106 #define MSP430_FLAG_C 0x01 107 #define MSP430_FLAG_Z 0x02 108 #define MSP430_FLAG_N 0x04 109 #define MSP430_FLAG_V 0x80 110 111 typedef struct 112 { 113 int lineno; 114 MSP430_Opcode_ID id; 115 unsigned flags_1:8; /* These flags are set to '1' by the insn. */ 116 unsigned flags_0:8; /* These flags are set to '0' by the insn. */ 117 unsigned flags_set:8; /* These flags are set appropriately by the insn. */ 118 unsigned zc:1; /* If set, pretend the carry bit is zero. */ 119 unsigned repeat_reg:1; /* If set, count is in REG[repeats]. */ 120 unsigned ofs_430x:1; /* If set, the offset in any operand is 430x (else use 430 compatibility mode). */ 121 unsigned repeats:5; /* Contains COUNT-1, or register number. */ 122 int n_bytes; /* Opcode size in BYTES. */ 123 char * syntax; 124 MSP430_Size size; /* Operand size in BITS. */ 125 MSP430_Condition cond; 126 /* By convention, these are [0]destination, [1]source. */ 127 MSP430_Opcode_Operand op[2]; 128 } MSP430_Opcode_Decoded; 129 130 int msp430_decode_opcode (unsigned long, MSP430_Opcode_Decoded *, int (*)(void *), void *); 131