1 //===---- MipsISelDAGToDAG.h - A Dag to Dag Inst Selector for Mips --------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file defines an instruction selector for the MIPS target.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_MIPS_MIPSISELDAGTODAG_H
15 #define LLVM_LIB_TARGET_MIPS_MIPSISELDAGTODAG_H
16 
17 #include "Mips.h"
18 #include "MipsSubtarget.h"
19 #include "MipsTargetMachine.h"
20 #include "llvm/CodeGen/SelectionDAGISel.h"
21 
22 //===----------------------------------------------------------------------===//
23 // Instruction Selector Implementation
24 //===----------------------------------------------------------------------===//
25 
26 //===----------------------------------------------------------------------===//
27 // MipsDAGToDAGISel - MIPS specific code to select MIPS machine
28 // instructions for SelectionDAG operations.
29 //===----------------------------------------------------------------------===//
30 namespace llvm {
31 
32 class MipsDAGToDAGISel : public SelectionDAGISel {
33 public:
MipsDAGToDAGISel(MipsTargetMachine & TM)34   explicit MipsDAGToDAGISel(MipsTargetMachine &TM)
35       : SelectionDAGISel(TM), Subtarget(nullptr) {}
36 
37   // Pass Name
getPassName()38   const char *getPassName() const override {
39     return "MIPS DAG->DAG Pattern Instruction Selection";
40   }
41 
42   bool runOnMachineFunction(MachineFunction &MF) override;
43 
44 protected:
45   SDNode *getGlobalBaseReg();
46 
47   /// Keep a pointer to the MipsSubtarget around so that we can make the right
48   /// decision when generating code for different targets.
49   const MipsSubtarget *Subtarget;
50 
51 private:
52   // Include the pieces autogenerated from the target description.
53   #include "MipsGenDAGISel.inc"
54 
55   // Complex Pattern.
56   /// (reg + imm).
57   virtual bool selectAddrRegImm(SDValue Addr, SDValue &Base,
58                                 SDValue &Offset) const;
59 
60   // Complex Pattern.
61   /// (reg + reg).
62   virtual bool selectAddrRegReg(SDValue Addr, SDValue &Base,
63                                 SDValue &Offset) const;
64 
65   /// Fall back on this function if all else fails.
66   virtual bool selectAddrDefault(SDValue Addr, SDValue &Base,
67                                  SDValue &Offset) const;
68 
69   /// Match integer address pattern.
70   virtual bool selectIntAddr(SDValue Addr, SDValue &Base,
71                              SDValue &Offset) const;
72 
73   virtual bool selectIntAddrMM(SDValue Addr, SDValue &Base,
74                                SDValue &Offset) const;
75 
76   virtual bool selectIntAddrLSL2MM(SDValue Addr, SDValue &Base,
77                                    SDValue &Offset) const;
78 
79   /// Match addr+simm10 and addr
80   virtual bool selectIntAddrMSA(SDValue Addr, SDValue &Base,
81                                 SDValue &Offset) const;
82 
83   virtual bool selectAddr16(SDNode *Parent, SDValue N, SDValue &Base,
84                             SDValue &Offset, SDValue &Alias);
85 
86   /// \brief Select constant vector splats.
87   virtual bool selectVSplat(SDNode *N, APInt &Imm,
88                             unsigned MinSizeInBits) const;
89   /// \brief Select constant vector splats whose value fits in a uimm1.
90   virtual bool selectVSplatUimm1(SDValue N, SDValue &Imm) const;
91   /// \brief Select constant vector splats whose value fits in a uimm2.
92   virtual bool selectVSplatUimm2(SDValue N, SDValue &Imm) const;
93   /// \brief Select constant vector splats whose value fits in a uimm3.
94   virtual bool selectVSplatUimm3(SDValue N, SDValue &Imm) const;
95   /// \brief Select constant vector splats whose value fits in a uimm4.
96   virtual bool selectVSplatUimm4(SDValue N, SDValue &Imm) const;
97   /// \brief Select constant vector splats whose value fits in a uimm5.
98   virtual bool selectVSplatUimm5(SDValue N, SDValue &Imm) const;
99   /// \brief Select constant vector splats whose value fits in a uimm6.
100   virtual bool selectVSplatUimm6(SDValue N, SDValue &Imm) const;
101   /// \brief Select constant vector splats whose value fits in a uimm8.
102   virtual bool selectVSplatUimm8(SDValue N, SDValue &Imm) const;
103   /// \brief Select constant vector splats whose value fits in a simm5.
104   virtual bool selectVSplatSimm5(SDValue N, SDValue &Imm) const;
105   /// \brief Select constant vector splats whose value is a power of 2.
106   virtual bool selectVSplatUimmPow2(SDValue N, SDValue &Imm) const;
107   /// \brief Select constant vector splats whose value is the inverse of a
108   /// power of 2.
109   virtual bool selectVSplatUimmInvPow2(SDValue N, SDValue &Imm) const;
110   /// \brief Select constant vector splats whose value is a run of set bits
111   /// ending at the most significant bit
112   virtual bool selectVSplatMaskL(SDValue N, SDValue &Imm) const;
113   /// \brief Select constant vector splats whose value is a run of set bits
114   /// starting at bit zero.
115   virtual bool selectVSplatMaskR(SDValue N, SDValue &Imm) const;
116 
117   SDNode *Select(SDNode *N) override;
118 
119   virtual std::pair<bool, SDNode*> selectNode(SDNode *Node) = 0;
120 
121   // getImm - Return a target constant with the specified value.
getImm(const SDNode * Node,uint64_t Imm)122   inline SDValue getImm(const SDNode *Node, uint64_t Imm) {
123     return CurDAG->getTargetConstant(Imm, SDLoc(Node), Node->getValueType(0));
124   }
125 
126   virtual void processFunctionAfterISel(MachineFunction &MF) = 0;
127 
128   bool SelectInlineAsmMemoryOperand(const SDValue &Op,
129                                     unsigned ConstraintID,
130                                     std::vector<SDValue> &OutOps) override;
131 };
132 }
133 
134 #endif
135