1 //===-- MipsMCInstLower.cpp - Convert Mips MachineInstr to MCInst ---------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains code to lower Mips MachineInstrs to their corresponding
11 // MCInst records.
12 //
13 //===----------------------------------------------------------------------===//
14 #include "MipsMCInstLower.h"
15 #include "MCTargetDesc/MipsBaseInfo.h"
16 #include "MipsAsmPrinter.h"
17 #include "MipsInstrInfo.h"
18 #include "llvm/CodeGen/MachineFunction.h"
19 #include "llvm/CodeGen/MachineInstr.h"
20 #include "llvm/CodeGen/MachineOperand.h"
21 #include "llvm/IR/Mangler.h"
22 #include "llvm/MC/MCContext.h"
23 #include "llvm/MC/MCExpr.h"
24 #include "llvm/MC/MCInst.h"
25 #include "llvm/MC/MCStreamer.h"
26
27 using namespace llvm;
28
MipsMCInstLower(MipsAsmPrinter & asmprinter)29 MipsMCInstLower::MipsMCInstLower(MipsAsmPrinter &asmprinter)
30 : AsmPrinter(asmprinter) {}
31
Initialize(MCContext * C)32 void MipsMCInstLower::Initialize(MCContext *C) {
33 Ctx = C;
34 }
35
LowerSymbolOperand(const MachineOperand & MO,MachineOperandType MOTy,unsigned Offset) const36 MCOperand MipsMCInstLower::LowerSymbolOperand(const MachineOperand &MO,
37 MachineOperandType MOTy,
38 unsigned Offset) const {
39 MCSymbolRefExpr::VariantKind Kind;
40 const MCSymbol *Symbol;
41
42 switch(MO.getTargetFlags()) {
43 default: llvm_unreachable("Invalid target flag!");
44 case MipsII::MO_NO_FLAG: Kind = MCSymbolRefExpr::VK_None; break;
45 case MipsII::MO_GPREL: Kind = MCSymbolRefExpr::VK_Mips_GPREL; break;
46 case MipsII::MO_GOT_CALL: Kind = MCSymbolRefExpr::VK_Mips_GOT_CALL; break;
47 case MipsII::MO_GOT16: Kind = MCSymbolRefExpr::VK_Mips_GOT16; break;
48 case MipsII::MO_GOT: Kind = MCSymbolRefExpr::VK_Mips_GOT; break;
49 case MipsII::MO_ABS_HI: Kind = MCSymbolRefExpr::VK_Mips_ABS_HI; break;
50 case MipsII::MO_ABS_LO: Kind = MCSymbolRefExpr::VK_Mips_ABS_LO; break;
51 case MipsII::MO_TLSGD: Kind = MCSymbolRefExpr::VK_Mips_TLSGD; break;
52 case MipsII::MO_TLSLDM: Kind = MCSymbolRefExpr::VK_Mips_TLSLDM; break;
53 case MipsII::MO_DTPREL_HI: Kind = MCSymbolRefExpr::VK_Mips_DTPREL_HI; break;
54 case MipsII::MO_DTPREL_LO: Kind = MCSymbolRefExpr::VK_Mips_DTPREL_LO; break;
55 case MipsII::MO_GOTTPREL: Kind = MCSymbolRefExpr::VK_Mips_GOTTPREL; break;
56 case MipsII::MO_TPREL_HI: Kind = MCSymbolRefExpr::VK_Mips_TPREL_HI; break;
57 case MipsII::MO_TPREL_LO: Kind = MCSymbolRefExpr::VK_Mips_TPREL_LO; break;
58 case MipsII::MO_GPOFF_HI: Kind = MCSymbolRefExpr::VK_Mips_GPOFF_HI; break;
59 case MipsII::MO_GPOFF_LO: Kind = MCSymbolRefExpr::VK_Mips_GPOFF_LO; break;
60 case MipsII::MO_GOT_DISP: Kind = MCSymbolRefExpr::VK_Mips_GOT_DISP; break;
61 case MipsII::MO_GOT_PAGE: Kind = MCSymbolRefExpr::VK_Mips_GOT_PAGE; break;
62 case MipsII::MO_GOT_OFST: Kind = MCSymbolRefExpr::VK_Mips_GOT_OFST; break;
63 case MipsII::MO_HIGHER: Kind = MCSymbolRefExpr::VK_Mips_HIGHER; break;
64 case MipsII::MO_HIGHEST: Kind = MCSymbolRefExpr::VK_Mips_HIGHEST; break;
65 case MipsII::MO_GOT_HI16: Kind = MCSymbolRefExpr::VK_Mips_GOT_HI16; break;
66 case MipsII::MO_GOT_LO16: Kind = MCSymbolRefExpr::VK_Mips_GOT_LO16; break;
67 case MipsII::MO_CALL_HI16: Kind = MCSymbolRefExpr::VK_Mips_CALL_HI16; break;
68 case MipsII::MO_CALL_LO16: Kind = MCSymbolRefExpr::VK_Mips_CALL_LO16; break;
69 }
70
71 switch (MOTy) {
72 case MachineOperand::MO_MachineBasicBlock:
73 Symbol = MO.getMBB()->getSymbol();
74 break;
75
76 case MachineOperand::MO_GlobalAddress:
77 Symbol = AsmPrinter.getSymbol(MO.getGlobal());
78 Offset += MO.getOffset();
79 break;
80
81 case MachineOperand::MO_BlockAddress:
82 Symbol = AsmPrinter.GetBlockAddressSymbol(MO.getBlockAddress());
83 Offset += MO.getOffset();
84 break;
85
86 case MachineOperand::MO_ExternalSymbol:
87 Symbol = AsmPrinter.GetExternalSymbolSymbol(MO.getSymbolName());
88 Offset += MO.getOffset();
89 break;
90
91 case MachineOperand::MO_MCSymbol:
92 Symbol = MO.getMCSymbol();
93 Offset += MO.getOffset();
94 break;
95
96 case MachineOperand::MO_JumpTableIndex:
97 Symbol = AsmPrinter.GetJTISymbol(MO.getIndex());
98 break;
99
100 case MachineOperand::MO_ConstantPoolIndex:
101 Symbol = AsmPrinter.GetCPISymbol(MO.getIndex());
102 Offset += MO.getOffset();
103 break;
104
105 default:
106 llvm_unreachable("<unknown operand type>");
107 }
108
109 const MCSymbolRefExpr *MCSym = MCSymbolRefExpr::create(Symbol, Kind, *Ctx);
110
111 if (!Offset)
112 return MCOperand::createExpr(MCSym);
113
114 // Assume offset is never negative.
115 assert(Offset > 0);
116
117 const MCConstantExpr *OffsetExpr = MCConstantExpr::create(Offset, *Ctx);
118 const MCBinaryExpr *Add = MCBinaryExpr::createAdd(MCSym, OffsetExpr, *Ctx);
119 return MCOperand::createExpr(Add);
120 }
121
122 /*
123 static void CreateMCInst(MCInst& Inst, unsigned Opc, const MCOperand &Opnd0,
124 const MCOperand &Opnd1,
125 const MCOperand &Opnd2 = MCOperand()) {
126 Inst.setOpcode(Opc);
127 Inst.addOperand(Opnd0);
128 Inst.addOperand(Opnd1);
129 if (Opnd2.isValid())
130 Inst.addOperand(Opnd2);
131 }
132 */
133
LowerOperand(const MachineOperand & MO,unsigned offset) const134 MCOperand MipsMCInstLower::LowerOperand(const MachineOperand &MO,
135 unsigned offset) const {
136 MachineOperandType MOTy = MO.getType();
137
138 switch (MOTy) {
139 default: llvm_unreachable("unknown operand type");
140 case MachineOperand::MO_Register:
141 // Ignore all implicit register operands.
142 if (MO.isImplicit()) break;
143 return MCOperand::createReg(MO.getReg());
144 case MachineOperand::MO_Immediate:
145 return MCOperand::createImm(MO.getImm() + offset);
146 case MachineOperand::MO_MachineBasicBlock:
147 case MachineOperand::MO_GlobalAddress:
148 case MachineOperand::MO_ExternalSymbol:
149 case MachineOperand::MO_MCSymbol:
150 case MachineOperand::MO_JumpTableIndex:
151 case MachineOperand::MO_ConstantPoolIndex:
152 case MachineOperand::MO_BlockAddress:
153 return LowerSymbolOperand(MO, MOTy, offset);
154 case MachineOperand::MO_RegisterMask:
155 break;
156 }
157
158 return MCOperand();
159 }
160
createSub(MachineBasicBlock * BB1,MachineBasicBlock * BB2,MCSymbolRefExpr::VariantKind Kind) const161 MCOperand MipsMCInstLower::createSub(MachineBasicBlock *BB1,
162 MachineBasicBlock *BB2,
163 MCSymbolRefExpr::VariantKind Kind) const {
164 const MCSymbolRefExpr *Sym1 = MCSymbolRefExpr::create(BB1->getSymbol(), *Ctx);
165 const MCSymbolRefExpr *Sym2 = MCSymbolRefExpr::create(BB2->getSymbol(), *Ctx);
166 const MCBinaryExpr *Sub = MCBinaryExpr::createSub(Sym1, Sym2, *Ctx);
167
168 return MCOperand::createExpr(MipsMCExpr::create(Kind, Sub, *Ctx));
169 }
170
171 void MipsMCInstLower::
lowerLongBranchLUi(const MachineInstr * MI,MCInst & OutMI) const172 lowerLongBranchLUi(const MachineInstr *MI, MCInst &OutMI) const {
173 OutMI.setOpcode(Mips::LUi);
174
175 // Lower register operand.
176 OutMI.addOperand(LowerOperand(MI->getOperand(0)));
177
178 // Create %hi($tgt-$baltgt).
179 OutMI.addOperand(createSub(MI->getOperand(1).getMBB(),
180 MI->getOperand(2).getMBB(),
181 MCSymbolRefExpr::VK_Mips_ABS_HI));
182 }
183
184 void MipsMCInstLower::
lowerLongBranchADDiu(const MachineInstr * MI,MCInst & OutMI,int Opcode,MCSymbolRefExpr::VariantKind Kind) const185 lowerLongBranchADDiu(const MachineInstr *MI, MCInst &OutMI, int Opcode,
186 MCSymbolRefExpr::VariantKind Kind) const {
187 OutMI.setOpcode(Opcode);
188
189 // Lower two register operands.
190 for (unsigned I = 0, E = 2; I != E; ++I) {
191 const MachineOperand &MO = MI->getOperand(I);
192 OutMI.addOperand(LowerOperand(MO));
193 }
194
195 // Create %lo($tgt-$baltgt) or %hi($tgt-$baltgt).
196 OutMI.addOperand(createSub(MI->getOperand(2).getMBB(),
197 MI->getOperand(3).getMBB(), Kind));
198 }
199
lowerLongBranch(const MachineInstr * MI,MCInst & OutMI) const200 bool MipsMCInstLower::lowerLongBranch(const MachineInstr *MI,
201 MCInst &OutMI) const {
202 switch (MI->getOpcode()) {
203 default:
204 return false;
205 case Mips::LONG_BRANCH_LUi:
206 lowerLongBranchLUi(MI, OutMI);
207 return true;
208 case Mips::LONG_BRANCH_ADDiu:
209 lowerLongBranchADDiu(MI, OutMI, Mips::ADDiu,
210 MCSymbolRefExpr::VK_Mips_ABS_LO);
211 return true;
212 case Mips::LONG_BRANCH_DADDiu:
213 unsigned TargetFlags = MI->getOperand(2).getTargetFlags();
214 if (TargetFlags == MipsII::MO_ABS_HI)
215 lowerLongBranchADDiu(MI, OutMI, Mips::DADDiu,
216 MCSymbolRefExpr::VK_Mips_ABS_HI);
217 else if (TargetFlags == MipsII::MO_ABS_LO)
218 lowerLongBranchADDiu(MI, OutMI, Mips::DADDiu,
219 MCSymbolRefExpr::VK_Mips_ABS_LO);
220 else
221 report_fatal_error("Unexpected flags for LONG_BRANCH_DADDiu");
222 return true;
223 }
224 }
225
Lower(const MachineInstr * MI,MCInst & OutMI) const226 void MipsMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
227 if (lowerLongBranch(MI, OutMI))
228 return;
229
230 OutMI.setOpcode(MI->getOpcode());
231
232 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
233 const MachineOperand &MO = MI->getOperand(i);
234 MCOperand MCOp = LowerOperand(MO);
235
236 if (MCOp.isValid())
237 OutMI.addOperand(MCOp);
238 }
239 }
240
241