| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonExpandPredSpillCode.cpp | 105 MachineOperand &Op4 = MI->getOperand(4); in runOnMachineFunction() local
147 MachineOperand &Op4 = MI->getOperand(4); // Modifier value. in runOnMachineFunction() local
189 MachineOperand &Op4 = MI->getOperand(4); // Modifier value. in runOnMachineFunction() local
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| /external/llvm/lib/Target/XCore/Disassembler/ |
| D | XCoreDisassembler.cpp | 648 unsigned Op1, Op2, Op3, Op4, Op5, Op6; in DecodeL6RInstruction() local
682 unsigned Op1, Op2, Op3, Op4, Op5; in DecodeL5RInstruction() local
703 unsigned Op4 = fieldFromInstruction(Insn, 16, 4); in DecodeL4RSrcDstInstruction() local
722 unsigned Op4 = fieldFromInstruction(Insn, 16, 4); in DecodeL4RSrcDstSrcDstInstruction() local
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| /external/opencv3/modules/cudev/include/opencv2/cudev/warp/detail/ |
| D | reduce.hpp | 162 … const tuple<Op0, Op1, Op2, Op3, Op4, Op5, Op6, Op7, Op8, Op9>& op) in merge() argument
182 … const tuple<Op0, Op1, Op2, Op3, Op4, Op5, Op6, Op7, Op8, Op9>& op) in mergeShfl() argument
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| /external/opencv3/modules/cudev/include/opencv2/cudev/block/detail/ |
| D | reduce.hpp | 191 … const tuple<Op0, Op1, Op2, Op3, Op4, Op5, Op6, Op7, Op8, Op9>& op) in merge() argument
211 … const tuple<Op0, Op1, Op2, Op3, Op4, Op5, Op6, Op7, Op8, Op9>& op) in mergeShfl() argument
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| /external/opencv3/modules/core/include/opencv2/core/cuda/detail/ |
| D | reduce.hpp | 173 … const thrust::tuple<Op0, Op1, Op2, Op3, Op4, Op5, Op6, Op7, Op8, Op9>& op) in merge() argument
182 … const thrust::tuple<Op0, Op1, Op2, Op3, Op4, Op5, Op6, Op7, Op8, Op9>& op) in mergeShfl() argument
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| /external/opencv3/modules/cudev/include/opencv2/cudev/block/ |
| D | reduce.hpp | 75 … const tuple<Op0, Op1, Op2, Op3, Op4, Op5, Op6, Op7, Op8, Op9>& op) in blockReduce() argument
|
| /external/opencv3/modules/cudev/include/opencv2/cudev/warp/ |
| D | reduce.hpp | 73 … const tuple<Op0, Op1, Op2, Op3, Op4, Op5, Op6, Op7, Op8, Op9>& op) in warpReduce() argument
|
| /external/opencv3/modules/core/include/opencv2/core/cuda/ |
| D | reduce.hpp | 70 … const thrust::tuple<Op0, Op1, Op2, Op3, Op4, Op5, Op6, Op7, Op8, Op9>& op) in reduce() argument
|
| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelDAGToDAG.cpp | 1243 SDValue Op4 = Node->getOperand(4); in Select() local
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| /external/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 3874 AArch64Operand &Op4 = static_cast<AArch64Operand &>(*Operands[4]); in MatchAndEmitInstruction() local
3938 AArch64Operand &Op4 = static_cast<AArch64Operand &>(*Operands[4]); in MatchAndEmitInstruction() local
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 2988 SDValue Op0, Op1, Op2, Op3, Op4; in SelectInlineAsmMemoryOperand() local
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAG.cpp | 5773 SDValue Op3, SDValue Op4) { in UpdateNodeOperands()
5780 SDValue Op3, SDValue Op4, SDValue Op5) { in UpdateNodeOperands()
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| /external/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 5405 auto &Op4 = static_cast<ARMOperand &>(*Operands[4]); in tryConvertingToTwoOperandForm() local
|