1;; -*-asm-*-
2
3	TABLE=0x8000
4	RZ=r63
5
6	.macro FAIL
7	mov	r0,#1
8	trap	3
9	.endm
10
11	.macro PASS
12	mov	r0,#0
13	trap	3
14	.endm
15
16
17	.macro VERIFY ra,rb,ref,label
18	sub	\ra,\rb,\ref
19	beq	\label
20	FAIL
21	.endm
22
23
24/*****************************************/
25/*INITIALIZING REGISTERS                 */
26/*****************************************/
27/*Check that sum is correct*/
28START:	MOV R0, #TABLE   ; //Setting R0 to TABLE
29	LSL R0,R0,#2	 ; //Create 00020000
30
31	;; Load r1.63 with 1..63
32	.irpc num,63
33	mov r\num,#\num
34	.endr
35
36
37	;; Sum the registers
38	.irpc num,62
39	add r63,r63,r\num
40	.endr
41
42	mov r62,#2016	 ;//Correct sum of 1..63 = 63*32 + 63
43	VERIFY	r63,r63,R62,BRANCH1;//CHECK SUM
44
45
46/*****************************************/
47/*BRANCHING                              */
48/*****************************************/
49//Check that all condition codes work
50BRANCH1:	BEQ  BRANCH2     ; //taken
51	FAIL	         ;
52	FAIL		 ;
53	FAIL		 ;
54	FAIL             ;
55BRANCH2:	BNE  FAIL_BRANCH ; //not taken
56BRANCH3:	BGT  FAIL_BRANCH ; //not taken
57BRANCH4:	BGTE BRANCH5     ; //taken
58	FAIL		;
59BRANCH5:	BLTE BRANCH6	; //taken
60	FAIL		;
61BRANCH6:	BLT  FAIL_BRANCH ; //not taken
62BRANCH8:	B    LONGJUMP    ; //taken
63	FAIL		 ;
64RETURN:	bl  FUNCTION	 ; //jump to subroutine
65	MOV R63,JARLAB   ;//REGISTER JUMP
66	JR  R63		 ;
67	FAIL		 ;
68JARLAB:	MOV R63,FUNCTION ; //REGISTER CALL
69	JALR R63		 ; //16 bit
70        B    NEXT	 ; //jump over fail
71	FAIL		;
72
73FAIL_BRANCH:	FAIL	; //fail branch
74
75/*****************************************/
76/*LOAD-STORE DISPLACEMENT                */
77/*****************************************/
78//Check max displacement value(0xf)
79//Check that offset is correct
80//all load/stores are aligned
81//this gives greater range(2 more bits)
82//offset is shifted by 2x bits
83
84NEXT:	STRB R4,[R0,#0x0] ;//Store Byte
85	LDRB R63,[R0,#0x0] ;//Load Byte
86	VERIFY	R63,R63,R4,STOREB  ;
87
88STOREB:	STRB R5,[R0,#0xf] ;//Store Byte
89	LDRB R63,[R0,#0xf] ;//Load Byte
90	VERIFY	R63,R63,R5,STORES  ;
91
92STORES:	STRH R4,[R0,#0x0] ;//Store Short
93	LDRH R63,[R0,#0x0] ;//Load Short
94	VERIFY	R63,R63,R4,STORES2  ;
95
96STORES2:	STRH R5,[R0,#0xe] ;//Store Short
97	LDRH R63,[R0,#0xe] ;//Load Short
98	VERIFY	R63,R63,R5,STORE  ;
99
100STORE:	STR  R4,[R0,#0x0] ;//Store Word
101	LDR  R63,[R0,#0x0] ;//Load Word
102	VERIFY	R63,R63,R4,STORE2  ;
103
104STORE2:	STR  R5,[R0,#0xc] ;//Store Word
105	LDR  R63,[R0,#0xc] ;//Load Word
106	VERIFY	R63,R63,R5,STOREBI ;
107
108
109/*****************************************/
110/*LOAD-STORE INDEX                       */
111/*****************************************/
112
113STOREBI:	STRB R4,[R0,R4]	 ;//Store Word
114	LDRB R63,[R0,R4]	 ;//Load Word
115	VERIFY	R63,R63,R4,STORESI	;
116
117STORESI:	STRH R5,[R0,R4]	 ;//Store Word
118	LDRH R63,[R0,R4]	 ;//Load Word
119	VERIFY	R63,R63,R5,STOREI	 ;
120
121STOREI:	STR  R6,[R0,R4]	 ;//Store Word
122	LDR  R63,[R0,R4]	 ;//Load Word
123	VERIFY	R63,R63,R6,PMB	 ;
124
125/*****************************************/
126/*LOAD-STORE POSTMODIFY                  */
127/*****************************************/
128
129PMB:	STRB R4,[R0],R4	 ;//Store Word
130	SUB  R0,R0,#0x4	 ;//restoring R0
131	LDRB R63,[R0],R4	 ;//Load Word
132	SUB  R0,R0,#0x4	 ;//restoring R0
133	VERIFY	R63,R63,R4,PMS	 ;
134
135PMS:	STRH R5,[R0],R4	 ;//Store Word
136	SUB  R0,R0,#0x4	 ;//restoring R0
137	LDRH R63,[R0],R4	 ;//Load Word
138	VERIFY	R63,R63,R5,PM	 ;
139
140PM:	SUB  R0,R0,#0x4	 ;//restoring R0
141	STR  R6,[R0],R4	 ;//Store Word
142	SUB  R0,R0,#0x4	 ;//restoring R0
143	LDR  R63,[R0],R4	 ;//Load Word
144	SUB  R0,R0,#0x4	 ;//restoring R0
145	VERIFY	R63,R63,R6,MOVLAB	 ;
146
147
148
149/*****************************************/
150/*IMMEDIATE LOAD                         */
151/*****************************************/
152MOVLAB:	MOV R63,#0xFF;
153	MOV R1,#0xFF;
154	VERIFY	R63,R63,R1,ADDLAB	;
155
156/*****************************************/
157/*2 REG ADD/SUB PROCESSING               */
158/*****************************************/
159ADDLAB:	ADD R63,R2,#3;	//2+3=5
160	VERIFY	R63,R63,#5,SUBLAB	;
161SUBLAB:	SUB R63,R2,#1;	//2+1=1
162	VERIFY	R63,R63,#1,LSRLAB	;
163
164/*****************************************/
165/*SHIFTS                                 */
166/*****************************************/
167//Note ASR does not work
168
169	//Immediates
170LSRLAB:	LSR R63,R6,#0x2   ; //6>>2=1
171	VERIFY	R63,R63,#1,LSLLAB	 ;
172LSLLAB:	LSL R63,R3,#0x2   ; //3<<2=12
173	VERIFY	R63,R63,#12,LSRILAB	;
174	//Registers
175LSRILAB:	LSR R63,R6,R2     ; //6>>2=1
176	VERIFY	R63,R63,#1,LSLILAB	 ;
177LSLILAB:	LSL R63,R3,R2     ; //3<<2=12
178	VERIFY	R63,R63,#12,ORRLAB	;
179
180
181/*****************************************/
182/*LOGICAL                                */
183/*****************************************/
184ORRLAB:	ORR R5,R3,R4     ; //0x3 | 0x4 -->0x7
185	VERIFY	R63,R5,#7,ANDLAB	 ;
186ANDLAB:	AND R5,R3,R4     ; //0x3 & 0x4 -->0
187	VERIFY	R63,R5,#0,EORLAB	 ;
188EORLAB:	EOR R5,R3,R2     ; //0x3 ^ 0x2 -->1
189	VERIFY	R63,R5,#1,ADD3LAB	 ;
190
191
192/****************************************/
193/*3-REGISTER ADD/SUB                     */
194/*****************************************/
195ADD3LAB:	ADD R63,R2,R3    ; //3+2=5
196	VERIFY	R63,R63,#5,SUB3LAB	 ;
197SUB3LAB:	SUB R63,R6,R4    ; //6-4=2
198	VERIFY	R63,R63,#2,MOVRLAB	 ;
199
200/*****************************************/
201/*MOVE REGISTER                          */
202/*****************************************/
203MOVRLAB:	MOV R63,R2	;
204	VERIFY	R63,R63,#2,NOPLAB	 ;
205
206/*****************************************/
207/*MOVE TO/FROM SPECIAL REGISTER          */
208/*****************************************/
209MOVTFLAB:	MOVTS status,R0	;
210	MOVFS R63,status	;
211	VERIFY	R63,R63,R0,MOVTFLAB	;
212
213
214/*****************************************/
215/*NOP                                    */
216/*****************************************/
217NOPLAB:	NOP		;
218	NOP		;
219	NOP		;
220	NOP		;
221
222/*****************************************/
223/*PASS INDICATOR                         */
224/*****************************************/
225PASSED:	PASS;
226	IDLE;
227/*****************************************/
228/*FAIL INDICATOR                         */
229/*****************************************/
230FAILED:	FAIL;
231	IDLE;
232
233/*****************************************/
234/*LONG JUMP INDICATOR                    */
235/*****************************************/
236LONGJUMP:	B RETURN; //jump back to next
237/*****************************************/
238/*SUBROUTINE                             */
239/*****************************************/
240FUNCTION:	RTS;      //return from subroutine
241