| /external/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 1857 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in SelectVLD() local
1984 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in SelectVST() local
2148 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in SelectVLDSTLane() local
2244 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in SelectVLDDup() local
2347 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in SelectV6T2BitfieldExtractOp() local
2391 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in SelectV6T2BitfieldExtractOp() local
2410 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in SelectV6T2BitfieldExtractOp() local
2582 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in Select() local
2599 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in Select() local
3834 unsigned Reg0 = cast<RegisterSDNode>(V0)->getReg(); in SelectInlineAsm() local
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| D | Thumb2SizeReduction.cpp | 658 unsigned Reg0 = MI->getOperand(0).getReg(); in ReduceTo2Addr() local
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| D | ARMAsmPrinter.cpp | 301 unsigned Reg0 = TRI->getSubReg(RegBegin, ARM::gsub_0); in PrintAsmOperand() local
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonPeephole.cpp | 248 unsigned Reg0 = Op0.getReg(); in runOnMachineFunction() local
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelDAGToDAG.cpp | 226 unsigned Reg0 = cast<RegisterSDNode>(V0)->getReg(); in SelectInlineAsm() local
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| /external/llvm/lib/Target/Mips/ |
| D | MipsSEFrameLowering.cpp | 440 unsigned Reg0 = in emitPrologue() local
458 unsigned Reg0 = MRI->getDwarfRegNum(Reg, true); in emitPrologue() local
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| /external/llvm/lib/Target/ARM/InstPrinter/ |
| D | ARMInstPrinter.cpp | 1459 unsigned Reg0 = MRI.getSubReg(Reg, ARM::dsub_0); in printVectorListTwo() local
1472 unsigned Reg0 = MRI.getSubReg(Reg, ARM::dsub_0); in printVectorListTwoSpaced() local
1527 unsigned Reg0 = MRI.getSubReg(Reg, ARM::dsub_0); in printVectorListTwoAllLanes() local
1574 unsigned Reg0 = MRI.getSubReg(Reg, ARM::dsub_0); in printVectorListTwoSpacedAllLanes() local
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| /external/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 1438 void emitRX(unsigned Opcode, unsigned Reg0, MCOperand Op1, SMLoc IDLoc, in emitRX()
1448 void emitRI(unsigned Opcode, unsigned Reg0, int32_t Imm, SMLoc IDLoc, in emitRI()
1453 void emitRR(unsigned Opcode, unsigned Reg0, unsigned Reg1, SMLoc IDLoc, in emitRR()
1468 void emitR(unsigned Opcode, unsigned Reg0, SMLoc IDLoc, in emitR()
1477 void emitRRX(unsigned Opcode, unsigned Reg0, unsigned Reg1, MCOperand Op2, in emitRRX()
1488 void emitRRR(unsigned Opcode, unsigned Reg0, unsigned Reg1, unsigned Reg2, in emitRRR()
1494 void emitRRI(unsigned Opcode, unsigned Reg0, unsigned Reg1, int16_t Imm, in emitRRI()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 348 unsigned Reg0 = MI->getOperand(0).getReg(); in commuteInstructionImpl() local
378 unsigned Reg0 = ChangeReg0 ? Reg2 : MI->getOperand(0).getReg(); in commuteInstructionImpl() local
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| /external/llvm/include/llvm/MC/ |
| D | MCRegisterInfo.h | 599 uint16_t Reg0; variable
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| /external/llvm/lib/CodeGen/ |
| D | TargetInstrInfo.cpp | 139 unsigned Reg0 = HasDef ? MI->getOperand(0).getReg() : 0; in commuteInstructionImpl() local
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| D | RegisterCoalescer.cpp | 1891 unsigned Reg0; in valuesIdentical() local
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrInfo.cpp | 5656 unsigned Reg0 = HasDef ? MI->getOperand(0).getReg() : 0; in foldMemoryOperandImpl() local
|