| /external/llvm/lib/Target/AArch64/ |
| D | AArch64FastISel.cpp | 324 unsigned ResultReg = createResultReg(&AArch64::GPR64spRegClass); in fastMaterializeAlloca() local
347 unsigned ResultReg = createResultReg(RC); in materializeInt() local
384 unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT)); in materializeFP() local
404 unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT)); in materializeFP() local
428 unsigned ResultReg; in materializeGV() local
985 unsigned ResultReg = createResultReg(&AArch64::GPR64spRegClass); in simplifyAddress() local
996 unsigned ResultReg = 0; in simplifyAddress() local
1034 unsigned ResultReg; in simplifyAddress() local
1141 unsigned ResultReg = 0; in emitAddSub() local
1262 unsigned ResultReg; in emitAddSub_rr() local
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| D | AArch64InstrInfo.cpp | 2623 unsigned ResultReg = Root.getOperand(0).getReg(); in genMadd() local
2673 unsigned ResultReg = Root.getOperand(0).getReg(); in genMaddR() local
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| /external/llvm/lib/Target/X86/ |
| D | X86FastISel.cpp | 348 MachineMemOperand *MMO, unsigned &ResultReg, in X86FastEmitLoad()
571 unsigned &ResultReg) { in X86FastEmitExtend()
1149 unsigned ResultReg = 0; in X86SelectLoad() local
1247 unsigned ResultReg = 0; in X86SelectCmp() local
1337 unsigned ResultReg = getRegForValue(I->getOperand(0)); in X86SelectZExt() local
1590 unsigned ResultReg = createResultReg(RC); in X86SelectShift() local
1733 unsigned ResultReg = 0; in X86SelectDivRem() local
1872 unsigned ResultReg = fastEmitInst_rr(Opc, RC, RHSReg, RHSIsKill, in X86FastEmitCMoveSelect() local
1950 unsigned ResultReg; in X86FastEmitSSESelect() local
2045 unsigned ResultReg = in X86FastEmitPseudoSelect() local
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | FastISel.cpp | 411 unsigned ResultReg = in selectBinaryOp() local
445 unsigned ResultReg = fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0, in selectBinaryOp() local
457 unsigned ResultReg = fastEmit_rf(VT.getSimpleVT(), VT.getSimpleVT(), in selectBinaryOp() local
472 unsigned ResultReg = fastEmit_rr(VT.getSimpleVT(), VT.getSimpleVT(), in selectBinaryOp() local
1220 unsigned ResultReg = getRegForValue(ResCI); in selectIntrinsicCall() local
1227 unsigned ResultReg = getRegForValue(II->getArgOperand(0)); in selectIntrinsicCall() local
1267 unsigned ResultReg = fastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), in selectCast() local
1302 unsigned ResultReg = 0; in selectBitCast() local
1462 unsigned ResultReg = fastEmit_r(VT.getSimpleVT(), VT.getSimpleVT(), ISD::FNEG, in selectFNeg() local
1515 unsigned ResultReg; in selectExtractValue() local
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| /external/llvm/lib/Target/ARM/ |
| D | ARMFastISel.cpp | 287 unsigned ResultReg = createResultReg(RC); in fastEmitInst_r() local
310 unsigned ResultReg = createResultReg(RC); in fastEmitInst_rr() local
339 unsigned ResultReg = createResultReg(RC); in fastEmitInst_rrr() local
370 unsigned ResultReg = createResultReg(RC); in fastEmitInst_ri() local
397 unsigned ResultReg = createResultReg(RC); in fastEmitInst_rri() local
425 unsigned ResultReg = createResultReg(RC); in fastEmitInst_i() local
545 unsigned ResultReg = 0; in ARMMaterializeInt() local
719 unsigned ResultReg = createResultReg(RC); in fastMaterializeAlloca() local
894 unsigned ResultReg = createResultReg(RC); in ARMSimplifyAddress() local
958 bool ARMFastISel::ARMEmitLoad(MVT VT, unsigned &ResultReg, Address &Addr, in ARMEmitLoad()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsFastISel.cpp | 265 unsigned ResultReg = createResultReg(&Mips::GPR32RegClass); in emitLogicalOp() local
284 unsigned ResultReg = createResultReg(&Mips::GPR32RegClass); in fastMaterializeAlloca() local
305 unsigned ResultReg = createResultReg(RC); in materialize32BitInt() local
581 bool MipsFastISel::emitCmp(unsigned ResultReg, const CmpInst *CI) { in emitCmp()
704 bool MipsFastISel::emitLoad(MVT VT, unsigned &ResultReg, Address &Addr, in emitLoad()
822 unsigned ResultReg; in selectLogicalOp() local
859 unsigned ResultReg; in selectLoad() local
927 unsigned ResultReg = createResultReg(&Mips::GPR32RegClass); in selectCmp() local
995 unsigned ResultReg = createResultReg(RC); in selectSelect() local
1225 unsigned ResultReg = createResultReg(TLI.getRegClassFor(CopyVT)); in finishCall() local
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCFastISel.cpp | 429 unsigned ResultReg = createResultReg(&PPC::G8RC_and_G8RC_NOX0RegClass); in PPCSimplifyAddress() local
449 bool PPCFastISel::PPCEmitLoad(MVT VT, unsigned &ResultReg, Address &Addr, in PPCEmitLoad()
599 unsigned ResultReg = 0; in SelectLoad() local
976 unsigned ResultReg = 0; in PPCMoveToFPReg() local
1085 unsigned ResultReg = 0; in PPCMoveToIntReg() local
1191 unsigned ResultReg = createResultReg(RC ? RC : &PPC::G8RCRegClass); in SelectBinaryIntOp() local
1409 unsigned ResultReg = 0; in finishCall() local
1785 unsigned ResultReg = createResultReg(&PPC::GPRCRegClass); in SelectTrunc() local
1826 unsigned ResultReg = createResultReg(RC); in SelectIntExt() local
1996 unsigned ResultReg = createResultReg(RC); in PPCMaterialize32BitInt() local
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| /external/llvm/include/llvm/CodeGen/ |
| D | FastISel.h | 76 unsigned ResultReg; member
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.cpp | 2633 unsigned ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in lowerScalarAbs() local
2786 unsigned ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in splitScalar64BitBCNT() local
2833 unsigned ResultReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass); in splitScalar64BitBFE() local
2857 unsigned ResultReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass); in splitScalar64BitBFE() local
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