| /external/llvm/lib/CodeGen/ |
| D | LiveVariables.cpp | 197 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) { in FindLastPartialDef() local
220 for (MCSubRegIterator SubRegs(DefReg, TRI, /*IncludeSelf=*/true); in FindLastPartialDef() local
251 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) { in HandlePhysRegUse() local
274 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true); in HandlePhysRegUse() local
290 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) { in FindLastRefOrPartRef() local
339 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) { in HandlePhysRegKill() local
370 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) { in HandlePhysRegKill() local
448 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true); in HandlePhysRegDef() local
452 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) { in HandlePhysRegDef() local
474 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) { in HandlePhysRegDef() local
[all …]
|
| D | MachineVerifier.cpp | 94 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) in addRegWithSubRegs() local
475 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) { in visitMachineFunctionBefore() local
699 for (MCSubRegIterator SubRegs(LI.PhysReg, TRI, /*IncludeSelf=*/true); in visitMachineBasicBlockBefore() local
709 for (MCSubRegIterator SubRegs(I, TRI, /*IncludeSelf=*/true); in visitMachineBasicBlockBefore() local
1099 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); in checkLiveness() local
1117 for (MCSubRegIterator SubRegs(MOP.getReg(), TRI); SubRegs.isValid(); in checkLiveness() local
|
| D | CriticalAntiDepBreaker.cpp | 217 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true); in PrescanInstruction() local
229 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true); in PrescanInstruction() local
|
| D | ScheduleDAGInstrs.cpp | 1168 for (MCSubRegIterator SubRegs(LI.PhysReg, TRI, /*IncludeSelf=*/true); in startBlockForKills() local
1237 for (MCSubRegIterator SubRegs(SuperReg, TRI); SubRegs.isValid(); ++SubRegs) { in toggleKillFlag() local
1283 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true); in fixupKills() local
1302 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) { in fixupKills() local
1339 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true); in fixupKills() local
|
| D | MachineInstrBundle.cpp | 186 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) { in finalizeBundle() local
|
| D | RegisterScavenging.cpp | 217 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) in forward() local
|
| D | AggressiveAntiDepBreaker.cpp | 244 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true); in GetPassthruRegs() local
318 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) { in HandleLastUse() local
|
| D | IfConversion.cpp | 1456 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true); in IfConvertDiamond() local
1465 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true); in IfConvertDiamond() local
|
| D | BranchFolding.cpp | 157 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true); in OptimizeImpDefsBlock() local
1718 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) in findHoistingInsertPosAndDeps() local
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPURegisterInfo.cpp | 46 static const unsigned SubRegs[] = { in getSubRegFromChannel() local
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonCopyToCombine.cpp | 389 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) { in findPotentialNewifiableTFRs() local
|
| D | HexagonInstrInfo.cpp | 1736 for (MCSubRegIterator SubRegs(RegA, &HRI); SubRegs.isValid(); ++SubRegs) in isDependent() local
1741 for (MCSubRegIterator SubRegs(RegB, &HRI); SubRegs.isValid(); ++SubRegs) in isDependent() local
|
| D | HexagonFrameLowering.cpp | 201 for (MCSubRegIterator SubRegs(Reg, &TRI); SubRegs.isValid(); ++SubRegs) { in getMax32BitSubRegister() local
|
| /external/llvm/include/llvm/MC/ |
| D | MCRegisterInfo.h | 107 uint32_t SubRegs; // Sub-register set, described above member
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelDAGToDAG.cpp | 974 static const unsigned SubRegs[] = {AArch64::dsub0, AArch64::dsub1, in createDTuple() local
983 static const unsigned SubRegs[] = {AArch64::qsub0, AArch64::qsub1, in createQTuple() local
991 const unsigned SubRegs[]) { in createTuple()
|
| /external/llvm/utils/TableGen/ |
| D | CodeGenRegisters.h | 252 SubRegMap SubRegs; member
|
| D | CodeGenRegisters.cpp | 545 ListInit *SubRegs = Def->getValueAsListInit("SubRegs"); in expand() local
1776 const SubRegMap &SubRegs = Register.getSubRegs(); in computeRegUnitLaneMasks() local
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 741 unsigned SubRegs = 0; in copyPhysReg() local
|